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riscv-gcc-1
Commit be7b80f4 by Richard Henderson Committed by Richard Henderson
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alpha.h (TARGET_ABI_OSF): New. 

        * config/alpha/alpha.h (TARGET_ABI_OSF): New.
        (TARGET_ABI_WINDOWS_NT, TARGET_ABI_OPEN_VMS): Rename; update users.
        * config/alpha/alpha-protos.h: Update TARGET_ABI_* users.
        * config/alpha/alpha.c: Likewise.
        * config/alpha/alpha.md: Likewise.
        * config/alpha/alpha32.h: Likewise.
        * config/alpha/vms.h: Likewise.
        (OPEN_VMS): Remove.

From-SVN: r44016
parent 4a82c950
Showing with 166 additions and 151 deletions
gcc/ChangeLog
2001-07-15 Richard Henderson <rth@redhat.com>
* config/alpha/alpha.h (TARGET_ABI_OSF): New.
(TARGET_ABI_WINDOWS_NT, TARGET_ABI_OPEN_VMS): Rename; update users.
* config/alpha/alpha-protos.h: Update TARGET_ABI_* users.
* config/alpha/alpha.c: Likewise.
* config/alpha/alpha.md: Likewise.
* config/alpha/alpha32.h: Likewise.
* config/alpha/vms.h: Likewise.
(OPEN_VMS): Remove.
2001-07-14 Richard Henderson <rth@redhat.com> 2001-07-14 Richard Henderson <rth@redhat.com>
* config/alpha/alpha.md: Use define_constants for unspec values. * config/alpha/alpha.md: Use define_constants for unspec values.
......
gcc/config/alpha/alpha-protos.h
...@@ -111,7 +111,7 @@ extern int check_float_value PARAMS ((enum machine_mode, ...@@ -111,7 +111,7 @@ extern int check_float_value PARAMS ((enum machine_mode,
REAL_VALUE_TYPE *, int)); REAL_VALUE_TYPE *, int));
#endif #endif
#if OPEN_VMS #if TARGET_ABI_OPEN_VMS
#ifdef HAVE_MACHINE_MODES #ifdef HAVE_MACHINE_MODES
extern enum avms_arg_type alpha_arg_type PARAMS ((enum machine_mode)); extern enum avms_arg_type alpha_arg_type PARAMS ((enum machine_mode));
#endif #endif
...@@ -121,7 +121,7 @@ extern rtx alpha_arg_info_reg_val PARAMS ((CUMULATIVE_ARGS)); ...@@ -121,7 +121,7 @@ extern rtx alpha_arg_info_reg_val PARAMS ((CUMULATIVE_ARGS));
#ifdef BUFSIZ #ifdef BUFSIZ
extern void alpha_write_linkage PARAMS ((FILE *)); extern void alpha_write_linkage PARAMS ((FILE *));
#endif #endif
#endif /* OPEN_VMS */ #endif /* TARGET_ABI_OPEN_VMS */
#ifdef RTX_CODE #ifdef RTX_CODE
extern rtx alpha_need_linkage PARAMS ((const char *, int)); extern rtx alpha_need_linkage PARAMS ((const char *, int));
......
gcc/config/alpha/alpha.c
...@@ -133,7 +133,7 @@ static void alpha_output_function_end_prologue ...@@ -133,7 +133,7 @@ static void alpha_output_function_end_prologue
PARAMS ((FILE *)); PARAMS ((FILE *));
/* Get the number of args of a function in one of two ways. */ /* Get the number of args of a function in one of two ways. */
#ifdef OPEN_VMS #if TARGET_ABI_OPEN_VMS
#define NUM_ARGS current_function_args_info.num_args #define NUM_ARGS current_function_args_info.num_args
#else #else
#define NUM_ARGS current_function_args_info #define NUM_ARGS current_function_args_info
...@@ -143,7 +143,7 @@ static void alpha_output_function_end_prologue ...@@ -143,7 +143,7 @@ static void alpha_output_function_end_prologue
#define REG_RA 26 #define REG_RA 26
/* Initialize the GCC target structure. */ /* Initialize the GCC target structure. */
#ifdef OPEN_VMS #if TARGET_ABI_OPEN_VMS
static int vms_valid_decl_attribute_p PARAMS ((tree, tree, tree, tree)); static int vms_valid_decl_attribute_p PARAMS ((tree, tree, tree, tree));
# undef TARGET_VALID_DECL_ATTRIBUTE # undef TARGET_VALID_DECL_ATTRIBUTE
# define TARGET_VALID_DECL_ATTRIBUTE vms_valid_decl_attribute_p # define TARGET_VALID_DECL_ATTRIBUTE vms_valid_decl_attribute_p
...@@ -740,9 +740,17 @@ call_operand (op, mode) ...@@ -740,9 +740,17 @@ call_operand (op, mode)
if (mode != Pmode) if (mode != Pmode)
return 0; return 0;
return (GET_CODE (op) == SYMBOL_REF if (GET_CODE (op) == SYMBOL_REF)
|| (GET_CODE (op) == REG return 1;
&& (TARGET_OPEN_VMS || TARGET_WINDOWS_NT || REGNO (op) == 27))); if (GET_CODE (op) == REG)
{
if (TARGET_ABI_OSF)
return REGNO (op) == 27;
else
return 1;
}
return 0;
} }
/* Return 1 if OP is a valid Alpha comparison operator. Here we know which /* Return 1 if OP is a valid Alpha comparison operator. Here we know which
...@@ -1059,7 +1067,9 @@ addition_operation (op, mode) ...@@ -1059,7 +1067,9 @@ addition_operation (op, mode)
int int
direct_return () direct_return ()
{ {
return (! TARGET_OPEN_VMS && reload_completed && alpha_sa_size () == 0 return (! TARGET_ABI_OPEN_VMS
&& reload_completed
&& alpha_sa_size () == 0
&& get_frame_size () == 0 && get_frame_size () == 0
&& current_function_outgoing_args_size == 0 && current_function_outgoing_args_size == 0
&& current_function_pretend_args_size == 0); && current_function_pretend_args_size == 0);
...@@ -2156,7 +2166,7 @@ alpha_lookup_xfloating_lib_func (code) ...@@ -2156,7 +2166,7 @@ alpha_lookup_xfloating_lib_func (code)
knowledge of the G_floating routines. */ knowledge of the G_floating routines. */
if (TARGET_FLOAT_VAX) if (TARGET_FLOAT_VAX)
{ {
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
{ {
if (code == FLOAT_EXTEND) if (code == FLOAT_EXTEND)
return "OTS$CVT_FLOAT_G_X"; return "OTS$CVT_FLOAT_G_X";
...@@ -2172,7 +2182,7 @@ alpha_lookup_xfloating_lib_func (code) ...@@ -2172,7 +2182,7 @@ alpha_lookup_xfloating_lib_func (code)
} }
} }
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
ops = vms_xfloating_ops; ops = vms_xfloating_ops;
else else
ops = osf_xfloating_ops; ops = osf_xfloating_ops;
...@@ -4057,7 +4067,7 @@ alpha_initialize_trampoline (tramp, fnaddr, cxt, fnofs, cxtofs, jmpofs) ...@@ -4057,7 +4067,7 @@ alpha_initialize_trampoline (tramp, fnaddr, cxt, fnofs, cxtofs, jmpofs)
{ {
rtx temp, temp1, addr; rtx temp, temp1, addr;
/* VMS really uses DImode pointers in memory at this point. */ /* VMS really uses DImode pointers in memory at this point. */
enum machine_mode mode = TARGET_OPEN_VMS ? Pmode : ptr_mode; enum machine_mode mode = TARGET_ABI_OPEN_VMS ? Pmode : ptr_mode;
#ifdef POINTERS_EXTEND_UNSIGNED #ifdef POINTERS_EXTEND_UNSIGNED
fnaddr = convert_memory_address (mode, fnaddr); fnaddr = convert_memory_address (mode, fnaddr);
...@@ -4126,7 +4136,14 @@ function_arg (cum, mode, type, named) ...@@ -4126,7 +4136,14 @@ function_arg (cum, mode, type, named)
int basereg; int basereg;
int num_args; int num_args;
#ifndef OPEN_VMS #if TARGET_ABI_OPEN_VMS
if (mode == VOIDmode)
return alpha_arg_info_reg_val (cum);
num_args = cum.num_args;
if (num_args >= 6 || MUST_PASS_IN_STACK (mode, type))
return NULL_RTX;
#else
if (cum >= 6) if (cum >= 6)
return NULL_RTX; return NULL_RTX;
num_args = cum; num_args = cum;
...@@ -4138,14 +4155,7 @@ function_arg (cum, mode, type, named) ...@@ -4138,14 +4155,7 @@ function_arg (cum, mode, type, named)
return NULL_RTX; return NULL_RTX;
else if (FUNCTION_ARG_PASS_BY_REFERENCE (cum, mode, type, named)) else if (FUNCTION_ARG_PASS_BY_REFERENCE (cum, mode, type, named))
basereg = 16; basereg = 16;
#else #endif /* TARGET_ABI_OPEN_VMS */
if (mode == VOIDmode)
return alpha_arg_info_reg_val (cum);
num_args = cum.num_args;
if (num_args >= 6 || MUST_PASS_IN_STACK (mode, type))
return NULL_RTX;
#endif /* OPEN_VMS */
else if (TARGET_FPREGS else if (TARGET_FPREGS
&& (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
|| GET_MODE_CLASS (mode) == MODE_FLOAT)) || GET_MODE_CLASS (mode) == MODE_FLOAT))
...@@ -4161,7 +4171,7 @@ alpha_build_va_list () ...@@ -4161,7 +4171,7 @@ alpha_build_va_list ()
{ {
tree base, ofs, record, type_decl; tree base, ofs, record, type_decl;
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
return ptr_type_node; return ptr_type_node;
record = make_lang_type (RECORD_TYPE); record = make_lang_type (RECORD_TYPE);
...@@ -4198,7 +4208,7 @@ alpha_va_start (stdarg_p, valist, nextarg) ...@@ -4198,7 +4208,7 @@ alpha_va_start (stdarg_p, valist, nextarg)
if (TREE_CODE (TREE_TYPE (valist)) == ERROR_MARK) if (TREE_CODE (TREE_TYPE (valist)) == ERROR_MARK)
return; return;
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
std_expand_builtin_va_start (stdarg_p, valist, nextarg); std_expand_builtin_va_start (stdarg_p, valist, nextarg);
/* For Unix, SETUP_INCOMING_VARARGS moves the starting address base /* For Unix, SETUP_INCOMING_VARARGS moves the starting address base
...@@ -4246,7 +4256,7 @@ alpha_va_arg (valist, type) ...@@ -4246,7 +4256,7 @@ alpha_va_arg (valist, type)
tree wide_type, wide_ofs; tree wide_type, wide_ofs;
int indirect = 0; int indirect = 0;
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
return std_expand_builtin_va_arg (valist, type); return std_expand_builtin_va_arg (valist, type);
tsize = ((TREE_INT_CST_LOW (TYPE_SIZE (type)) / BITS_PER_UNIT + 7) / 8) * 8; tsize = ((TREE_INT_CST_LOW (TYPE_SIZE (type)) / BITS_PER_UNIT + 7) / 8) * 8;
...@@ -4343,7 +4353,7 @@ alpha_sa_mask (imaskP, fmaskP) ...@@ -4343,7 +4353,7 @@ alpha_sa_mask (imaskP, fmaskP)
if (!current_function_is_thunk) if (!current_function_is_thunk)
#endif #endif
{ {
if (TARGET_OPEN_VMS && vms_is_stack_procedure) if (TARGET_ABI_OPEN_VMS && vms_is_stack_procedure)
imask |= (1L << HARD_FRAME_POINTER_REGNUM); imask |= (1L << HARD_FRAME_POINTER_REGNUM);
/* One for every register we have to save. */ /* One for every register we have to save. */
...@@ -4396,7 +4406,7 @@ alpha_sa_size () ...@@ -4396,7 +4406,7 @@ alpha_sa_size ()
sa_size++; sa_size++;
} }
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
{ {
/* Start by assuming we can use a register procedure if we don't /* Start by assuming we can use a register procedure if we don't
make any calls (REG_RA not used) or need to save any make any calls (REG_RA not used) or need to save any
...@@ -4462,7 +4472,7 @@ alpha_using_fp () ...@@ -4462,7 +4472,7 @@ alpha_using_fp ()
return vms_unwind_regno == HARD_FRAME_POINTER_REGNUM; return vms_unwind_regno == HARD_FRAME_POINTER_REGNUM;
} }
#ifdef OPEN_VMS #if TARGET_ABI_OPEN_VMS
static int static int
vms_valid_decl_attribute_p (decl, attributes, identifier, args) vms_valid_decl_attribute_p (decl, attributes, identifier, args)
...@@ -4484,7 +4494,7 @@ alpha_does_function_need_gp () ...@@ -4484,7 +4494,7 @@ alpha_does_function_need_gp ()
rtx insn; rtx insn;
/* We never need a GP for Windows/NT or VMS. */ /* We never need a GP for Windows/NT or VMS. */
if (TARGET_WINDOWS_NT || TARGET_OPEN_VMS) if (TARGET_ABI_WINDOWS_NT || TARGET_ABI_OPEN_VMS)
return 0; return 0;
if (TARGET_PROFILING_NEEDS_GP && profile_flag) if (TARGET_PROFILING_NEEDS_GP && profile_flag)
...@@ -4593,7 +4603,7 @@ alpha_expand_prologue () ...@@ -4593,7 +4603,7 @@ alpha_expand_prologue ()
sa_size = alpha_sa_size (); sa_size = alpha_sa_size ();
frame_size = get_frame_size (); frame_size = get_frame_size ();
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
frame_size = ALPHA_ROUND (sa_size frame_size = ALPHA_ROUND (sa_size
+ (vms_is_stack_procedure ? 8 : 0) + (vms_is_stack_procedure ? 8 : 0)
+ frame_size + frame_size
...@@ -4604,7 +4614,7 @@ alpha_expand_prologue () ...@@ -4604,7 +4614,7 @@ alpha_expand_prologue ()
+ ALPHA_ROUND (frame_size + ALPHA_ROUND (frame_size
+ current_function_pretend_args_size)); + current_function_pretend_args_size));
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
reg_offset = 8; reg_offset = 8;
else else
reg_offset = ALPHA_ROUND (current_function_outgoing_args_size); reg_offset = ALPHA_ROUND (current_function_outgoing_args_size);
...@@ -4612,7 +4622,7 @@ alpha_expand_prologue () ...@@ -4612,7 +4622,7 @@ alpha_expand_prologue ()
alpha_sa_mask (&imask, &fmask); alpha_sa_mask (&imask, &fmask);
/* Emit an insn to reload GP, if needed. */ /* Emit an insn to reload GP, if needed. */
if (!TARGET_OPEN_VMS && !TARGET_WINDOWS_NT) if (TARGET_ABI_OSF)
{ {
alpha_function_needs_gp = alpha_does_function_need_gp (); alpha_function_needs_gp = alpha_does_function_need_gp ();
if (alpha_function_needs_gp) if (alpha_function_needs_gp)
...@@ -4682,7 +4692,7 @@ alpha_expand_prologue () ...@@ -4682,7 +4692,7 @@ alpha_expand_prologue ()
emit_move_insn (last, const0_rtx); emit_move_insn (last, const0_rtx);
} }
if (TARGET_WINDOWS_NT) if (TARGET_ABI_WINDOWS_NT)
{ {
/* For NT stack unwind (done by 'reverse execution'), it's /* For NT stack unwind (done by 'reverse execution'), it's
not OK to take the result of a loop, even though the value not OK to take the result of a loop, even though the value
...@@ -4737,7 +4747,7 @@ alpha_expand_prologue () ...@@ -4737,7 +4747,7 @@ alpha_expand_prologue ()
} }
/* Save regs in stack order. Beginning with VMS PV. */ /* Save regs in stack order. Beginning with VMS PV. */
if (TARGET_OPEN_VMS && vms_is_stack_procedure) if (TARGET_ABI_OPEN_VMS && vms_is_stack_procedure)
{ {
mem = gen_rtx_MEM (DImode, stack_pointer_rtx); mem = gen_rtx_MEM (DImode, stack_pointer_rtx);
set_mem_alias_set (mem, alpha_sr_alias_set); set_mem_alias_set (mem, alpha_sr_alias_set);
...@@ -4773,7 +4783,7 @@ alpha_expand_prologue () ...@@ -4773,7 +4783,7 @@ alpha_expand_prologue ()
reg_offset += 8; reg_offset += 8;
} }
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
{ {
if (!vms_is_stack_procedure) if (!vms_is_stack_procedure)
/* Register frame procedures fave the fp. */ /* Register frame procedures fave the fp. */
...@@ -4847,7 +4857,7 @@ alpha_start_function (file, fnname, decl) ...@@ -4847,7 +4857,7 @@ alpha_start_function (file, fnname, decl)
sa_size = alpha_sa_size (); sa_size = alpha_sa_size ();
frame_size = get_frame_size (); frame_size = get_frame_size ();
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
frame_size = ALPHA_ROUND (sa_size frame_size = ALPHA_ROUND (sa_size
+ (vms_is_stack_procedure ? 8 : 0) + (vms_is_stack_procedure ? 8 : 0)
+ frame_size + frame_size
...@@ -4858,7 +4868,7 @@ alpha_start_function (file, fnname, decl) ...@@ -4858,7 +4868,7 @@ alpha_start_function (file, fnname, decl)
+ ALPHA_ROUND (frame_size + ALPHA_ROUND (frame_size
+ current_function_pretend_args_size)); + current_function_pretend_args_size));
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
reg_offset = 8; reg_offset = 8;
else else
reg_offset = ALPHA_ROUND (current_function_outgoing_args_size); reg_offset = ALPHA_ROUND (current_function_outgoing_args_size);
...@@ -4883,7 +4893,7 @@ alpha_start_function (file, fnname, decl) ...@@ -4883,7 +4893,7 @@ alpha_start_function (file, fnname, decl)
} }
/* Issue function start and label. */ /* Issue function start and label. */
if (TARGET_OPEN_VMS || !flag_inhibit_size_directive) if (TARGET_ABI_OPEN_VMS || !flag_inhibit_size_directive)
{ {
fputs ("\t.ent ", file); fputs ("\t.ent ", file);
assemble_name (file, fnname); assemble_name (file, fnname);
...@@ -4891,8 +4901,7 @@ alpha_start_function (file, fnname, decl) ...@@ -4891,8 +4901,7 @@ alpha_start_function (file, fnname, decl)
/* If the function needs GP, we'll write the "..ng" label there. /* If the function needs GP, we'll write the "..ng" label there.
Otherwise, do it here. */ Otherwise, do it here. */
if (! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT if (TARGET_ABI_OSF && ! alpha_function_needs_gp)
&& ! alpha_function_needs_gp)
{ {
putc ('$', file); putc ('$', file);
assemble_name (file, fnname); assemble_name (file, fnname);
...@@ -4901,15 +4910,15 @@ alpha_start_function (file, fnname, decl) ...@@ -4901,15 +4910,15 @@ alpha_start_function (file, fnname, decl)
} }
strcpy (entry_label, fnname); strcpy (entry_label, fnname);
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
strcat (entry_label, "..en"); strcat (entry_label, "..en");
ASM_OUTPUT_LABEL (file, entry_label); ASM_OUTPUT_LABEL (file, entry_label);
inside_function = TRUE; inside_function = TRUE;
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
fprintf (file, "\t.base $%d\n", vms_base_regno); fprintf (file, "\t.base $%d\n", vms_base_regno);
if (!TARGET_OPEN_VMS && TARGET_IEEE_CONFORMANT if (!TARGET_ABI_OPEN_VMS && TARGET_IEEE_CONFORMANT
&& !flag_inhibit_size_directive) && !flag_inhibit_size_directive)
{ {
/* Set flags in procedure descriptor to request IEEE-conformant /* Set flags in procedure descriptor to request IEEE-conformant
...@@ -4925,7 +4934,7 @@ alpha_start_function (file, fnname, decl) ...@@ -4925,7 +4934,7 @@ alpha_start_function (file, fnname, decl)
/* Describe our frame. If the frame size is larger than an integer, /* Describe our frame. If the frame size is larger than an integer,
print it as zero to avoid an assembler error. We won't be print it as zero to avoid an assembler error. We won't be
properly describing such a frame, but that's the best we can do. */ properly describing such a frame, but that's the best we can do. */
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
{ {
fprintf (file, "\t.frame $%d,", vms_unwind_regno); fprintf (file, "\t.frame $%d,", vms_unwind_regno);
fprintf (file, HOST_WIDE_INT_PRINT_DEC, fprintf (file, HOST_WIDE_INT_PRINT_DEC,
...@@ -4945,7 +4954,7 @@ alpha_start_function (file, fnname, decl) ...@@ -4945,7 +4954,7 @@ alpha_start_function (file, fnname, decl)
} }
/* Describe which registers were spilled. */ /* Describe which registers were spilled. */
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
{ {
if (imask) if (imask)
/* ??? Does VMS care if mask contains ra? The old code did'nt /* ??? Does VMS care if mask contains ra? The old code did'nt
...@@ -4979,7 +4988,7 @@ alpha_start_function (file, fnname, decl) ...@@ -4979,7 +4988,7 @@ alpha_start_function (file, fnname, decl)
} }
} }
#ifdef OPEN_VMS #if TARGET_ABI_OPEN_VMS
/* Ifdef'ed cause readonly_section and link_section are only /* Ifdef'ed cause readonly_section and link_section are only
available then. */ available then. */
readonly_section (); readonly_section ();
...@@ -5009,9 +5018,9 @@ static void ...@@ -5009,9 +5018,9 @@ static void
alpha_output_function_end_prologue (file) alpha_output_function_end_prologue (file)
FILE *file; FILE *file;
{ {
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
fputs ("\t.prologue\n", file); fputs ("\t.prologue\n", file);
else if (TARGET_WINDOWS_NT) else if (TARGET_ABI_WINDOWS_NT)
fputs ("\t.prologue 0\n", file); fputs ("\t.prologue 0\n", file);
else if (!flag_inhibit_size_directive) else if (!flag_inhibit_size_directive)
fprintf (file, "\t.prologue %d\n", alpha_function_needs_gp); fprintf (file, "\t.prologue %d\n", alpha_function_needs_gp);
...@@ -5046,7 +5055,7 @@ alpha_expand_epilogue () ...@@ -5046,7 +5055,7 @@ alpha_expand_epilogue ()
sa_size = alpha_sa_size (); sa_size = alpha_sa_size ();
frame_size = get_frame_size (); frame_size = get_frame_size ();
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
frame_size = ALPHA_ROUND (sa_size frame_size = ALPHA_ROUND (sa_size
+ (vms_is_stack_procedure ? 8 : 0) + (vms_is_stack_procedure ? 8 : 0)
+ frame_size + frame_size
...@@ -5057,15 +5066,15 @@ alpha_expand_epilogue () ...@@ -5057,15 +5066,15 @@ alpha_expand_epilogue ()
+ ALPHA_ROUND (frame_size + ALPHA_ROUND (frame_size
+ current_function_pretend_args_size)); + current_function_pretend_args_size));
if (TARGET_OPEN_VMS) if (TARGET_ABI_OPEN_VMS)
reg_offset = 8; reg_offset = 8;
else else
reg_offset = ALPHA_ROUND (current_function_outgoing_args_size); reg_offset = ALPHA_ROUND (current_function_outgoing_args_size);
alpha_sa_mask (&imask, &fmask); alpha_sa_mask (&imask, &fmask);
fp_is_frame_pointer = ((TARGET_OPEN_VMS && vms_is_stack_procedure) fp_is_frame_pointer = ((TARGET_ABI_OPEN_VMS && vms_is_stack_procedure)
|| (!TARGET_OPEN_VMS && frame_pointer_needed)); || (!TARGET_ABI_OPEN_VMS && frame_pointer_needed));
fp_offset = 0; fp_offset = 0;
sa_reg = stack_pointer_rtx; sa_reg = stack_pointer_rtx;
...@@ -5077,9 +5086,9 @@ alpha_expand_epilogue () ...@@ -5077,9 +5086,9 @@ alpha_expand_epilogue ()
if (sa_size) if (sa_size)
{ {
/* If we have a frame pointer, restore SP from it. */ /* If we have a frame pointer, restore SP from it. */
if ((TARGET_OPEN_VMS if ((TARGET_ABI_OPEN_VMS
&& vms_unwind_regno == HARD_FRAME_POINTER_REGNUM) && vms_unwind_regno == HARD_FRAME_POINTER_REGNUM)
|| (!TARGET_OPEN_VMS && frame_pointer_needed)) || (!TARGET_ABI_OPEN_VMS && frame_pointer_needed))
FRP (emit_move_insn (stack_pointer_rtx, hard_frame_pointer_rtx)); FRP (emit_move_insn (stack_pointer_rtx, hard_frame_pointer_rtx));
/* Cope with very large offsets to the register save area. */ /* Cope with very large offsets to the register save area. */
...@@ -5188,7 +5197,7 @@ alpha_expand_epilogue () ...@@ -5188,7 +5197,7 @@ alpha_expand_epilogue ()
set_mem_alias_set (mem, alpha_sr_alias_set); set_mem_alias_set (mem, alpha_sr_alias_set);
FRP (emit_move_insn (hard_frame_pointer_rtx, mem)); FRP (emit_move_insn (hard_frame_pointer_rtx, mem));
} }
else if (TARGET_OPEN_VMS) else if (TARGET_ABI_OPEN_VMS)
{ {
emit_insn (gen_blockage ()); emit_insn (gen_blockage ());
FRP (emit_move_insn (hard_frame_pointer_rtx, FRP (emit_move_insn (hard_frame_pointer_rtx,
...@@ -5202,7 +5211,7 @@ alpha_expand_epilogue () ...@@ -5202,7 +5211,7 @@ alpha_expand_epilogue ()
} }
else else
{ {
if (TARGET_OPEN_VMS && !vms_is_stack_procedure) if (TARGET_ABI_OPEN_VMS && !vms_is_stack_procedure)
{ {
emit_insn (gen_blockage ()); emit_insn (gen_blockage ());
FRP (emit_move_insn (hard_frame_pointer_rtx, FRP (emit_move_insn (hard_frame_pointer_rtx,
...@@ -6270,7 +6279,7 @@ check_float_value (mode, d, overflow) ...@@ -6270,7 +6279,7 @@ check_float_value (mode, d, overflow)
return 0; return 0;
} }
#if OPEN_VMS #if TARGET_ABI_OPEN_VMS
/* Return the VMS argument type corresponding to MODE. */ /* Return the VMS argument type corresponding to MODE. */
...@@ -6466,4 +6475,4 @@ alpha_need_linkage (name, is_local) ...@@ -6466,4 +6475,4 @@ alpha_need_linkage (name, is_local)
return NULL_RTX; return NULL_RTX;
} }
#endif /* OPEN_VMS */ #endif /* TARGET_ABI_OPEN_VMS */
gcc/config/alpha/alpha.h
...@@ -173,12 +173,9 @@ extern enum alpha_fp_trap_mode alpha_fptm; ...@@ -173,12 +173,9 @@ extern enum alpha_fp_trap_mode alpha_fptm;
#define TARGET_SUPPORT_ARCH (target_flags & MASK_SUPPORT_ARCH) #define TARGET_SUPPORT_ARCH (target_flags & MASK_SUPPORT_ARCH)
/* These are for target os support and cannot be changed at runtime. */ /* These are for target os support and cannot be changed at runtime. */
#ifndef TARGET_WINDOWS_NT #define TARGET_ABI_WINDOWS_NT 0
#define TARGET_WINDOWS_NT 0 #define TARGET_ABI_OPEN_VMS 0
#endif #define TARGET_ABI_OSF (!TARGET_ABI_WINDOWS_NT && !TARGET_ABI_OPEN_VMS)
#ifndef TARGET_OPEN_VMS
#define TARGET_OPEN_VMS 0
#endif
#ifndef TARGET_AS_CAN_SUBTRACT_LABELS #ifndef TARGET_AS_CAN_SUBTRACT_LABELS
#define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS #define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS
...@@ -2147,7 +2144,7 @@ literal_section () \ ...@@ -2147,7 +2144,7 @@ literal_section () \
/* This is how to output an element of a case-vector that is relative. */ /* This is how to output an element of a case-vector that is relative. */
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
fprintf (FILE, "\t.%s $L%d\n", TARGET_WINDOWS_NT ? "long" : "gprel32", \ fprintf (FILE, "\t.%s $L%d\n", TARGET_ABI_WINDOWS_NT ? "long" : "gprel32", \
(VALUE)) (VALUE))
/* This is how to output an assembler line /* This is how to output an assembler line
...@@ -2197,7 +2194,7 @@ do { \ ...@@ -2197,7 +2194,7 @@ do { \
const char *fn_name = XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0); \ const char *fn_name = XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0); \
int reg; \ int reg; \
\ \
if (! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT) \ if (TARGET_ABI_OSF) \
fprintf (FILE, "\tldgp $29,0($27)\n"); \ fprintf (FILE, "\tldgp $29,0($27)\n"); \
\ \
/* Mark end of prologue. */ \ /* Mark end of prologue. */ \
......
gcc/config/alpha/alpha.md
...@@ -227,14 +227,14 @@ ...@@ -227,14 +227,14 @@
(and (eq_attr "cpu" "ev5") (and (eq_attr "cpu" "ev5")
(eq_attr "type" "fadd,fcmov,fmul,fcpys,fbr,fdiv")) (eq_attr "type" "fadd,fcmov,fmul,fcpys,fbr,fdiv"))
4 1) 4 1)
(define_function_unit "ev5_fm" 1 0 (define_function_unit "ev5_fm" 1 0
(and (eq_attr "cpu" "ev5") (and (eq_attr "cpu" "ev5")
(eq_attr "type" "fmul")) (eq_attr "type" "fmul"))
4 1) 4 1)
; Add and cmov as you would expect; fbr never produces a result; ; Add and cmov as you would expect; fbr never produces a result;
; fdiv issues through fa to the divider, ; fdiv issues through fa to the divider,
(define_function_unit "ev5_fa" 1 0 (define_function_unit "ev5_fa" 1 0
(and (eq_attr "cpu" "ev5") (and (eq_attr "cpu" "ev5")
(eq_attr "type" "fadd,fcmov,fbr,fdiv")) (eq_attr "type" "fadd,fcmov,fbr,fdiv"))
...@@ -259,7 +259,7 @@ ...@@ -259,7 +259,7 @@
;; EV6 has two symmetric pairs ("clusters") of two asymetric integer units ;; EV6 has two symmetric pairs ("clusters") of two asymetric integer units
;; ("upper" and "lower"), yielding pipe names U0, U1, L0, L1. ;; ("upper" and "lower"), yielding pipe names U0, U1, L0, L1.
;; Conditional moves decompose into two independant primitives, each ;; Conditional moves decompose into two independant primitives, each
;; taking one cycle. Since ev6 is out-of-order, we can't see anything ;; taking one cycle. Since ev6 is out-of-order, we can't see anything
;; but two cycles. ;; but two cycles.
(define_function_unit "ev6_ebox" 4 0 (define_function_unit "ev6_ebox" 4 0
...@@ -344,7 +344,7 @@ ...@@ -344,7 +344,7 @@
;; For the FPU we are very similar to EV5, except there's no insn that ;; For the FPU we are very similar to EV5, except there's no insn that
;; can issue to fm & fa, so we get to leave that out. ;; can issue to fm & fa, so we get to leave that out.
(define_function_unit "ev6_fm" 1 0 (define_function_unit "ev6_fm" 1 0
(and (eq_attr "cpu" "ev6") (and (eq_attr "cpu" "ev6")
(eq_attr "type" "fmul")) (eq_attr "type" "fmul"))
...@@ -614,7 +614,7 @@ ...@@ -614,7 +614,7 @@
;; (that's a bug, but not one we can do anything about). As of NT4.0 SP3, ;; (that's a bug, but not one we can do anything about). As of NT4.0 SP3,
;; the exception handling code will loop if a subq is used and an ;; the exception handling code will loop if a subq is used and an
;; exception occurs. ;; exception occurs.
;; ;;
;; The 19980616 change to emit prologues as RTL also confused some ;; The 19980616 change to emit prologues as RTL also confused some
;; versions of GDB, which also interprets prologues. This has been ;; versions of GDB, which also interprets prologues. This has been
;; fixed as of GDB 4.18, but it does not harm to unconditionally ;; fixed as of GDB 4.18, but it does not harm to unconditionally
...@@ -986,7 +986,7 @@ ...@@ -986,7 +986,7 @@
(clobber (reg:DI 28))]) (clobber (reg:DI 28))])
(set (match_operand:SI 0 "nonimmediate_operand" "") (set (match_operand:SI 0 "nonimmediate_operand" "")
(subreg:SI (reg:DI 27) 0))] (subreg:SI (reg:DI 27) 0))]
"!TARGET_OPEN_VMS" "! TARGET_ABI_OPEN_VMS"
"") "")
(define_expand "udivsi3" (define_expand "udivsi3"
...@@ -1000,7 +1000,7 @@ ...@@ -1000,7 +1000,7 @@
(clobber (reg:DI 28))]) (clobber (reg:DI 28))])
(set (match_operand:SI 0 "nonimmediate_operand" "") (set (match_operand:SI 0 "nonimmediate_operand" "")
(subreg:SI (reg:DI 27) 0))] (subreg:SI (reg:DI 27) 0))]
"!TARGET_OPEN_VMS" "! TARGET_ABI_OPEN_VMS"
"") "")
(define_expand "modsi3" (define_expand "modsi3"
...@@ -1014,7 +1014,7 @@ ...@@ -1014,7 +1014,7 @@
(clobber (reg:DI 28))]) (clobber (reg:DI 28))])
(set (match_operand:SI 0 "nonimmediate_operand" "") (set (match_operand:SI 0 "nonimmediate_operand" "")
(subreg:SI (reg:DI 27) 0))] (subreg:SI (reg:DI 27) 0))]
"!TARGET_OPEN_VMS" "! TARGET_ABI_OPEN_VMS"
"") "")
(define_expand "umodsi3" (define_expand "umodsi3"
...@@ -1028,7 +1028,7 @@ ...@@ -1028,7 +1028,7 @@
(clobber (reg:DI 28))]) (clobber (reg:DI 28))])
(set (match_operand:SI 0 "nonimmediate_operand" "") (set (match_operand:SI 0 "nonimmediate_operand" "")
(subreg:SI (reg:DI 27) 0))] (subreg:SI (reg:DI 27) 0))]
"!TARGET_OPEN_VMS" "! TARGET_ABI_OPEN_VMS"
"") "")
(define_expand "divdi3" (define_expand "divdi3"
...@@ -1041,7 +1041,7 @@ ...@@ -1041,7 +1041,7 @@
(clobber (reg:DI 28))]) (clobber (reg:DI 28))])
(set (match_operand:DI 0 "nonimmediate_operand" "") (set (match_operand:DI 0 "nonimmediate_operand" "")
(reg:DI 27))] (reg:DI 27))]
"!TARGET_OPEN_VMS" "! TARGET_ABI_OPEN_VMS"
"") "")
(define_expand "udivdi3" (define_expand "udivdi3"
...@@ -1054,7 +1054,7 @@ ...@@ -1054,7 +1054,7 @@
(clobber (reg:DI 28))]) (clobber (reg:DI 28))])
(set (match_operand:DI 0 "nonimmediate_operand" "") (set (match_operand:DI 0 "nonimmediate_operand" "")
(reg:DI 27))] (reg:DI 27))]
"!TARGET_OPEN_VMS" "! TARGET_ABI_OPEN_VMS"
"") "")
(define_expand "moddi3" (define_expand "moddi3"
...@@ -1067,7 +1067,7 @@ ...@@ -1067,7 +1067,7 @@
(clobber (reg:DI 28))]) (clobber (reg:DI 28))])
(set (match_operand:DI 0 "nonimmediate_operand" "") (set (match_operand:DI 0 "nonimmediate_operand" "")
(reg:DI 27))] (reg:DI 27))]
"!TARGET_OPEN_VMS" "! TARGET_ABI_OPEN_VMS"
"") "")
(define_expand "umoddi3" (define_expand "umoddi3"
...@@ -1080,7 +1080,7 @@ ...@@ -1080,7 +1080,7 @@
(clobber (reg:DI 28))]) (clobber (reg:DI 28))])
(set (match_operand:DI 0 "nonimmediate_operand" "") (set (match_operand:DI 0 "nonimmediate_operand" "")
(reg:DI 27))] (reg:DI 27))]
"!TARGET_OPEN_VMS" "! TARGET_ABI_OPEN_VMS"
"") "")
;; Lengths of 8 for ldq $t12,__divq($gp); jsr $t9,($t12),__divq as ;; Lengths of 8 for ldq $t12,__divq($gp); jsr $t9,($t12),__divq as
...@@ -1091,7 +1091,7 @@ ...@@ -1091,7 +1091,7 @@
[(reg:DI 24) (reg:DI 25)]))) [(reg:DI 24) (reg:DI 25)])))
(clobber (reg:DI 23)) (clobber (reg:DI 23))
(clobber (reg:DI 28))] (clobber (reg:DI 28))]
"!TARGET_OPEN_VMS" "! TARGET_ABI_OPEN_VMS"
"%E0 $24,$25,$27" "%E0 $24,$25,$27"
[(set_attr "type" "jsr") [(set_attr "type" "jsr")
(set_attr "length" "8")]) (set_attr "length" "8")])
...@@ -1102,7 +1102,7 @@ ...@@ -1102,7 +1102,7 @@
[(reg:DI 24) (reg:DI 25)])) [(reg:DI 24) (reg:DI 25)]))
(clobber (reg:DI 23)) (clobber (reg:DI 23))
(clobber (reg:DI 28))] (clobber (reg:DI 28))]
"!TARGET_OPEN_VMS" "! TARGET_ABI_OPEN_VMS"
"%E0 $24,$25,$27" "%E0 $24,$25,$27"
[(set_attr "type" "jsr") [(set_attr "type" "jsr")
(set_attr "length" "8")]) (set_attr "length" "8")])
...@@ -1212,7 +1212,7 @@ ...@@ -1212,7 +1212,7 @@
if (! TARGET_BWX) if (! TARGET_BWX)
operands[1] = force_reg (QImode, operands[1]); operands[1] = force_reg (QImode, operands[1]);
}") }")
(define_insn "*zero_extendqidi2_bwx" (define_insn "*zero_extendqidi2_bwx"
[(set (match_operand:DI 0 "register_operand" "=r,r") [(set (match_operand:DI 0 "register_operand" "=r,r")
(zero_extend:DI (match_operand:QI 1 "nonimmediate_operand" "r,m")))] (zero_extend:DI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
...@@ -1228,7 +1228,7 @@ ...@@ -1228,7 +1228,7 @@
"! TARGET_BWX" "! TARGET_BWX"
"and %1,0xff,%0" "and %1,0xff,%0"
[(set_attr "type" "ilog")]) [(set_attr "type" "ilog")])
(define_expand "zero_extendhisi2" (define_expand "zero_extendhisi2"
[(set (match_operand:SI 0 "register_operand" "") [(set (match_operand:SI 0 "register_operand" "")
(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "")))] (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "")))]
...@@ -1339,7 +1339,7 @@ ...@@ -1339,7 +1339,7 @@
"eqv %r1,%2,%0" "eqv %r1,%2,%0"
[(set_attr "type" "ilog")]) [(set_attr "type" "ilog")])
;; Handle the FFS insn iff we support CIX. ;; Handle the FFS insn iff we support CIX.
(define_expand "ffsdi2" (define_expand "ffsdi2"
[(set (match_dup 2) [(set (match_dup 2)
...@@ -1361,7 +1361,7 @@ ...@@ -1361,7 +1361,7 @@
(unspec:DI [(match_operand:DI 1 "register_operand" "r")] UNSPEC_CTTZ))] (unspec:DI [(match_operand:DI 1 "register_operand" "r")] UNSPEC_CTTZ))]
"TARGET_CIX" "TARGET_CIX"
"cttz %1,%0" "cttz %1,%0"
; EV6 calls all mvi and cttz/ctlz/popc class imisc, so just ; EV6 calls all mvi and cttz/ctlz/popc class imisc, so just
; reuse the existing type name. ; reuse the existing type name.
[(set_attr "type" "mvi")]) [(set_attr "type" "mvi")])
...@@ -1407,7 +1407,7 @@ ...@@ -1407,7 +1407,7 @@
;; return \"s%P2addl %r1,0,%0\"; ;; return \"s%P2addl %r1,0,%0\";
;; }" ;; }"
;; [(set_attr "type" "iadd")]) ;; [(set_attr "type" "iadd")])
(define_insn "lshrdi3" (define_insn "lshrdi3"
[(set (match_operand:DI 0 "register_operand" "=r") [(set (match_operand:DI 0 "register_operand" "=r")
(lshiftrt:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") (lshiftrt:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
...@@ -1440,7 +1440,7 @@ ...@@ -1440,7 +1440,7 @@
force_reg (QImode, operands[1]))); force_reg (QImode, operands[1])));
DONE; DONE;
} }
/* If we have an unaligned MEM, extend to DImode (which we do /* If we have an unaligned MEM, extend to DImode (which we do
specially) and then copy to the result. */ specially) and then copy to the result. */
if (unaligned_memory_operand (operands[1], HImode)) if (unaligned_memory_operand (operands[1], HImode))
...@@ -1687,7 +1687,7 @@ ...@@ -1687,7 +1687,7 @@
[(set_attr "type" "shift")]) [(set_attr "type" "shift")])
;; Combine has some strange notion of preserving existing undefined behaviour ;; Combine has some strange notion of preserving existing undefined behaviour
;; in shifts larger than a word size. So capture these patterns that it ;; in shifts larger than a word size. So capture these patterns that it
;; should have turned into zero_extracts. ;; should have turned into zero_extracts.
(define_insn "*extxl_1" (define_insn "*extxl_1"
...@@ -1774,11 +1774,11 @@ ...@@ -1774,11 +1774,11 @@
;; (match_dup 4)))] ;; (match_dup 4)))]
;; " ;; "
;;{ ;;{
;; operands[6] = plus_constant (operands[3], ;; operands[6] = plus_constant (operands[3],
;; INTVAL (operands[2]) / BITS_PER_UNIT); ;; INTVAL (operands[2]) / BITS_PER_UNIT);
;; operands[7] = GEN_INT (- INTVAL (operands[2]) / BITS_PER_UNIT); ;; operands[7] = GEN_INT (- INTVAL (operands[2]) / BITS_PER_UNIT);
;;}") ;;}")
(define_insn "*insbl_const" (define_insn "*insbl_const"
[(set (match_operand:DI 0 "register_operand" "=r") [(set (match_operand:DI 0 "register_operand" "=r")
(ashift:DI (zero_extend:DI (match_operand:QI 1 "register_operand" "r")) (ashift:DI (zero_extend:DI (match_operand:QI 1 "register_operand" "r"))
...@@ -2353,7 +2353,7 @@ ...@@ -2353,7 +2353,7 @@
bit at bit 48 of the fraction, which is representable in DFmode, bit at bit 48 of the fraction, which is representable in DFmode,
which prevents rounding error in the final conversion to SFmode. */ which prevents rounding error in the final conversion to SFmode. */
emit_insn (gen_rtx_SET (VOIDmode, sticky, emit_insn (gen_rtx_SET (VOIDmode, sticky,
gen_rtx_NE (DImode, lo, const0_rtx))); gen_rtx_NE (DImode, lo, const0_rtx)));
emit_insn (gen_iordi3 (hi, hi, sticky)); emit_insn (gen_iordi3 (hi, hi, sticky));
emit_insn (gen_trunctfdf2 (tmpf, arg)); emit_insn (gen_trunctfdf2 (tmpf, arg));
...@@ -3039,7 +3039,7 @@ ...@@ -3039,7 +3039,7 @@
[(set_attr "type" "icmov")]) [(set_attr "type" "icmov")])
(define_expand "umaxdi3" (define_expand "umaxdi3"
[(set (match_dup 3) [(set (match_dup 3)
(leu:DI (match_operand:DI 1 "reg_or_0_operand" "") (leu:DI (match_operand:DI 1 "reg_or_0_operand" "")
(match_operand:DI 2 "reg_or_8bit_operand" ""))) (match_operand:DI 2 "reg_or_8bit_operand" "")))
(set (match_operand:DI 0 "register_operand" "") (set (match_operand:DI 0 "register_operand" "")
...@@ -3250,7 +3250,7 @@ ...@@ -3250,7 +3250,7 @@
(define_insn "*movdfcc_internal" (define_insn "*movdfcc_internal"
[(set (match_operand:DF 0 "register_operand" "=f,f") [(set (match_operand:DF 0 "register_operand" "=f,f")
(if_then_else:DF (if_then_else:DF
(match_operator 3 "signed_comparison_operator" (match_operator 3 "signed_comparison_operator"
[(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG") [(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG")
(match_operand:DF 2 "fp0_operand" "G,G")]) (match_operand:DF 2 "fp0_operand" "G,G")])
...@@ -3264,7 +3264,7 @@ ...@@ -3264,7 +3264,7 @@
(define_insn "*movsfcc_internal" (define_insn "*movsfcc_internal"
[(set (match_operand:SF 0 "register_operand" "=f,f") [(set (match_operand:SF 0 "register_operand" "=f,f")
(if_then_else:SF (if_then_else:SF
(match_operator 3 "signed_comparison_operator" (match_operator 3 "signed_comparison_operator"
[(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG") [(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG")
(match_operand:DF 2 "fp0_operand" "G,G")]) (match_operand:DF 2 "fp0_operand" "G,G")])
...@@ -3278,7 +3278,7 @@ ...@@ -3278,7 +3278,7 @@
(define_insn "*movdfcc_ext1" (define_insn "*movdfcc_ext1"
[(set (match_operand:DF 0 "register_operand" "=f,f") [(set (match_operand:DF 0 "register_operand" "=f,f")
(if_then_else:DF (if_then_else:DF
(match_operator 3 "signed_comparison_operator" (match_operator 3 "signed_comparison_operator"
[(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG") [(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG")
(match_operand:DF 2 "fp0_operand" "G,G")]) (match_operand:DF 2 "fp0_operand" "G,G")])
...@@ -3292,9 +3292,9 @@ ...@@ -3292,9 +3292,9 @@
(define_insn "*movdfcc_ext2" (define_insn "*movdfcc_ext2"
[(set (match_operand:DF 0 "register_operand" "=f,f") [(set (match_operand:DF 0 "register_operand" "=f,f")
(if_then_else:DF (if_then_else:DF
(match_operator 3 "signed_comparison_operator" (match_operator 3 "signed_comparison_operator"
[(float_extend:DF [(float_extend:DF
(match_operand:SF 4 "reg_or_fp0_operand" "fG,fG")) (match_operand:SF 4 "reg_or_fp0_operand" "fG,fG"))
(match_operand:DF 2 "fp0_operand" "G,G")]) (match_operand:DF 2 "fp0_operand" "G,G")])
(match_operand:DF 1 "reg_or_fp0_operand" "fG,0") (match_operand:DF 1 "reg_or_fp0_operand" "fG,0")
...@@ -3307,7 +3307,7 @@ ...@@ -3307,7 +3307,7 @@
(define_insn "*movdfcc_ext3" (define_insn "*movdfcc_ext3"
[(set (match_operand:SF 0 "register_operand" "=f,f") [(set (match_operand:SF 0 "register_operand" "=f,f")
(if_then_else:SF (if_then_else:SF
(match_operator 3 "signed_comparison_operator" (match_operator 3 "signed_comparison_operator"
[(float_extend:DF [(float_extend:DF
(match_operand:SF 4 "reg_or_fp0_operand" "fG,fG")) (match_operand:SF 4 "reg_or_fp0_operand" "fG,fG"))
...@@ -3322,7 +3322,7 @@ ...@@ -3322,7 +3322,7 @@
(define_insn "*movdfcc_ext4" (define_insn "*movdfcc_ext4"
[(set (match_operand:DF 0 "register_operand" "=f,f") [(set (match_operand:DF 0 "register_operand" "=f,f")
(if_then_else:DF (if_then_else:DF
(match_operator 3 "signed_comparison_operator" (match_operator 3 "signed_comparison_operator"
[(float_extend:DF [(float_extend:DF
(match_operand:SF 4 "reg_or_fp0_operand" "fG,fG")) (match_operand:SF 4 "reg_or_fp0_operand" "fG,fG"))
...@@ -3766,7 +3766,7 @@ ...@@ -3766,7 +3766,7 @@
&& ! (extended_count (operands[2], DImode, unsignedp) >= 1 && ! (extended_count (operands[2], DImode, unsignedp) >= 1
&& extended_count (operands[3], DImode, unsignedp) >= 1))) && extended_count (operands[3], DImode, unsignedp) >= 1)))
FAIL; FAIL;
if (GET_CODE (operands[3]) == CONST_INT) if (GET_CODE (operands[3]) == CONST_INT)
tem = gen_rtx_PLUS (SImode, operands[2], tem = gen_rtx_PLUS (SImode, operands[2],
GEN_INT (- INTVAL (operands[3]))); GEN_INT (- INTVAL (operands[3])));
...@@ -3842,7 +3842,7 @@ ...@@ -3842,7 +3842,7 @@
GEN_INT (- INTVAL (operands[3]))); GEN_INT (- INTVAL (operands[3])));
else else
tem = gen_rtx_MINUS (SImode, operands[2], operands[3]); tem = gen_rtx_MINUS (SImode, operands[2], operands[3]);
operands[5] = gen_rtx_SIGN_EXTEND (DImode, tem); operands[5] = gen_rtx_SIGN_EXTEND (DImode, tem);
operands[6] = gen_rtx_fmt_ee (GET_CODE (operands[1]), VOIDmode, operands[6] = gen_rtx_fmt_ee (GET_CODE (operands[1]), VOIDmode,
operands[4], const0_rtx); operands[4], const0_rtx);
...@@ -4082,9 +4082,9 @@ ...@@ -4082,9 +4082,9 @@
(use (match_operand 3 "" ""))] (use (match_operand 3 "" ""))]
"" ""
" "
{ if (TARGET_WINDOWS_NT) { if (TARGET_ABI_WINDOWS_NT)
emit_call_insn (gen_call_nt (operands[0], operands[1])); emit_call_insn (gen_call_nt (operands[0], operands[1]));
else if (TARGET_OPEN_VMS) else if (TARGET_ABI_OPEN_VMS)
emit_call_insn (gen_call_vms (operands[0], operands[2])); emit_call_insn (gen_call_vms (operands[0], operands[2]));
else else
emit_call_insn (gen_call_osf (operands[0], operands[1])); emit_call_insn (gen_call_osf (operands[0], operands[1]));
...@@ -4095,7 +4095,7 @@ ...@@ -4095,7 +4095,7 @@
(define_expand "sibcall" (define_expand "sibcall"
[(call (mem:DI (match_operand 0 "" "")) [(call (mem:DI (match_operand 0 "" ""))
(match_operand 1 "" ""))] (match_operand 1 "" ""))]
"!TARGET_OPEN_VMS && !TARGET_WINDOWS_NT" "TARGET_ABI_OSF"
" "
{ {
if (GET_CODE (operands[0]) != MEM) if (GET_CODE (operands[0]) != MEM)
...@@ -4187,9 +4187,10 @@ ...@@ -4187,9 +4187,10 @@
(use (match_operand 4 "" ""))] (use (match_operand 4 "" ""))]
"" ""
" "
{ if (TARGET_WINDOWS_NT) {
if (TARGET_ABI_WINDOWS_NT)
emit_call_insn (gen_call_value_nt (operands[0], operands[1], operands[2])); emit_call_insn (gen_call_value_nt (operands[0], operands[1], operands[2]));
else if (TARGET_OPEN_VMS) else if (TARGET_ABI_OPEN_VMS)
emit_call_insn (gen_call_value_vms (operands[0], operands[1], emit_call_insn (gen_call_value_vms (operands[0], operands[1],
operands[3])); operands[3]));
else else
...@@ -4202,7 +4203,7 @@ ...@@ -4202,7 +4203,7 @@
[(set (match_operand 0 "" "") [(set (match_operand 0 "" "")
(call (mem:DI (match_operand 1 "" "")) (call (mem:DI (match_operand 1 "" ""))
(match_operand 2 "" "")))] (match_operand 2 "" "")))]
"!TARGET_OPEN_VMS && !TARGET_WINDOWS_NT" "TARGET_ABI_OSF"
" "
{ {
if (GET_CODE (operands[1]) != MEM) if (GET_CODE (operands[1]) != MEM)
...@@ -4288,32 +4289,31 @@ ...@@ -4288,32 +4289,31 @@
(match_operand 1 "" "")) (match_operand 1 "" ""))
(clobber (reg:DI 27)) (clobber (reg:DI 27))
(clobber (reg:DI 26))] (clobber (reg:DI 26))]
"! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS "TARGET_ABI_OSF && find_reg_note (insn, REG_NORETURN, NULL_RTX)"
&& find_reg_note (insn, REG_NORETURN, NULL_RTX)"
"@ "@
jsr $26,($27),0 jsr $26,($27),0
bsr $26,$%0..ng bsr $26,$%0..ng
jsr $26,%0" jsr $26,%0"
[(set_attr "type" "jsr") [(set_attr "type" "jsr")
(set_attr "length" "*,*,8")]) (set_attr "length" "*,*,8")])
(define_insn "*call_osf_1" (define_insn "*call_osf_1"
[(call (mem:DI (match_operand:DI 0 "call_operand" "c,R,i")) [(call (mem:DI (match_operand:DI 0 "call_operand" "c,R,i"))
(match_operand 1 "" "")) (match_operand 1 "" ""))
(clobber (reg:DI 27)) (clobber (reg:DI 27))
(clobber (reg:DI 26))] (clobber (reg:DI 26))]
"! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS" "TARGET_ABI_OSF"
"@ "@
jsr $26,($27),0\;ldgp $29,0($26) jsr $26,($27),0\;ldgp $29,0($26)
bsr $26,$%0..ng bsr $26,$%0..ng
jsr $26,%0\;ldgp $29,0($26)" jsr $26,%0\;ldgp $29,0($26)"
[(set_attr "type" "jsr") [(set_attr "type" "jsr")
(set_attr "length" "12,*,16")]) (set_attr "length" "12,*,16")])
(define_insn "*sibcall_osf_1" (define_insn "*sibcall_osf_1"
[(call (mem:DI (match_operand:DI 0 "call_operand" "R,i")) [(call (mem:DI (match_operand:DI 0 "call_operand" "R,i"))
(match_operand 1 "" ""))] (match_operand 1 "" ""))]
"! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS" "TARGET_ABI_OSF"
"@ "@
br $31,$%0..ng br $31,$%0..ng
jmp $31,%0" jmp $31,%0"
...@@ -4324,14 +4324,14 @@ ...@@ -4324,14 +4324,14 @@
[(call (mem:DI (match_operand:DI 0 "call_operand" "r,R,i")) [(call (mem:DI (match_operand:DI 0 "call_operand" "r,R,i"))
(match_operand 1 "" "")) (match_operand 1 "" ""))
(clobber (reg:DI 26))] (clobber (reg:DI 26))]
"TARGET_WINDOWS_NT" "TARGET_ABI_WINDOWS_NT"
"@ "@
jsr $26,(%0) jsr $26,(%0)
bsr $26,%0 bsr $26,%0
jsr $26,%0" jsr $26,%0"
[(set_attr "type" "jsr") [(set_attr "type" "jsr")
(set_attr "length" "*,*,12")]) (set_attr "length" "*,*,12")])
(define_insn "*call_vms_1" (define_insn "*call_vms_1"
[(call (mem:DI (match_operand:DI 0 "call_operand" "r,i")) [(call (mem:DI (match_operand:DI 0 "call_operand" "r,i"))
(match_operand 1 "" "")) (match_operand 1 "" ""))
...@@ -4339,7 +4339,7 @@ ...@@ -4339,7 +4339,7 @@
(use (reg:DI 25)) (use (reg:DI 25))
(use (reg:DI 26)) (use (reg:DI 26))
(clobber (reg:DI 27))] (clobber (reg:DI 27))]
"TARGET_OPEN_VMS" "TARGET_ABI_OPEN_VMS"
"@ "@
mov %2,$27\;jsr $26,0\;ldq $27,0($29) mov %2,$27\;jsr $26,0\;ldq $27,0($29)
ldq $27,%2\;jsr $26,%0\;ldq $27,0($29)" ldq $27,%2\;jsr $26,%0\;ldq $27,0($29)"
...@@ -4414,9 +4414,9 @@ ...@@ -4414,9 +4414,9 @@
"" ""
" "
{ {
if (TARGET_WINDOWS_NT) if (TARGET_ABI_WINDOWS_NT)
emit_jump_insn (gen_tablejump_nt (operands[0], operands[1])); emit_jump_insn (gen_tablejump_nt (operands[0], operands[1]));
else if (TARGET_OPEN_VMS) else if (TARGET_ABI_OPEN_VMS)
emit_jump_insn (gen_tablejump_vms (operands[0], operands[1])); emit_jump_insn (gen_tablejump_vms (operands[0], operands[1]));
else else
emit_jump_insn (gen_tablejump_osf (operands[0], operands[1])); emit_jump_insn (gen_tablejump_osf (operands[0], operands[1]));
...@@ -4465,7 +4465,7 @@ ...@@ -4465,7 +4465,7 @@
(plus (match_operand:DI 0 "register_operand" "r") (plus (match_operand:DI 0 "register_operand" "r")
(label_ref (match_operand 1 "" "")))) (label_ref (match_operand 1 "" ""))))
(clobber (match_scratch:DI 2 "=r"))] (clobber (match_scratch:DI 2 "=r"))]
"! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS && next_active_insn (insn) != 0 "TARGET_ABI_OSF && next_active_insn (insn) != 0
&& GET_CODE (PATTERN (next_active_insn (insn))) == ADDR_DIFF_VEC && GET_CODE (PATTERN (next_active_insn (insn))) == ADDR_DIFF_VEC
&& PREV_INSN (next_active_insn (insn)) == operands[1]" && PREV_INSN (next_active_insn (insn)) == operands[1]"
"* "*
...@@ -4509,7 +4509,7 @@ ...@@ -4509,7 +4509,7 @@
[(set (pc) [(set (pc)
(match_operand:DI 0 "register_operand" "r")) (match_operand:DI 0 "register_operand" "r"))
(use (label_ref (match_operand 1 "" "")))] (use (label_ref (match_operand 1 "" "")))]
"TARGET_WINDOWS_NT && next_active_insn (insn) != 0 "TARGET_ABI_WINDOWS_NT && next_active_insn (insn) != 0
&& GET_CODE (PATTERN (next_active_insn (insn))) == ADDR_DIFF_VEC && GET_CODE (PATTERN (next_active_insn (insn))) == ADDR_DIFF_VEC
&& PREV_INSN (next_active_insn (insn)) == operands[1]" && PREV_INSN (next_active_insn (insn)) == operands[1]"
"* "*
...@@ -4557,7 +4557,7 @@ ...@@ -4557,7 +4557,7 @@
[(set (pc) [(set (pc)
(plus (match_operand:DI 0 "register_operand" "r") (plus (match_operand:DI 0 "register_operand" "r")
(label_ref (match_operand 1 "" ""))))] (label_ref (match_operand 1 "" ""))))]
"TARGET_OPEN_VMS" "TARGET_ABI_OPEN_VMS"
"jmp $31,(%0),0" "jmp $31,(%0),0"
[(set_attr "type" "ibr")]) [(set_attr "type" "ibr")])
...@@ -4724,7 +4724,7 @@ ...@@ -4724,7 +4724,7 @@
(define_insn "*movsi_nofix" (define_insn "*movsi_nofix"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,m,*f,*f,m") [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,m,*f,*f,m")
(match_operand:SI 1 "input_operand" "rJ,K,L,m,rJ,*fJ,m,*f"))] (match_operand:SI 1 "input_operand" "rJ,K,L,m,rJ,*fJ,m,*f"))]
"! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS && ! TARGET_FIX "TARGET_ABI_OSF && ! TARGET_FIX
&& (register_operand (operands[0], SImode) && (register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))" || reg_or_0_operand (operands[1], SImode))"
"@ "@
...@@ -4741,7 +4741,7 @@ ...@@ -4741,7 +4741,7 @@
(define_insn "*movsi_fix" (define_insn "*movsi_fix"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,m,*f,*f,m,r,*f") [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,m,*f,*f,m,r,*f")
(match_operand:SI 1 "input_operand" "rJ,K,L,m,rJ,*fJ,m,*f,*f,r"))] (match_operand:SI 1 "input_operand" "rJ,K,L,m,rJ,*fJ,m,*f,*f,r"))]
"! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS && TARGET_FIX "TARGET_ABI_OSF && TARGET_FIX
&& (register_operand (operands[0], SImode) && (register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))" || reg_or_0_operand (operands[1], SImode))"
"@ "@
...@@ -4760,7 +4760,7 @@ ...@@ -4760,7 +4760,7 @@
(define_insn "*movsi_nt_vms" (define_insn "*movsi_nt_vms"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,m,*f,*f,m") [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,m,*f,*f,m")
(match_operand:SI 1 "input_operand" "rJ,K,L,s,m,rJ,*fJ,m,*f"))] (match_operand:SI 1 "input_operand" "rJ,K,L,s,m,rJ,*fJ,m,*f"))]
"(TARGET_WINDOWS_NT || TARGET_OPEN_VMS) "(TARGET_ABI_WINDOWS_NT || TARGET_ABI_OPEN_VMS)
&& (register_operand (operands[0], SImode) && (register_operand (operands[0], SImode)
|| reg_or_0_operand (operands[1], SImode))" || reg_or_0_operand (operands[1], SImode))"
"@ "@
...@@ -4953,7 +4953,7 @@ ...@@ -4953,7 +4953,7 @@
} }
else else
abort(); abort();
tem = alpha_emit_set_long_const (operands[0], i0, i1); tem = alpha_emit_set_long_const (operands[0], i0, i1);
if (rtx_equal_p (tem, operands[0])) if (rtx_equal_p (tem, operands[0]))
DONE; DONE;
...@@ -5012,10 +5012,10 @@ ...@@ -5012,10 +5012,10 @@
(zero_extract:DI (subreg:DI (match_dup 3) 0) (zero_extract:DI (subreg:DI (match_dup 3) 0)
(const_int 8) (const_int 8)
(match_operand:DI 2 "const_int_operand" "")))] (match_operand:DI 2 "const_int_operand" "")))]
"" ""
"") "")
(define_expand "aligned_loadhi" (define_expand "aligned_loadhi"
[(set (match_operand:SI 3 "register_operand" "") [(set (match_operand:SI 3 "register_operand" "")
(match_operand:SI 1 "memory_operand" "")) (match_operand:SI 1 "memory_operand" ""))
...@@ -5023,10 +5023,10 @@ ...@@ -5023,10 +5023,10 @@
(zero_extract:DI (subreg:DI (match_dup 3) 0) (zero_extract:DI (subreg:DI (match_dup 3) 0)
(const_int 16) (const_int 16)
(match_operand:DI 2 "const_int_operand" "")))] (match_operand:DI 2 "const_int_operand" "")))]
"" ""
"") "")
;; Similar for unaligned loads, where we use the sequence from the ;; Similar for unaligned loads, where we use the sequence from the
;; Alpha Architecture manual. ;; Alpha Architecture manual.
;; ;;
...@@ -5060,7 +5060,7 @@ ...@@ -5060,7 +5060,7 @@
"") "")
;; Storing an aligned byte or word requires two temporaries. Operand 0 is the ;; Storing an aligned byte or word requires two temporaries. Operand 0 is the
;; aligned SImode MEM. Operand 1 is the register containing the ;; aligned SImode MEM. Operand 1 is the register containing the
;; byte or word to store. Operand 2 is the number of bits within the word that ;; byte or word to store. Operand 2 is the number of bits within the word that
;; the value should be placed. Operands 3 and 4 are SImode temporaries. ;; the value should be placed. Operands 3 and 4 are SImode temporaries.
...@@ -5212,7 +5212,7 @@ ...@@ -5212,7 +5212,7 @@
} }
else if (GET_CODE (operands[0]) == MEM else if (GET_CODE (operands[0]) == MEM
|| (GET_CODE (operands[0]) == SUBREG || (GET_CODE (operands[0]) == SUBREG
&& GET_CODE (SUBREG_REG (operands[0])) == MEM) && GET_CODE (SUBREG_REG (operands[0])) == MEM)
|| (reload_in_progress && GET_CODE (operands[0]) == REG || (reload_in_progress && GET_CODE (operands[0]) == REG
&& REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER) && REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER)
...@@ -5330,7 +5330,7 @@ ...@@ -5330,7 +5330,7 @@
} }
else if (GET_CODE (operands[0]) == MEM else if (GET_CODE (operands[0]) == MEM
|| (GET_CODE (operands[0]) == SUBREG || (GET_CODE (operands[0]) == SUBREG
&& GET_CODE (SUBREG_REG (operands[0])) == MEM) && GET_CODE (SUBREG_REG (operands[0])) == MEM)
|| (reload_in_progress && GET_CODE (operands[0]) == REG || (reload_in_progress && GET_CODE (operands[0]) == REG
&& REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER) && REGNO (operands[0]) >= FIRST_PSEUDO_REGISTER)
...@@ -5423,7 +5423,7 @@ ...@@ -5423,7 +5423,7 @@
if (aligned_memory_operand (operands[1], HImode)) if (aligned_memory_operand (operands[1], HImode))
{ {
seq = gen_reload_inhi_help (operands[0], operands[1], seq = gen_reload_inhi_help (operands[0], operands[1],
gen_rtx_REG (SImode, REGNO (operands[2]))); gen_rtx_REG (SImode, REGNO (operands[2])));
} }
else else
...@@ -5567,7 +5567,7 @@ ...@@ -5567,7 +5567,7 @@
operands[2])); operands[2]));
DONE; DONE;
}") }")
(define_split (define_split
[(set (match_operand:HI 0 "register_operand" "") [(set (match_operand:HI 0 "register_operand" "")
(match_operand:HI 1 "memory_operand" "")) (match_operand:HI 1 "memory_operand" ""))
...@@ -5582,7 +5582,7 @@ ...@@ -5582,7 +5582,7 @@
operands[2])); operands[2]));
DONE; DONE;
}") }")
(define_split (define_split
[(set (match_operand:QI 0 "memory_operand" "") [(set (match_operand:QI 0 "memory_operand" "")
(match_operand:QI 1 "register_operand" "")) (match_operand:QI 1 "register_operand" ""))
...@@ -5750,7 +5750,7 @@ ...@@ -5750,7 +5750,7 @@
;; bytes, we need do nothing. ;; bytes, we need do nothing.
;; ;;
;; If it is more than 4096 bytes, we need to probe the stack ;; If it is more than 4096 bytes, we need to probe the stack
;; periodically. ;; periodically.
(define_expand "allocate_stack" (define_expand "allocate_stack"
[(set (reg:DI 30) [(set (reg:DI 30)
(plus:DI (reg:DI 30) (plus:DI (reg:DI 30)
...@@ -5901,7 +5901,7 @@ ...@@ -5901,7 +5901,7 @@
(define_expand "sibcall_epilogue" (define_expand "sibcall_epilogue"
[(return)] [(return)]
"!TARGET_OPEN_VMS && !TARGET_WINDOWS_NT" "TARGET_ABI_OSF"
" "
{ {
alpha_expand_epilogue (); alpha_expand_epilogue ();
...@@ -5921,7 +5921,7 @@ ...@@ -5921,7 +5921,7 @@
(define_expand "builtin_longjmp" (define_expand "builtin_longjmp"
[(use (match_operand:DI 0 "register_operand" "r"))] [(use (match_operand:DI 0 "register_operand" "r"))]
"! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT" "TARGET_ABI_OSF"
" "
{ {
/* The elements of the buffer are, in order: */ /* The elements of the buffer are, in order: */
...@@ -5957,21 +5957,21 @@ ...@@ -5957,21 +5957,21 @@
(define_insn "*builtin_setjmp_receiver_sub_label" (define_insn "*builtin_setjmp_receiver_sub_label"
[(unspec_volatile [(label_ref (match_operand 0 "" ""))] UNSPECV_SETJMPR)] [(unspec_volatile [(label_ref (match_operand 0 "" ""))] UNSPECV_SETJMPR)]
"! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT && TARGET_AS_CAN_SUBTRACT_LABELS" "TARGET_ABI_OSF && TARGET_AS_CAN_SUBTRACT_LABELS"
"\\n$LSJ%=:\;ldgp $29,$LSJ%=-%l0($27)" "\\n$LSJ%=:\;ldgp $29,$LSJ%=-%l0($27)"
[(set_attr "length" "8") [(set_attr "length" "8")
(set_attr "type" "multi")]) (set_attr "type" "multi")])
(define_insn "builtin_setjmp_receiver" (define_insn "builtin_setjmp_receiver"
[(unspec_volatile [(label_ref (match_operand 0 "" ""))] UNSPECV_SETJMPR)] [(unspec_volatile [(label_ref (match_operand 0 "" ""))] UNSPECV_SETJMPR)]
"! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT" "TARGET_ABI_OSF"
"br $29,$LSJ%=\\n$LSJ%=:\;ldgp $29,0($29)" "br $29,$LSJ%=\\n$LSJ%=:\;ldgp $29,0($29)"
[(set_attr "length" "12") [(set_attr "length" "12")
(set_attr "type" "multi")]) (set_attr "type" "multi")])
(define_expand "exception_receiver" (define_expand "exception_receiver"
[(unspec_volatile [(match_dup 0)] UNSPECV_EHR)] [(unspec_volatile [(match_dup 0)] UNSPECV_EHR)]
"! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT" "TARGET_ABI_OSF"
" "
{ {
if (TARGET_LD_BUGGY_LDGP) if (TARGET_LD_BUGGY_LDGP)
...@@ -6005,7 +6005,7 @@ ...@@ -6005,7 +6005,7 @@
(set (reg:DI 27) (mem:DI (reg:DI 29))) (set (reg:DI 27) (mem:DI (reg:DI 29)))
(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE) (unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)
(use (reg:DI 27))] (use (reg:DI 27))]
"TARGET_OPEN_VMS" "TARGET_ABI_OPEN_VMS"
"") "")
(define_insn "arg_home" (define_insn "arg_home"
...@@ -6028,7 +6028,7 @@ ...@@ -6028,7 +6028,7 @@
(clobber (reg:DI 24)) (clobber (reg:DI 24))
(clobber (reg:DI 25)) (clobber (reg:DI 25))
(clobber (reg:DI 0))] (clobber (reg:DI 0))]
"TARGET_OPEN_VMS" "TARGET_ABI_OPEN_VMS"
"lda $0,OTS$HOME_ARGS\;ldq $0,8($0)\;jsr $0,OTS$HOME_ARGS" "lda $0,OTS$HOME_ARGS\;ldq $0,8($0)\;jsr $0,OTS$HOME_ARGS"
[(set_attr "length" "16") [(set_attr "length" "16")
(set_attr "type" "multi")]) (set_attr "type" "multi")])
...@@ -6077,7 +6077,7 @@ ...@@ -6077,7 +6077,7 @@
(match_operand 2 "" ""))) (match_operand 2 "" "")))
(clobber (reg:DI 27)) (clobber (reg:DI 27))
(clobber (reg:DI 26))] (clobber (reg:DI 26))]
"! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS" "TARGET_ABI_OSF"
"@ "@
jsr $26,($27),0\;ldgp $29,0($26) jsr $26,($27),0\;ldgp $29,0($26)
bsr $26,$%1..ng bsr $26,$%1..ng
...@@ -6089,7 +6089,7 @@ ...@@ -6089,7 +6089,7 @@
[(set (match_operand 0 "" "") [(set (match_operand 0 "" "")
(call (mem:DI (match_operand:DI 1 "call_operand" "R,i")) (call (mem:DI (match_operand:DI 1 "call_operand" "R,i"))
(match_operand 2 "" "")))] (match_operand 2 "" "")))]
"! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS" "TARGET_ABI_OSF"
"@ "@
br $31,$%1..ng br $31,$%1..ng
jmp $31,%1" jmp $31,%1"
...@@ -6101,7 +6101,7 @@ ...@@ -6101,7 +6101,7 @@
(call (mem:DI (match_operand:DI 1 "call_operand" "r,R,i")) (call (mem:DI (match_operand:DI 1 "call_operand" "r,R,i"))
(match_operand 2 "" ""))) (match_operand 2 "" "")))
(clobber (reg:DI 26))] (clobber (reg:DI 26))]
"TARGET_WINDOWS_NT" "TARGET_ABI_WINDOWS_NT"
"@ "@
jsr $26,(%1) jsr $26,(%1)
bsr $26,%1 bsr $26,%1
...@@ -6117,7 +6117,7 @@ ...@@ -6117,7 +6117,7 @@
(use (reg:DI 25)) (use (reg:DI 25))
(use (reg:DI 26)) (use (reg:DI 26))
(clobber (reg:DI 27))] (clobber (reg:DI 27))]
"TARGET_OPEN_VMS" "TARGET_ABI_OPEN_VMS"
"@ "@
mov %3,$27\;jsr $26,0\;ldq $27,0($29) mov %3,$27\;jsr $26,0\;ldq $27,0($29)
ldq $27,%3\;jsr $26,%1\;ldq $27,0($29)" ldq $27,%3\;jsr $26,%1\;ldq $27,0($29)"
......
gcc/config/alpha/alpha32.h
...@@ -30,8 +30,8 @@ along with GNU CC; see the file COPYING. If not, write to ...@@ -30,8 +30,8 @@ along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330, the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */ Boston, MA 02111-1307, USA. */
#undef TARGET_WINDOWS_NT #undef TARGET_ABI_WINDOWS_NT
#define TARGET_WINDOWS_NT 1 #define TARGET_ABI_WINDOWS_NT 1
/* WinNT (and thus Interix) use unsigned int */ /* WinNT (and thus Interix) use unsigned int */
#define SIZE_TYPE "unsigned int" #define SIZE_TYPE "unsigned int"
......
gcc/config/alpha/vms.h
...@@ -18,8 +18,6 @@ along with GNU CC; see the file COPYING. If not, write to ...@@ -18,8 +18,6 @@ along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330, the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */ Boston, MA 02111-1307, USA. */
#define OPEN_VMS 1
#define TARGET_OBJECT_SUFFIX ".obj" #define TARGET_OBJECT_SUFFIX ".obj"
#define TARGET_EXECUTABLE_SUFFIX ".exe" #define TARGET_EXECUTABLE_SUFFIX ".exe"
...@@ -69,8 +67,8 @@ Boston, MA 02111-1307, USA. */ ...@@ -69,8 +67,8 @@ Boston, MA 02111-1307, USA. */
#undef TARGET_DEFAULT #undef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_FP|MASK_FPREGS|MASK_GAS) #define TARGET_DEFAULT (MASK_FP|MASK_FPREGS|MASK_GAS)
#undef TARGET_OPEN_VMS #undef TARGET_ABI_OPEN_VMS
#define TARGET_OPEN_VMS 1 #define TARGET_ABI_OPEN_VMS 1
#undef TARGET_NAME #undef TARGET_NAME
#define TARGET_NAME "OpenVMS/Alpha" #define TARGET_NAME "OpenVMS/Alpha"
......
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