alpha.md (addsi3, subsi3): Revise 5 Nov change to store DImode value in…

alpha.md (addsi3, subsi3): Revise 5 Nov change to store DImode value in paradoxical SImode result...

        * alpha.md (addsi3, subsi3): Revise 5 Nov change to store DImode
        value in paradoxical SImode result, rather than truncating midpoint.

From-SVN: r23655

gcc/ChangeLog

+Sat Nov 14 15:05:07 1998  Richard Henderson  <rth@cygnus.com>
+
+	* alpha.md (addsi3, subsi3): Revise 5 Nov change to store DImode
+	value in paradoxical SImode result, rather than truncating midpoint.
+
 Fri Nov 13 22:19:23 1998  Richard Henderson  <rth@cygnus.com>
 
 	* alpha.c (reg_not_elim_operand): New.

gcc/config/alpha/alpha.md

@@ -427,6 +427,8 @@
   ""
   "
 {
+  if (optimize)
+    {
       rtx op1 = gen_lowpart (DImode, operands[1]);
       rtx op2 = gen_lowpart (DImode, operands[2]);
 
@@ -434,12 +436,13 @@
         {
           rtx tmp = gen_reg_rtx (DImode);
           emit_insn (gen_adddi3 (tmp, op1, op2));
-      emit_move_insn (operands[0], gen_lowpart (SImode, tmp));
+          emit_move_insn (gen_lowpart (DImode, operands[0]), tmp);
         }
       else
         emit_insn (gen_adddi3 (gen_lowpart (DImode, operands[0]), op1, op2));
       DONE;
-} ")
+    }
+}")
 
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=r,r,r,r")
@@ -719,6 +722,8 @@
   ""
   "
 {
+  if (optimize)
+    {
       rtx op1 = gen_lowpart (DImode, operands[1]);
       rtx op2 = gen_lowpart (DImode, operands[2]);
 
@@ -726,11 +731,12 @@
         {
           rtx tmp = gen_reg_rtx (DImode);
           emit_insn (gen_subdi3 (tmp, op1, op2));
-      emit_move_insn (operands[0], gen_lowpart (SImode, tmp));
+          emit_move_insn (gen_lowpart (DImode, operands[0]), tmp);
         }
       else
         emit_insn (gen_subdi3 (gen_lowpart (DImode, operands[0]), op1, op2));
       DONE;
+    }
 } ")
 
 (define_insn ""