Commit bcead286 by Bernd Schmidt Committed by Bernd Schmidt

invoke.texi (C6X Options): New section.

gcc/
	* doc/invoke.texi (C6X Options): New section.
	* doc/md.texi (TI C6X family): New section.
	* config.gcc: Handle tic6x, in particular tic6x-*-elf and
	tic6x-*-uclinux.
	* longlong.h (add_ssaaaa, __umulsidi3, umul_ppmm,
	count_leading_zeros, count_trailing_zeros, UMUL_TIME, UDIV_TIME):
	Provide C6X definitions.
	* config/c6x/c6x.md: New file.
	* config/c6x/constraints.md: New file.
	* config/c6x/predicates.md: New file.
	* config/c6x/c6x-sched.md.in: New file.
	* config/c6x/c6x-sched.md: New file.
	* config/c6x/gensched.sh: New file.
	* config/c6x/c6x-mult.md.in: New file.
	* config/c6x/genmult.sh: New file.
	* config/c6x/c6x-mult.md: New file.
	* config/c6x/sync.md: New file.
	* config/c6x/c6x-protos.h: New file.
	* config/c6x/sfp-machine.h: New file.
	* config/c6x/c6x.c: New file.
	* config/c6x/c6x.h: New file.
	* config/c6x/crti.s: New file.
	* config/c6x/crtn.s: New file.
	* config/c6x/lib1funcs.asm: New file.
	* config/c6x/c6x-modes.def: New file.
	* config/c6x/genopt.sh: New file.
	* config/c6x/c6x.opt: New file.
	* config/c6x/c6x-tables.opt: New file.
	* config/c6x/c6x-opts.h: New file.
	* config/c6x/c6x-isas.def: New file.
	* config/c6x/elf.h: New file.
	* config/c6x/elf-common.h: New file.
	* config/c6x/uclinux-elf.h: New file.
	* config/c6x/t-c6x: New file.
	* config/c6x/t-c6x-elf: New file.
	* config/c6x/t-c6x-uclinux: New file.
	* config/c6x/t-c6x-softfp: New file.
	* config/c6x/gtd.c: New file.
	* config/c6x/gtf.c: New file.
	* config/c6x/ltd.c: New file.
	* config/c6x/ltf.c: New file.
	* config/c6x/ged.c: New file.
	* config/c6x/gef.c: New file.
	* config/c6x/led.c: New file.
	* config/c6x/lef.c: New file.
	* config/c6x/eqd.c: New file.
	* config/c6x/eqf.c: New file.
	* config/c6x/libgcc-c6xeabi.ver: New file.

contrib/
	* gcc_update: Add C6X generated files.
	* contrib/config-list.mk: Add c6x-elf and c6x-uclinux.

libgcc/
	* config.host: Handle tic6x-*-*.
	* config/c6x/c6x-abi.h: New file.

From-SVN: r176308
parent 9e36aa23
2011-07-15 Bernd Schmidt <bernds@codesourcery.com>
* gcc_update: Add C6X generated files.
* contrib/config-list.mk: Add c6x-elf and c6x-uclinux.
2011-07-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> 2011-07-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* config-list.mk (LIST): Append OPT-enable-obsolete to * config-list.mk (LIST): Append OPT-enable-obsolete to
......
...@@ -18,7 +18,7 @@ LIST = alpha-linux-gnu alpha-freebsd6 alpha-netbsd alpha-openbsd \ ...@@ -18,7 +18,7 @@ LIST = alpha-linux-gnu alpha-freebsd6 alpha-netbsd alpha-openbsd \
arm-linux-androideabi arm-uclinux_eabi arm-ecos-elf arm-eabi \ arm-linux-androideabi arm-uclinux_eabi arm-ecos-elf arm-eabi \
arm-symbianelf arm-rtems arm-elf arm-wince-pe avr-rtems avr-elf \ arm-symbianelf arm-rtems arm-elf arm-wince-pe avr-rtems avr-elf \
bfin-elf bfin-uclinux bfin-linux-uclibc bfin-rtems bfin-openbsd \ bfin-elf bfin-uclinux bfin-linux-uclibc bfin-rtems bfin-openbsd \
cris-elf cris-linux crisv32-elf crisv32-linux fido-elf \ c6x-elf c6x-uclinux cris-elf cris-linux crisv32-elf crisv32-linux fido-elf \
fr30-elf frv-elf frv-linux h8300-elf h8300-rtems hppa-linux-gnu \ fr30-elf frv-elf frv-linux h8300-elf h8300-rtems hppa-linux-gnu \
hppa-linux-gnuOPT-enable-sjlj-exceptions=yes hppa64-linux-gnu \ hppa-linux-gnuOPT-enable-sjlj-exceptions=yes hppa64-linux-gnu \
hppa2.0-hpux10.1 hppa64-hpux11.3 \ hppa2.0-hpux10.1 hppa64-hpux11.3 \
......
...@@ -82,6 +82,9 @@ gcc/fixinc/fixincl.x: gcc/fixinc/fixincl.tpl gcc/fixinc/inclhack.def ...@@ -82,6 +82,9 @@ gcc/fixinc/fixincl.x: gcc/fixinc/fixincl.tpl gcc/fixinc/inclhack.def
gcc/config/arm/arm-tune.md: gcc/config/arm/arm-cores.def gcc/config/arm/gentune.sh gcc/config/arm/arm-tune.md: gcc/config/arm/arm-cores.def gcc/config/arm/gentune.sh
gcc/config/arm/arm-tables.opt: gcc/config/arm/arm-arches.def gcc/config/arm/arm-cores.def gcc/config/arm/arm-fpus.def gcc/config/arm/genopt.sh gcc/config/arm/arm-tables.opt: gcc/config/arm/arm-arches.def gcc/config/arm/arm-cores.def gcc/config/arm/arm-fpus.def gcc/config/arm/genopt.sh
gcc/config/avr/avr-tables.opt: gcc/config/avr/avr-mcus.def gcc/config/avr/genopt.sh gcc/config/avr/avr-tables.opt: gcc/config/avr/avr-mcus.def gcc/config/avr/genopt.sh
gcc/config/c6x/c6x-tables.opt: gcc/config/c6x/c6x-isas.def gcc/config/c6x/genopt.sh
gcc/config/c6x/c6x-sched.md: gcc/config/c6x/c6x-sched.md.in gcc/config/c6x/gensched.sh
gcc/config/c6x/c6x-mult.md: gcc/config/c6x/c6x-mult.md.in gcc/config/c6x/genmult.sh
gcc/config/m68k/m68k-tables.opt: gcc/config/m68k/m68k-devices.def gcc/config/m68k/m68k-isas.def gcc/config/m68k/m68k-microarchs.def gcc/config/m68k/genopt.sh gcc/config/m68k/m68k-tables.opt: gcc/config/m68k/m68k-devices.def gcc/config/m68k/m68k-isas.def gcc/config/m68k/m68k-microarchs.def gcc/config/m68k/genopt.sh
gcc/config/mips/mips-tables.opt: gcc/config/mips/mips-cpus.def gcc/config/mips/genopt.sh gcc/config/mips/mips-tables.opt: gcc/config/mips/mips-cpus.def gcc/config/mips/genopt.sh
gcc/config/rs6000/rs6000-tables.opt: gcc/config/rs6000/rs6000-cpus.def gcc/config/rs6000/genopt.sh gcc/config/rs6000/rs6000-tables.opt: gcc/config/rs6000/rs6000-cpus.def gcc/config/rs6000/genopt.sh
......
2011-07-15 Bernd Schmidt <bernds@codesourcery.com>
* doc/invoke.texi (C6X Options): New section.
* doc/md.texi (TI C6X family): New section.
* config.gcc: Handle tic6x, in particular tic6x-*-elf and
tic6x-*-uclinux.
* longlong.h (add_ssaaaa, __umulsidi3, umul_ppmm,
count_leading_zeros, count_trailing_zeros, UMUL_TIME, UDIV_TIME):
Provide C6X definitions.
* config/c6x/c6x.md: New file.
* config/c6x/constraints.md: New file.
* config/c6x/predicates.md: New file.
* config/c6x/c6x-sched.md.in: New file.
* config/c6x/c6x-sched.md: New file.
* config/c6x/gensched.sh: New file.
* config/c6x/c6x-mult.md.in: New file.
* config/c6x/genmult.sh: New file.
* config/c6x/c6x-mult.md: New file.
* config/c6x/sync.md: New file.
* config/c6x/c6x-protos.h: New file.
* config/c6x/sfp-machine.h: New file.
* config/c6x/c6x.c: New file.
* config/c6x/c6x.h: New file.
* config/c6x/crti.s: New file.
* config/c6x/crtn.s: New file.
* config/c6x/lib1funcs.asm: New file.
* config/c6x/c6x-modes.def: New file.
* config/c6x/genopt.sh: New file.
* config/c6x/c6x.opt: New file.
* config/c6x/c6x-tables.opt: New file.
* config/c6x/c6x-opts.h: New file.
* config/c6x/c6x-isas.def: New file.
* config/c6x/elf.h: New file.
* config/c6x/elf-common.h: New file.
* config/c6x/uclinux-elf.h: New file.
* config/c6x/t-c6x: New file.
* config/c6x/t-c6x-elf: New file.
* config/c6x/t-c6x-uclinux: New file.
* config/c6x/t-c6x-softfp: New file.
* config/c6x/gtd.c: New file.
* config/c6x/gtf.c: New file.
* config/c6x/ltd.c: New file.
* config/c6x/ltf.c: New file.
* config/c6x/ged.c: New file.
* config/c6x/gef.c: New file.
* config/c6x/led.c: New file.
* config/c6x/lef.c: New file.
* config/c6x/eqd.c: New file.
* config/c6x/eqf.c: New file.
* config/c6x/libgcc-c6xeabi.ver: New file.
2011-07-14 Andrew Pinski <pinskia@gmail.com> 2011-07-14 Andrew Pinski <pinskia@gmail.com>
PR tree-opt/49309 PR tree-opt/49309
......
...@@ -437,6 +437,11 @@ sh[123456789lbe]*-*-* | sh-*-*) ...@@ -437,6 +437,11 @@ sh[123456789lbe]*-*-* | sh-*-*)
v850*-*-*) v850*-*-*)
cpu_type=v850 cpu_type=v850
;; ;;
tic6x-*-*)
cpu_type=c6x
extra_headers="c6x_intrinsics.h"
extra_options="${extra_options} c6x/c6x-tables.opt"
;;
xtensa*-*-*) xtensa*-*-*)
extra_options="${extra_options} fused-madd.opt" extra_options="${extra_options} fused-madd.opt"
;; ;;
...@@ -2561,7 +2566,24 @@ spu-*-elf*) ...@@ -2561,7 +2566,24 @@ spu-*-elf*)
c_target_objs="${c_target_objs} spu-c.o" c_target_objs="${c_target_objs} spu-c.o"
cxx_target_objs="${cxx_target_objs} spu-c.o" cxx_target_objs="${cxx_target_objs} spu-c.o"
;; ;;
tic6x-*-elf)
tm_file="elfos.h ${tm_file} c6x/elf-common.h c6x/elf.h"
tm_file="${tm_file} dbxelf.h tm-dwarf2.h newlib-stdint.h"
libgcc_tm_file="${libgcc_tm_file} c6x/c6x-abi.h"
tmake_file="c6x/t-c6x c6x/t-c6x-elf"
tmake_file="${tmake_file} c6x/t-c6x-softfp soft-fp/t-softfp"
use_collect2=no
;;
tic6x-*-uclinux)
tm_file="elfos.h ${tm_file} gnu-user.h linux.h c6x/elf-common.h c6x/uclinux-elf.h"
tm_file="${tm_file} dbxelf.h tm-dwarf2.h glibc-stdint.h"
tm_file="${tm_file} ./sysroot-suffix.h"
libgcc_tm_file="${libgcc_tm_file} c6x/c6x-abi.h"
tmake_file="t-slibgcc-elf-ver t-sysroot-suffix"
tmake_file="${tmake_file} c6x/t-c6x c6x/t-c6x-elf c6x/t-c6x-uclinux"
tmake_file="${tmake_file} c6x/t-c6x-softfp soft-fp/t-softfp"
use_collect2=no
;;
v850*-*-*) v850*-*-*)
case ${target} in case ${target} in
v850e2v3-*-*) v850e2v3-*-*)
...@@ -3500,6 +3522,20 @@ case "${target}" in ...@@ -3500,6 +3522,20 @@ case "${target}" in
done done
;; ;;
tic6x-*-*)
supported_defaults="arch"
case ${with_arch} in
"" | c62x | c64x | c64x+ | c67x | c67x+ | c674x)
# OK
;;
*)
echo "Unknown arch used in --with-arch=$with_arch." 1>&2
exit 1
;;
esac
;;
v850*-*-*) v850*-*-*)
supported_defaults=cpu supported_defaults=cpu
case ${with_cpu} in case ${with_cpu} in
......
/* C6X ISA names.
Copyright (C) 2011
Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* Define ISAs for the -march option, used both in C6X.c and to
generate c6x-tables.opt. Before including this file, define a
macro:
C6X_ISA (NAME, ENUM_VALUE, FLAGS)
where NAME is the name for use with -march=, ENUM_VALUE is an enum
corresponding to this arch, and FLAGS is a combination of flags
that together specify the available instructions. */
C6X_ISA("c62x", C6X_CPU_C62X, C6X_INSNS_C62X)
C6X_ISA("c64x", C6X_CPU_C64X, C6X_INSNS_C62X | C6X_INSNS_C64X)
C6X_ISA("c64x+", C6X_CPU_C64XP, C6X_INSNS_C62X | C6X_INSNS_C64X | C6X_INSNS_C64XP)
C6X_ISA("c67x", C6X_CPU_C67X, C6X_INSNS_C62X | C6X_INSNS_C67X)
C6X_ISA("c67x+", C6X_CPU_C67XP, C6X_INSNS_C62X | C6X_INSNS_C67X | C6X_INSNS_C67XP)
C6X_ISA("c674x", C6X_CPU_C674X,
(C6X_INSNS_C62X | C6X_INSNS_C64X | C6X_INSNS_C64XP | C6X_INSNS_C67X
| C6X_INSNS_C67XP | C6X_INSNS_C674X))
/* Definitions of target machine for GNU compiler, for TI C6x.
Copyright (C) 2010, 2011 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
VECTOR_MODES (INT, 4); /* V4QI V2HI */
VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI */
VECTOR_MODE (FRACT, SQ, 2); /* V2SQ. */
VECTOR_MODE (FRACT, HQ, 2); /* V2HQ. */
/* Definitions for option handling for TI C6X.
Copyright (C) 2011
Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifndef C6X_OPTS_H
#define C6X_OPTS_H
/* An enumeration of all supported target devices. */
typedef enum c6x_cpu_type
{
#define C6X_ISA(NAME,ENUM_VALUE,FLAGS) \
ENUM_VALUE,
#include "c6x-isas.def"
#undef C6X_ISA
unk_isa
} c6x_cpu_t;
enum c6x_sdata { C6X_SDATA_NONE, C6X_SDATA_DEFAULT, C6X_SDATA_ALL };
#endif
/* Prototypes for exported functions defined in c6x.c.
Copyright (C) 2010, 2011
Free Software Foundation, Inc.
Contributed by CodeSourcery.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifndef GCC_C6X_PROTOS_H
#define GCC_C6X_PROTOS_H
/* Functions defined in c6x.c. */
#ifdef RTX_CODE
extern void c6x_init_cumulative_args (CUMULATIVE_ARGS *, const_tree, rtx, int);
extern bool c6x_block_reg_pad_upward (enum machine_mode, const_tree, bool);
extern bool c6x_legitimate_address_p_1 (enum machine_mode, rtx, bool, bool);
extern bool c6x_mem_operand (rtx, enum reg_class, bool);
extern bool expand_move (rtx *, enum machine_mode);
extern bool c6x_long_call_p (rtx);
extern void c6x_expand_call (rtx, rtx, bool);
extern rtx c6x_expand_compare (rtx, enum machine_mode);
extern bool c6x_force_op_for_comparison_p (enum rtx_code, rtx);
extern bool c6x_expand_movmem (rtx, rtx, rtx, rtx, rtx, rtx);
extern rtx c6x_subword (rtx, bool);
extern void split_di (rtx *, int, rtx *, rtx *);
extern bool c6x_valid_mask_p (HOST_WIDE_INT);
extern char c6x_get_unit_specifier (rtx);
extern void c6x_final_prescan_insn(rtx insn, rtx *opvec, int noperands);
extern int c6x_nsaved_regs (void);
extern HOST_WIDE_INT c6x_initial_elimination_offset (int, int);
extern void c6x_expand_prologue (void);
extern void c6x_expand_epilogue (bool);
extern rtx c6x_return_addr_rtx (int);
extern void c6x_set_return_address (rtx, rtx);
#endif
extern void c6x_override_options (void);
extern void c6x_optimization_options (int, int);
extern void c6x_output_file_unwind (FILE *);
extern void c6x_function_end (FILE *, const char *);
#endif /* GCC_C6X_PROTOS_H */
;; Scheduling description for TI C6X.
;; Copyright (C) 2010, 2011 Free Software Foundation, Inc.
;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
;; Contributed by CodeSourcery.
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify
;; it under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful,
;; but WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;; GNU General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>.
;; Input file for gensched.sh We process this file multiple times,
;; replacing _N_ with either 1 or 2 for each of the sides of the
;; machine, and _RF_ correspondingly with "a" or "b". _CROSS_ and
;; _CUNIT_ are replaced with yes/no and the appropriate reservation.
(define_insn_reservation "load_d_N__CROSS_" 5
(and (eq_attr "type" "load")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "d_addr")
(eq_attr "addr_regfile" "_RF_"))))
"d_N_+t_NX_")
(define_insn_reservation "store_d_N__CROSS_" 1
(and (eq_attr "type" "store")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "d_addr")
(eq_attr "addr_regfile" "_RF_"))))
"d_N_+t_NX_")
(define_insn_reservation "loadn_d_N__CROSS_" 5
(and (eq_attr "type" "loadn")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "d_addr")
(eq_attr "addr_regfile" "_RF_"))))
"d_N_+t1+t2")
(define_insn_reservation "storen_d_N__CROSS_" 1
(and (eq_attr "type" "storen")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "d_addr")
(eq_attr "addr_regfile" "_RF_"))))
"d_N_+t1+t2")
(define_insn_reservation "single_d_N__CROSS_" 1
(and (eq_attr "type" "single")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "d")
(eq_attr "dest_regfile" "_RF_"))))
"d_N__CUNIT_")
(define_insn_reservation "single_l_N__CROSS_" 1
(and (eq_attr "type" "single")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "l")
(eq_attr "dest_regfile" "_RF_"))))
"l_N_+l_N_w_CUNIT_")
(define_insn_reservation "fp4_l_N__CROSS_" 4
(and (eq_attr "type" "fp4")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "l")
(eq_attr "dest_regfile" "_RF_"))))
"l_N__CUNIT_,nothing*2,l_N_w")
(define_insn_reservation "intdp_l_N__CROSS_" 5
(and (eq_attr "type" "intdp")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "l")
(eq_attr "dest_regfile" "_RF_"))))
"l_N__CUNIT_,nothing*2,l_N_w*2")
(define_insn_reservation "adddp_l_N__CROSS_" 7
(and (eq_attr "type" "adddp")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "l")
(eq_attr "dest_regfile" "_RF_"))))
"(l_N__CUNIT_)*2,nothing*3,l_N_w*2")
(define_insn_reservation "branch_s_N__CROSS_" 6
(and (eq_attr "type" "branch")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "s")
(eq_attr "dest_regfile" "_RF_"))))
"(s_N_+s_N_w)_CUNIT_+br1")
(define_insn_reservation "call_addkpc_s_N__CROSS_" 6
(and (eq_attr "type" "call")
(and (ne (symbol_ref "TARGET_INSNS_64") (const_int 0))
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "s")
(eq_attr "dest_regfile" "_RF_")))))
"(s_N_+s_N_w)_CUNIT_+br1,s2+br0+br1")
(define_insn_reservation "call_mvk_s_N__CROSS_" 6
(and (eq_attr "type" "call")
(and (eq (symbol_ref "TARGET_INSNS_64") (const_int 0))
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "s")
(eq_attr "dest_regfile" "_RF_")))))
"(s_N_+s_N_w)_CUNIT_+br1,s2,s2")
(define_insn_reservation "single_s_N__CROSS_" 1
(and (eq_attr "type" "single")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "s")
(eq_attr "dest_regfile" "_RF_"))))
"(s_N_+s_N_w)_CUNIT_")
(define_insn_reservation "cmpdp_s_N__CROSS_" 2
(and (eq_attr "type" "cmpdp")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "s")
(eq_attr "dest_regfile" "_RF_"))))
"s_N__CUNIT_,(s_N__CUNIT_)+s_N_w")
(define_insn_reservation "dp2_s_N__CROSS_" 2
(and (eq_attr "type" "dp2")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "s")
(eq_attr "dest_regfile" "_RF_"))))
"s_N_+s_N_w_CUNIT_,s_N_w")
(define_insn_reservation "fp4_s_N__CROSS_" 4
(and (eq_attr "type" "fp4")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "s")
(eq_attr "dest_regfile" "_RF_"))))
"s_N__CUNIT_,nothing*2,s_N_w")
(define_insn_reservation "mvilc4_s_N__CROSS_" 4
(and (eq_attr "type" "mvilc")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "s")
(eq_attr "dest_regfile" "_RF_"))))
"(s_N_+s_N_w)_CUNIT_")
(define_insn_reservation "single_dl_N__CROSS_" 1
(and (eq_attr "type" "single")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "dl")
(eq_attr "dest_regfile" "_RF_"))))
"(d_N_|(l_N_+l_N_w))_CUNIT_")
(define_insn_reservation "single_ds_N__CROSS_" 1
(and (eq_attr "type" "single")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "ds")
(eq_attr "dest_regfile" "_RF_"))))
"(d_N_|(s_N_+s_N_w))_CUNIT_")
(define_insn_reservation "single_ls_N__CROSS_" 1
(and (eq_attr "type" "single")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "ls")
(eq_attr "dest_regfile" "_RF_"))))
"((l_N_+l_N_w)|(s_N_+s_N_w))_CUNIT_")
(define_insn_reservation "dp2_l_N__CROSS_" 2
(and (eq_attr "type" "dp2")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "l")
(eq_attr "dest_regfile" "_RF_"))))
"l_N_+l_N_w_CUNIT_,l_N_w")
(define_insn_reservation "fp4_ls_N__CROSS_" 4
(and (eq_attr "type" "fp4")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "ls")
(eq_attr "dest_regfile" "_RF_"))))
"(s_N__CUNIT_,nothing*2,s_N_w)|(l_N__CUNIT_,nothing*2,l_N_w)")
(define_insn_reservation "adddp_ls_N__CROSS_" 7
(and (eq_attr "type" "adddp")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "ls")
(eq_attr "dest_regfile" "_RF_"))))
"((s_N__CUNIT_)*2,nothing*3,s_N_w*2)|((l_N__CUNIT_)*2,nothing*3,l_N_w*2)")
(define_insn_reservation "single_dls_N__CROSS_" 1
(and (eq_attr "type" "single")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "dls")
(eq_attr "dest_regfile" "_RF_"))))
"(d_N_|(l_N_+l_N_w)|(s_N_+s_N_w))_CUNIT_")
(define_insn_reservation "mpy2_m_N__CROSS_" 2
(and (eq_attr "type" "mpy2")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "m")
(eq_attr "dest_regfile" "_RF_"))))
"m_N__CUNIT_,m_N_w")
(define_insn_reservation "mpy4_m_N__CROSS_" 4
(and (eq_attr "type" "mpy4")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "m")
(eq_attr "dest_regfile" "_RF_"))))
"m_N__CUNIT_,nothing,nothing,m_N_w")
(define_insn_reservation "mpydp_m_N__CROSS_" 10
(and (eq_attr "type" "mpydp")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "m")
(eq_attr "dest_regfile" "_RF_"))))
"(m_N__CUNIT_)*4,nothing*4,m_N_w*2")
(define_insn_reservation "mpyspdp_m_N__CROSS_" 7
(and (eq_attr "type" "mpyspdp")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "m")
(eq_attr "dest_regfile" "_RF_"))))
"(m_N__CUNIT_)*2,nothing*3,m_N_w*2")
(define_insn_reservation "mpysp2dp_m_N__CROSS_" 5
(and (eq_attr "type" "mpysp2dp")
(and (eq_attr "cross" "_CROSS_")
(and (eq_attr "units" "m")
(eq_attr "dest_regfile" "_RF_"))))
"m_N__CUNIT_,nothing*2,m_N_w*2")
; -*- buffer-read-only: t -*-
; Generated automatically by genopt.sh from c6x-isas.def.
;
; Copyright (C) 2011 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
; for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3. If not see
; <http://www.gnu.org/licenses/>.
Enum
Name(c6x_isa) Type(int)
Known C6X ISAs (for use with the -march= option):
EnumValue
Enum(c6x_isa) String(c62x) Value(0)
EnumValue
Enum(c6x_isa) String(c64x) Value(1)
EnumValue
Enum(c6x_isa) String(c64x+) Value(2)
EnumValue
Enum(c6x_isa) String(c67x) Value(3)
EnumValue
Enum(c6x_isa) String(c67x+) Value(4)
EnumValue
Enum(c6x_isa) String(c674x) Value(5)
This source diff could not be displayed because it is too large. You can view the blob instead.
; Option definitions for TI C6X.
; Copyright (C) 2010, 2011 Free Software Foundation, Inc.
; Contributed by Bernd Schmidt <bernds@codesourcery.com>
; Contributed by CodeSourcery.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation; either version 3, or (at your option)
; any later version.
;
; GCC is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3. If not see
; <http://www.gnu.org/licenses/>.
HeaderInclude
config/c6x/c6x-opts.h
SourceInclude
config/c6x/c6x-opts.h
mbig-endian
Target Report RejectNegative Mask(BIG_ENDIAN)
Use big-endian byte order
mlittle-endian
Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
Use little-endian byte order
msim
Target RejectNegative
Use simulator runtime
msdata=
Target RejectNegative Enum(c6x_sdata) Joined Var(c6x_sdata_mode) Init(C6X_SDATA_DEFAULT)
Select method for sdata handling
Enum
Name(c6x_sdata) Type(enum c6x_sdata)
Valid arguments for the -msdata= option
EnumValue
Enum(c6x_sdata) String(none) Value(C6X_SDATA_NONE)
EnumValue
Enum(c6x_sdata) String(default) Value(C6X_SDATA_DEFAULT)
EnumValue
Enum(c6x_sdata) String(all) Value(C6X_SDATA_ALL)
mdsbt
Target Mask(DSBT)
Compile for the DSBT shared library ABI
mlong-calls
Target Report Mask(LONG_CALLS)
Avoid generating pc-relative calls; use indirection
march=
Target RejectNegative Joined Enum(c6x_isa) Var(c6x_arch_option)
Specify the name of the target architecture
/* Intrinsics for TI C6X.
Copyright (C) 2011 Free Software Foundation, Inc.
Contributed by CodeSourcery.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
#ifndef _GCC_C6X_INTRINSICS_H
#define _GCC_C6X_INTRINSICS_H
#if !defined(__TMS320C6X__)
# error "c6x_intrinsics.h is only supported for C6X targets"
#endif
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
/* Define vector types. */
typedef uint8_t __uv4qi __attribute__((vector_size (4)));
typedef int16_t __v2hi __attribute__((vector_size (4)));
typedef int32_t __v2si __attribute__((vector_size (8)));
__extension__ static __inline int __attribute__ ((__always_inline__))
_abs (int src)
{
return __builtin_c6x_abs (src);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_abs2 (int src)
{
return (int)__builtin_c6x_abs2 ((__v2hi)src);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_sadd (int src1, int src2)
{
return __builtin_c6x_sadd (src1, src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_ssub (int src1, int src2)
{
return __builtin_c6x_ssub (src1, src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_add2 (int src1, int src2)
{
return (int)__builtin_c6x_add2 ((__v2hi)src1, (__v2hi)src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_sub2 (int src1, int src2)
{
return (int)__builtin_c6x_sub2 ((__v2hi)src1, (__v2hi)src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_add4 (int src1, int src2)
{
return (int)__builtin_c6x_add4 ((__uv4qi)src1, (__uv4qi)src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_sub4 (int src1, int src2)
{
return (int)__builtin_c6x_sub4 ((__uv4qi)src1, (__uv4qi)src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_sadd2 (int src1, int src2)
{
return (int)__builtin_c6x_sadd2 ((__v2hi)src1, (__v2hi)src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_ssub2 (int src1, int src2)
{
return (int)__builtin_c6x_ssub2 ((__v2hi)src1, (__v2hi)src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_saddu4 (int src1, int src2)
{
return (int)__builtin_c6x_saddu4 ((__uv4qi)src1, (__uv4qi)src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_smpy (int src1, int src2)
{
return __builtin_c6x_smpy (src1, src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_smpylh (int src1, int src2)
{
return __builtin_c6x_smpylh (src1, src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_smpyhl (int src1, int src2)
{
return __builtin_c6x_smpyhl (src1, src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_smpyh (int src1, int src2)
{
return __builtin_c6x_smpyh (src1, src2);
}
__extension__ static __inline long long __attribute__ ((__always_inline__))
_smpy2ll (int src1, int src2)
{
return (long long)__builtin_c6x_smpy2 ((__v2hi)src1, (__v2hi)src2);
}
__extension__ static __inline long long __attribute__ ((__always_inline__))
_mpy2ll (int src1, int src2)
{
return (long long)__builtin_c6x_mpy2 ((__v2hi)src1, (__v2hi)src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_extr (int src1, int src2)
{
return __builtin_c6x_extr (src1, src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_extru (int src1, int src2)
{
return __builtin_c6x_extru (src1, src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_clrr (int src1, int src2)
{
return __builtin_c6x_clrr (src1, src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_avg2 (int src1, int src2)
{
return (int)__builtin_c6x_avg2 ((__v2hi)src1, (__v2hi)src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_avgu4 (int src1, int src2)
{
return (int)__builtin_c6x_avgu4 ((__uv4qi)src1, (__uv4qi)src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_sshl (int src1, int src2)
{
return __builtin_c6x_sshl (src1, src2);
}
__extension__ static __inline int __attribute__ ((__always_inline__))
_subc (int src1, int src2)
{
return __builtin_c6x_subc (src1, src2);
}
#ifdef __cplusplus
}
#endif
#endif
;; Constraint definitions for TI C6X.
;; Copyright (C) 2010, 2011 Free Software Foundation, Inc.
;; Contributed by Andrew Jenner <andrew@codesourcery.com>
;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
;; Contributed by CodeSourcery.
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify
;; it under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful,
;; but WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;; GNU General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>.
(define_register_constraint "a" "A_REGS"
"Register file A (A0--A31).")
(define_register_constraint "b" "B_REGS"
"Register file B (B0--B31).")
(define_register_constraint "A" "PREDICATE_A_REGS"
"Predicate registers in register file A (A0--A2 on C64X and higher,
A1 and A2 otherwise).")
(define_register_constraint "B" "PREDICATE_B_REGS"
"Predicate registers in register file B (B0--B2).")
(define_register_constraint "C" "CALL_USED_B_REGS"
"A call-used register in register file B (B0--B9, B16--B31).")
(define_register_constraint "Da" "NONPREDICATE_A_REGS"
"Register file A, excluding predicate registers (A3--A31, plus A0 if
not C64X or higher).")
(define_register_constraint "Db" "NONPREDICATE_B_REGS"
"Register file B, excluding predicate registers (B3--B31).")
(define_register_constraint "Z" "PICREG"
"Register B14 (aka DP).")
(define_register_constraint "z" "SPREG"
"Register B15 (aka SP).")
(define_constraint "Iu4"
"Integer constant in the range 0 @dots{} 15, aka ucst4."
(and (match_code "const_int")
(match_test "ival >= 0 && ival <= 15")))
(define_constraint "Iu5"
"Integer constant in the range 0 @dots{} 31, aka ucst5."
(and (match_code "const_int")
(match_test "ival >= 0 && ival <= 31")))
(define_constraint "In5"
"Integer constant in the range @minus{}31 @dots{} 0, negation of ucst5."
(and (match_code "const_int")
(match_test "ival >= -31 && ival <= 0")))
(define_constraint "Is5"
"Integer constant in the range @minus{}16 @dots{} 15, aka scst5."
(and (match_code "const_int")
(match_test "ival >= -16 && ival <= 15")))
(define_constraint "I5x"
"Integer constant that can be the operand of an ADDA or a SUBA insn."
(and (match_code "const_int")
(match_test "(ival >= -31 && ival <= 31)
|| ((ival & 1) == 0 && ival >= -62 && ival <= 62)
|| ((ival & 3) == 0 && ival >= -124 && ival <= 124)
|| ((TARGET_INSNS_64 || TARGET_INSNS_67)
&& (ival & 7) == 0 && ival > 0 && ival <= 248)")))
(define_constraint "Iux"
"Integer constant that can be the operand of a long ADDA or a SUBA insn,
i.e. one involving B14 or B15 as source operand."
(and (match_code "const_int")
(and (match_test "TARGET_INSNS_64PLUS")
(match_test "ival >= 0
&& (ival < 32768
|| ((ival & 1) == 0 && ival < 65536)
|| ((ival & 3) == 0 && ival < 131072))"))))
(define_constraint "IuB"
"Integer constant in the range 0 @dots{} 65535, aka ucst16."
(and (match_code "const_int")
(match_test "ival >= 0 && ival <= 65535")))
(define_constraint "IsB"
"Integer constant in the range @minus{}32768 @dots{} 32767."
(and (match_code "const_int")
(match_test "ival >= -32768 && ival <= 32767")))
(define_constraint "IsC"
"Integer constant in the range @math{-2^{20}} @dots{} @math{2^{20} - 1}."
(and (match_code "const_int")
(match_test "ival >= -0x100000 && ival <= 0xfffff")))
(define_constraint "JA"
"@internal
Integer constant in the range 0 @dots{} 31, corresponding to an A register
number."
(and (match_code "const_int")
(match_test "ival >= 0 && ival < 32")))
(define_constraint "JB"
"@internal
Integer constant in the range 32 @dots{} 63, corresponding to a B register
number."
(and (match_code "const_int")
(match_test "ival >= 32 && ival < 64")))
(define_constraint "Jc"
"Integer constant that is a valid mask for the clr instruction"
(and (match_code "const_int")
(match_test "c6x_valid_mask_p (ival)")))
(define_constraint "Js"
"Integer constant that is a valid mask for the set instruction"
(and (match_code "const_int")
(match_test "c6x_valid_mask_p (~ival)")))
(define_memory_constraint "Q"
"Memory location with A base register."
(and (match_code "mem")
(match_test "c6x_mem_operand (op, A_REGS, false)")))
(define_memory_constraint "R"
"Memory location with B base register."
(and (match_code "mem")
(match_test "c6x_mem_operand (op, B_REGS, false)")))
(define_memory_constraint "T"
"@internal
Memory location with B base register, but not using a long offset."
(and (match_code "mem")
(match_test "c6x_mem_operand (op, B_REGS, true)")))
(define_constraint "S0"
"@internal
On C64x+ targets, a GP-relative small data reference"
(and (match_test "TARGET_INSNS_64PLUS")
(match_operand 0 "sdata_symbolic_operand")))
(define_constraint "S1"
"@internal
Any kind of @code{SYMBOL_REF}, for use in a call address."
(and (match_code "symbol_ref")
(match_operand 0 "c6x_call_operand")))
(define_constraint "S2"
"@internal
Any SYMBOL_REF or LABEL_REF."
(ior (match_code "symbol_ref") (match_code "label_ref")))
(define_constraint "Si"
"@internal
Any immediate value, unless it matches the S0 constraint."
(and (match_operand 0 "immediate_operand")
(match_test "!satisfies_constraint_S0 (op)")))
(define_memory_constraint "W"
"@internal
A memory operand with an address that can't be used in an unaligned access."
(and (match_code "mem")
(match_test "!c6x_legitimate_address_p_1 (GET_MODE (op), XEXP (op, 0),
reload_completed, true)")))
/* Copyright 2010, 2011 Free Software Foundation, Inc.
Contributed by Bernd Schmidt <bernds@codesourcery.com>.
This file is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
Free Software Foundation; either version 3, or (at your option) any
later version.
This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
/*
* This file just supplies function prologues for the .init and .fini
* sections. It is linked in before crtbegin.o.
*/
.section .init
.globl _init
.type _init,@function
_init:
add .l2 -8, B15, B15
stw .d2t2 B3,*+B15(4)
.section .fini
.globl _fini
.type _fini,@function
_fini:
add .l2 -8, B15, B15
stw .d2t2 B3,*+B15(4)
/* Copyright 2010, 2011 Free Software Foundation, Inc.
Contributed by Bernd Schmidt <bernds@codesourcery.com>.
This file is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
Free Software Foundation; either version 3, or (at your option) any
later version.
This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
/*
* This file supplies function epilogues for the .init and .fini sections.
* It is linked in after all other files.
*/
.section .init
ldw .d2t2 *+B15(4), B3
add .d2 B15, 8, B15
nop 3
ret .s2 B3
nop 5
.section .fini
ldw .d2t2 *+B15(4), B3
add .d2 B15, 8, B15
nop 3
ret .s2 B3
nop 5
/* ELF definitions for TI C6X
Copyright (C) 2010 Free Software Foundation, Inc.
Contributed by Andrew Jenner <andrew@codesourcery.com>
Contributed by Bernd Schmidt <bernds@codesourcery.com>
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* Controlling the Compilation Driver. */
#define ENDIAN_LINK_SPEC "%{mbig-endian:-EB} %{mlittle-endian:-EL} "
#undef ASM_SPEC
#define ASM_SPEC "%{march=*:-march=%*} %{mbig-endian:-mbig-endian} \
%{mdsbt:-mdsbt %{!fPIC:-mpid=near} %{fPIC:-mpid=far -mpic} %{fpic:-mpic}} \
%{!mdsbt:%{fpic:-mpic -mpid=near} %{fPIC:-mpic -mpid=far}}"
#undef DATA_SECTION_ASM_OP
#define DATA_SECTION_ASM_OP "\t.section\t\".fardata\",\"aw\""
#undef READONLY_DATA_SECTION_ASM_OP
#define READONLY_DATA_SECTION_ASM_OP "\t.section\t\".const\",\"a\",@progbits"
#define BSS_SECTION_ASM_OP "\t.section\t\".far\",\"aw\",@nobits"
#define SDATA_SECTION_ASM_OP "\t.section\t\".neardata\",\"aw\""
#define SBSS_SECTION_ASM_OP "\t.section\t\".bss\",\"aw\",@nobits"
#define TARGET_LIBGCC_SDATA_SECTION ".neardata"
/* ELF definitions for TI C6X
Copyright (C) 2010 Free Software Foundation, Inc.
Contributed by Andrew Jenner <andrew@codesourcery.com>
Contributed by Bernd Schmidt <bernds@codesourcery.com>
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* crt0.o should come from the linker script, but for compatibility,
we mention it here for -msim. */
#undef STARTFILE_SPEC
#define STARTFILE_SPEC "%{msim:crt0%O%s} crti%O%s crtbegin%O%s"
#undef ENDFILE_SPEC
#define ENDFILE_SPEC "crtend%O%s crtn%O%s"
#undef LIB_SPEC
#define LIB_SPEC "%{msim:--start-group -lc -lsim --end-group;" \
":-lc}"
#undef LINK_SPEC
#define LINK_SPEC ENDIAN_LINK_SPEC
/* Software floating-point emulation.
Return 1 iff a == b, 0 otherwise.
Copyright (C) 1997,1999,2006,2007,2011 Free Software Foundation, Inc.
Contributed by Richard Henderson (rth@cygnus.com) and
Jakub Jelinek (jj@ultra.linux.cz).
This file is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
In addition to the permissions in the GNU Lesser General Public
License, the Free Software Foundation gives you unlimited
permission to link the compiled version of this file into
combinations with other programs, and to distribute those
combinations without any restriction coming from the use of this
file. (The Lesser General Public License restrictions do apply in
other respects; for example, they cover modification of the file,
and distribution when not linked into a combine executable.)
This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with GCC; see the file COPYING.LIB. If not see
<http://www.gnu.org/licenses/>. */
#include "config/soft-fp/soft-fp.h"
#include "config/soft-fp/double.h"
CMPtype __c6xabi_eqd(DFtype a, DFtype b)
{
FP_DECL_EX;
FP_DECL_D(A); FP_DECL_D(B);
CMPtype r;
FP_UNPACK_RAW_D(A, a);
FP_UNPACK_RAW_D(B, b);
FP_CMP_EQ_D(r, A, B);
if (r && (FP_ISSIGNAN_D(A) || FP_ISSIGNAN_D(B)))
FP_SET_EXCEPTION(FP_EX_INVALID);
FP_HANDLE_EXCEPTIONS;
return !r;
}
/* Software floating-point emulation.
Return 1 iff a == b, 0 otherwise.
Copyright (C) 1997,1999,2006,2007,2011 Free Software Foundation, Inc.
Contributed by Richard Henderson (rth@cygnus.com) and
Jakub Jelinek (jj@ultra.linux.cz).
This file is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
In addition to the permissions in the GNU Lesser General Public
License, the Free Software Foundation gives you unlimited
permission to link the compiled version of this file into
combinations with other programs, and to distribute those
combinations without any restriction coming from the use of this
file. (The Lesser General Public License restrictions do apply in
other respects; for example, they cover modification of the file,
and distribution when not linked into a combine executable.)
This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with GCC; see the file COPYING.LIB. If not see
<http://www.gnu.org/licenses/>. */
#include "config/soft-fp/soft-fp.h"
#include "config/soft-fp/single.h"
CMPtype __c6xabi_eqf(SFtype a, SFtype b)
{
FP_DECL_EX;
FP_DECL_S(A); FP_DECL_S(B);
CMPtype r;
FP_UNPACK_RAW_S(A, a);
FP_UNPACK_RAW_S(B, b);
FP_CMP_EQ_S(r, A, B);
if (r && (FP_ISSIGNAN_S(A) || FP_ISSIGNAN_S(B)))
FP_SET_EXCEPTION(FP_EX_INVALID);
FP_HANDLE_EXCEPTIONS;
return !r;
}
/* Software floating-point emulation.
Return 1 iff a >= b, 0 otherwise.
Copyright (C) 1997,1999,2006,2007,2011 Free Software Foundation, Inc.
Contributed by Richard Henderson (rth@cygnus.com) and
Jakub Jelinek (jj@ultra.linux.cz).
This file is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
In addition to the permissions in the GNU Lesser General Public
License, the Free Software Foundation gives you unlimited
permission to link the compiled version of this file into
combinations with other programs, and to distribute those
combinations without any restriction coming from the use of this
file. (The Lesser General Public License restrictions do apply in
other respects; for example, they cover modification of the file,
and distribution when not linked into a combine executable.)
This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with GCC; see the file COPYING.LIB. If not see
<http://www.gnu.org/licenses/>. */
#include "config/soft-fp/soft-fp.h"
#include "config/soft-fp/double.h"
CMPtype __c6xabi_ged(DFtype a, DFtype b)
{
FP_DECL_EX;
FP_DECL_D(A); FP_DECL_D(B);
CMPtype r;
FP_UNPACK_RAW_D(A, a);
FP_UNPACK_RAW_D(B, b);
FP_CMP_D(r, A, B, -2);
if (r == -2 && (FP_ISSIGNAN_D(A) || FP_ISSIGNAN_D(B)))
FP_SET_EXCEPTION(FP_EX_INVALID);
FP_HANDLE_EXCEPTIONS;
return r >= 0;
}
/* Software floating-point emulation.
Return 1 iff a >= b, 0 otherwise.
Copyright (C) 1997,1999,2006,2007 Free Software Foundation, Inc.
Contributed by Richard Henderson (rth@cygnus.com) and
Jakub Jelinek (jj@ultra.linux.cz).
This file is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
In addition to the permissions in the GNU Lesser General Public
License, the Free Software Foundation gives you unlimited
permission to link the compiled version of this file into
combinations with other programs, and to distribute those
combinations without any restriction coming from the use of this
file. (The Lesser General Public License restrictions do apply in
other respects; for example, they cover modification of the file,
and distribution when not linked into a combine executable.)
This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with GCC; see the file COPYING.LIB. If not see
<http://www.gnu.org/licenses/>. */
#include "config/soft-fp/soft-fp.h"
#include "config/soft-fp/single.h"
CMPtype __c6xabi_gef(SFtype a, SFtype b)
{
FP_DECL_EX;
FP_DECL_S(A); FP_DECL_S(B);
CMPtype r;
FP_UNPACK_RAW_S(A, a);
FP_UNPACK_RAW_S(B, b);
FP_CMP_S(r, A, B, -2);
if (r == -2 && (FP_ISSIGNAN_S(A) || FP_ISSIGNAN_S(B)))
FP_SET_EXCEPTION(FP_EX_INVALID);
FP_HANDLE_EXCEPTIONS;
return r >= 0;
}
#! /bin/sh
# Generate c6x-mult.md from c6x-mult.md.in
# The input file is passed as an argument.
# Copyright 2011 Free Software Foundation, Inc.
#This file is part of GCC.
#GCC is free software; you can redistribute it and/or modify
#it under the terms of the GNU General Public License as published by
#the Free Software Foundation; either version 3, or (at your option)
#any later version.
#GCC is distributed in the hope that it will be useful,
#but WITHOUT ANY WARRANTY; without even the implied warranty of
#MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
#GNU General Public License for more details.
#You should have received a copy of the GNU General Public License
#along with GCC; see the file COPYING3. If not see
#<http://www.gnu.org/licenses/>.
echo ";; -*- buffer-read-only: t -*-"
echo ";; Generated automatically from c6x-mult.md.in by genmult.sh"
sed -e "s,_VARIANT_,,g" -e "s,_SET_,set,g" -e "s,_.BRK_,,g" \
-e "s,_A_,a,g" -e "s,_B_,b,g" -e "s,_DESTOPERAND_,register_operand,g" \
-e "s,_MOD._,,g" -e "s,:_M,:,g" < $1
sed -e "s,_VARIANT_,_real,g" -e "s,_SET_,unspec,g" -e "s,_OBRK_,[,g" \
-e "s,_CBRK_,] UNSPEC_REAL_MULT,g" -e "s,_A_,JA,g" -e "s,_B_,JB,g" \
-e "s,_DESTOPERAND_,const_int_operand,g" -e "s,_MODk_,k,g" \
-e "s,_MODK_,K,g" -e 's,:_MV..[IQ],:SI,g' -e "s,:_MSQ,:SI,g" < $1
#!/bin/sh
# Generate c6x-tables.opt from the lists in *.def.
# Copyright (C) 2011 Free Software Foundation, Inc.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
cat <<EOF
; -*- buffer-read-only: t -*-
; Generated automatically by genopt.sh from c6x-isas.def.
;
; Copyright (C) 2011 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
; for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3. If not see
; <http://www.gnu.org/licenses/>.
Enum
Name(c6x_isa) Type(int)
Known C6X ISAs (for use with the -march= option):
EOF
awk -F'[(, ]+' 'BEGIN {
value = 0
}
/^C6X_ISA/ {
name = $2
gsub("\"", "", name)
print "EnumValue"
print "Enum(c6x_isa) String(" name ") Value(" value ")"
print ""
value++
}' $1/c6x-isas.def
#! /bin/sh
# Generate c6x-sched.md from c6x-sched.md.in
# The input file is passed as an argument.
# Copyright 2010, 2011 Free Software Foundation, Inc.
#This file is part of GCC.
#GCC is free software; you can redistribute it and/or modify
#it under the terms of the GNU General Public License as published by
#the Free Software Foundation; either version 3, or (at your option)
#any later version.
#GCC is distributed in the hope that it will be useful,
#but WITHOUT ANY WARRANTY; without even the implied warranty of
#MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
#GNU General Public License for more details.
#You should have received a copy of the GNU General Public License
#along with GCC; see the file COPYING3. If not see
#<http://www.gnu.org/licenses/>.
echo ";; -*- buffer-read-only: t -*-"
echo ";; Generated automatically from c6x-sched.md.in by gensched.sh"
for cross in n y; do
for side in 1 2; do
tside=$side
case $side in
1) rf="a"; otherside=2 ;;
2) rf="b"; otherside=1 ;;
esac
case $cross in
y) cunit="+x$side"; tside=$otherside;;
n) cunit="";;
esac
echo
echo ";; Definitions for side $side, cross $cross"
echo
sed -e "s,_CROSS_,$cross,g" -e "s,_CUNIT_,$cunit,g" \
-e "s,_N_,$side,g" -e "s,_RF_,$rf,g" -e "s,_NX_,$tside,g" \
< $1
done
done
/* Software floating-point emulation.
Return 1 iff a > b, 0 otherwise.
Copyright (C) 1997,1999,2006,2007,2011 Free Software Foundation, Inc.
Contributed by Richard Henderson (rth@cygnus.com) and
Jakub Jelinek (jj@ultra.linux.cz).
This file is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
In addition to the permissions in the GNU Lesser General Public
License, the Free Software Foundation gives you unlimited
permission to link the compiled version of this file into
combinations with other programs, and to distribute those
combinations without any restriction coming from the use of this
file. (The Lesser General Public License restrictions do apply in
other respects; for example, they cover modification of the file,
and distribution when not linked into a combine executable.)
This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with GCC; see the file COPYING.LIB. If not see
<http://www.gnu.org/licenses/>. */
#include "config/soft-fp/soft-fp.h"
#include "config/soft-fp/double.h"
CMPtype __c6xabi_gtd(DFtype a, DFtype b)
{
FP_DECL_EX;
FP_DECL_D(A); FP_DECL_D(B);
CMPtype r;
FP_UNPACK_RAW_D(A, a);
FP_UNPACK_RAW_D(B, b);
FP_CMP_D(r, A, B, -2);
if (r == -2 && (FP_ISSIGNAN_D(A) || FP_ISSIGNAN_D(B)))
FP_SET_EXCEPTION(FP_EX_INVALID);
FP_HANDLE_EXCEPTIONS;
return r > 0;
}
/* Software floating-point emulation.
Return 1 iff a > b, 0 otherwise.
Copyright (C) 1997,1999,2006,2007,2011 Free Software Foundation, Inc.
Contributed by Richard Henderson (rth@cygnus.com) and
Jakub Jelinek (jj@ultra.linux.cz).
This file is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
In addition to the permissions in the GNU Lesser General Public
License, the Free Software Foundation gives you unlimited
permission to link the compiled version of this file into
combinations with other programs, and to distribute those
combinations without any restriction coming from the use of this
file. (The Lesser General Public License restrictions do apply in
other respects; for example, they cover modification of the file,
and distribution when not linked into a combine executable.)
This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with GCC; see the file COPYING.LIB. If not see
<http://www.gnu.org/licenses/>. */
#include "config/soft-fp/soft-fp.h"
#include "config/soft-fp/single.h"
CMPtype __c6xabi_gtf(SFtype a, SFtype b)
{
FP_DECL_EX;
FP_DECL_S(A); FP_DECL_S(B);
CMPtype r;
FP_UNPACK_RAW_S(A, a);
FP_UNPACK_RAW_S(B, b);
FP_CMP_S(r, A, B, -2);
if (r == -2 && (FP_ISSIGNAN_S(A) || FP_ISSIGNAN_S(B)))
FP_SET_EXCEPTION(FP_EX_INVALID);
FP_HANDLE_EXCEPTIONS;
return r > 0;
}
/* Software floating-point emulation.
Return 1 iff a <= b, 0 otherwise.
Copyright (C) 1997,1999,2006,2007,2011 Free Software Foundation, Inc.
Contributed by Richard Henderson (rth@cygnus.com) and
Jakub Jelinek (jj@ultra.linux.cz).
This file is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
In addition to the permissions in the GNU Lesser General Public
License, the Free Software Foundation gives you unlimited
permission to link the compiled version of this file into
combinations with other programs, and to distribute those
combinations without any restriction coming from the use of this
file. (The Lesser General Public License restrictions do apply in
other respects; for example, they cover modification of the file,
and distribution when not linked into a combine executable.)
This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with GCC; see the file COPYING.LIB. If not see
<http://www.gnu.org/licenses/>. */
#include "config/soft-fp/soft-fp.h"
#include "config/soft-fp/double.h"
CMPtype __c6xabi_led(DFtype a, DFtype b)
{
FP_DECL_EX;
FP_DECL_D(A); FP_DECL_D(B);
CMPtype r;
FP_UNPACK_RAW_D(A, a);
FP_UNPACK_RAW_D(B, b);
FP_CMP_D(r, A, B, 2);
if (r == 2 && (FP_ISSIGNAN_D(A) || FP_ISSIGNAN_D(B)))
FP_SET_EXCEPTION(FP_EX_INVALID);
FP_HANDLE_EXCEPTIONS;
return r <= 0;
}
/* Software floating-point emulation.
Return 1 iff a <= b, 0 otherwise.
Copyright (C) 1997,1999,2006,2007,2011 Free Software Foundation, Inc.
Contributed by Richard Henderson (rth@cygnus.com) and
Jakub Jelinek (jj@ultra.linux.cz).
This file is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
In addition to the permissions in the GNU Lesser General Public
License, the Free Software Foundation gives you unlimited
permission to link the compiled version of this file into
combinations with other programs, and to distribute those
combinations without any restriction coming from the use of this
file. (The Lesser General Public License restrictions do apply in
other respects; for example, they cover modification of the file,
and distribution when not linked into a combine executable.)
This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with GCC; see the file COPYING.LIB. If not see
<http://www.gnu.org/licenses/>. */
#include "config/soft-fp/soft-fp.h"
#include "config/soft-fp/single.h"
CMPtype __c6xabi_lef(SFtype a, SFtype b)
{
FP_DECL_EX;
FP_DECL_S(A); FP_DECL_S(B);
CMPtype r;
FP_UNPACK_RAW_S(A, a);
FP_UNPACK_RAW_S(B, b);
FP_CMP_S(r, A, B, 2);
if (r == 2 && (FP_ISSIGNAN_S(A) || FP_ISSIGNAN_S(B)))
FP_SET_EXCEPTION(FP_EX_INVALID);
FP_HANDLE_EXCEPTIONS;
return r <= 0;
}
/* Copyright 2010, 2011 Free Software Foundation, Inc.
Contributed by Bernd Schmidt <bernds@codesourcery.com>.
This file is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
Free Software Foundation; either version 3, or (at your option) any
later version.
This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
;; ABI considerations for the divide functions
;; The following registers are call-used:
;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
;;
;; In our implementation, divu and remu are leaf functions,
;; while both divi and remi call into divu.
;; A0 is not clobbered by any of the functions.
;; divu does not clobber B2 either, which is taken advantage of
;; in remi.
;; divi uses B5 to hold the original return address during
;; the call to divu.
;; remi uses B2 and A5 to hold the input values during the
;; call to divu. It stores B3 in on the stack.
#ifdef L_divsi3
.text
.align 2
.global __c6xabi_divi
.hidden __c6xabi_divi
.type __c6xabi_divi, STT_FUNC
__c6xabi_divi:
call .s2 __c6xabi_divu
|| mv .d2 B3, B5
|| cmpgt .l1 0, A4, A1
|| cmpgt .l2 0, B4, B1
[A1] neg .l1 A4, A4
|| [B1] neg .l2 B4, B4
|| xor .s1x A1, B1, A1
#ifdef _TMS320C6400
[A1] addkpc .s2 1f, B3, 4
#else
[A1] mvkl .s2 1f, B3
[A1] mvkh .s2 1f, B3
nop 2
#endif
1:
neg .l1 A4, A4
|| mv .l2 B3,B5
|| ret .s2 B5
nop 5
#endif
#if defined L_modsi3 || defined L_divmodsi4
.align 2
#ifdef L_modsi3
#define MOD_OUTPUT_REG A4
.global __c6xabi_remi
.hidden __c6xabi_remi
.type __c6xabi_remi, STT_FUNC
#else
#define MOD_OUTPUT_REG A5
.global __c6xabi_divremi
.hidden __c6xabi_divremi
.type __c6xabi_divremi, STT_FUNC
__c6xabi_divremi:
#endif
__c6xabi_remi:
stw .d2t2 B3, *B15--[2]
|| cmpgt .l1 0, A4, A1
|| cmpgt .l2 0, B4, B2
|| mv .s1 A4, A5
|| call .s2 __c6xabi_divu
[A1] neg .l1 A4, A4
|| [B2] neg .l2 B4, B4
|| xor .s2x B2, A1, B0
|| mv .d2 B4, B2
#ifdef _TMS320C6400
[B0] addkpc .s2 1f, B3, 1
[!B0] addkpc .s2 2f, B3, 1
nop 2
#else
[B0] mvkl .s2 1f,B3
[!B0] mvkl .s2 2f,B3
[B0] mvkh .s2 1f,B3
[!B0] mvkh .s2 2f,B3
#endif
1:
neg .l1 A4, A4
2:
ldw .d2t2 *++B15[2], B3
#ifdef _TMS320C6400_PLUS
mpy32 .m1x A4, B2, A6
nop 3
ret .s2 B3
sub .l1 A5, A6, MOD_OUTPUT_REG
nop 4
#else
mpyu .m1x A4, B2, A1
nop 1
mpylhu .m1x A4, B2, A6
|| mpylhu .m2x B2, A4, B2
nop 1
add .l1x A6, B2, A6
|| ret .s2 B3
shl .s1 A6, 16, A6
add .d1 A6, A1, A6
sub .l1 A5, A6, MOD_OUTPUT_REG
nop 2
#endif
#endif
#if defined L_udivsi3 || defined L_udivmodsi4
.align 2
#ifdef L_udivsi3
.global __c6xabi_divu
.hidden __c6xabi_divu
.type __c6xabi_divu, STT_FUNC
__c6xabi_divu:
#else
.global __c6xabi_divremu
.hidden __c6xabi_divremu
.type __c6xabi_divremu, STT_FUNC
__c6xabi_divremu:
#endif
;; We use a series of up to 31 subc instructions. First, we find
;; out how many leading zero bits there are in the divisor. This
;; gives us both a shift count for aligning (shifting) the divisor
;; to the, and the number of times we have to execute subc.
;; At the end, we have both the remainder and most of the quotient
;; in A4. The top bit of the quotient is computed first and is
;; placed in A2.
;; Return immediately if the dividend is zero. Setting B4 to 1
;; is a trick to allow us to leave the following insns in the jump
;; delay slot without affecting the result.
mv .s2x A4, B1
#ifndef _TMS320C6400
[!b1] mvk .s2 1, B4
#endif
[b1] lmbd .l2 1, B4, B1
||[!b1] b .s2 B3 ; RETURN A
#ifdef _TMS320C6400
||[!b1] mvk .d2 1, B4
#endif
#ifdef L_udivmodsi4
||[!b1] zero .s1 A5
#endif
mv .l1x B1, A6
|| shl .s2 B4, B1, B4
;; The loop performs a maximum of 28 steps, so we do the
;; first 3 here.
cmpltu .l1x A4, B4, A2
[!A2] sub .l1x A4, B4, A4
|| shru .s2 B4, 1, B4
|| xor .s1 1, A2, A2
shl .s1 A2, 31, A2
|| [b1] subc .l1x A4,B4,A4
|| [b1] add .s2 -1, B1, B1
[b1] subc .l1x A4,B4,A4
|| [b1] add .s2 -1, B1, B1
;; RETURN A may happen here (note: must happen before the next branch)
0:
cmpgt .l2 B1, 7, B0
|| [b1] subc .l1x A4,B4,A4
|| [b1] add .s2 -1, B1, B1
[b1] subc .l1x A4,B4,A4
|| [b1] add .s2 -1, B1, B1
|| [b0] b .s1 0b
[b1] subc .l1x A4,B4,A4
|| [b1] add .s2 -1, B1, B1
[b1] subc .l1x A4,B4,A4
|| [b1] add .s2 -1, B1, B1
[b1] subc .l1x A4,B4,A4
|| [b1] add .s2 -1, B1, B1
[b1] subc .l1x A4,B4,A4
|| [b1] add .s2 -1, B1, B1
[b1] subc .l1x A4,B4,A4
|| [b1] add .s2 -1, B1, B1
;; loop backwards branch happens here
ret .s2 B3
|| mvk .s1 32, A1
sub .l1 A1, A6, A6
#ifdef L_udivmodsi4
|| extu .s1 A4, A6, A5
#endif
shl .s1 A4, A6, A4
shru .s1 A4, 1, A4
|| sub .l1 A6, 1, A6
or .l1 A2, A4, A4
shru .s1 A4, A6, A4
nop
#endif
#ifdef L_umodsi3
.align 2
.global __c6xabi_remu
.hidden __c6xabi_remu
.type __c6xabi_remu, STT_FUNC
__c6xabi_remu:
;; The ABI seems designed to prevent these functions calling each other,
;; so we duplicate most of the divsi3 code here.
mv .s2x A4, B1
#ifndef _TMS320C6400
[!b1] mvk .s2 1, B4
#endif
lmbd .l2 1, B4, B1
||[!b1] b .s2 B3 ; RETURN A
#ifdef _TMS320C6400
||[!b1] mvk .d2 1, B4
#endif
mv .l1x B1, A7
|| shl .s2 B4, B1, B4
cmpltu .l1x A4, B4, A1
[!a1] sub .l1x A4, B4, A4
shru .s2 B4, 1, B4
0:
cmpgt .l2 B1, 7, B0
|| [b1] subc .l1x A4,B4,A4
|| [b1] add .s2 -1, B1, B1
;; RETURN A may happen here (note: must happen before the next branch)
[b1] subc .l1x A4,B4,A4
|| [b1] add .s2 -1, B1, B1
|| [b0] b .s1 0b
[b1] subc .l1x A4,B4,A4
|| [b1] add .s2 -1, B1, B1
[b1] subc .l1x A4,B4,A4
|| [b1] add .s2 -1, B1, B1
[b1] subc .l1x A4,B4,A4
|| [b1] add .s2 -1, B1, B1
[b1] subc .l1x A4,B4,A4
|| [b1] add .s2 -1, B1, B1
[b1] subc .l1x A4,B4,A4
|| [b1] add .s2 -1, B1, B1
;; loop backwards branch happens here
ret .s2 B3
[b1] subc .l1x A4,B4,A4
|| [b1] add .s2 -1, B1, B1
[b1] subc .l1x A4,B4,A4
extu .s1 A4, A7, A4
nop 2
#endif
#if defined L_strasgi_64plus && defined _TMS320C6400_PLUS
.align 2
.global __c6xabi_strasgi_64plus
.hidden __c6xabi_strasgi_64plus
.type __c6xabi_strasgi_64plus, STT_FUNC
__c6xabi_strasgi_64plus:
shru .s2x a6, 2, b31
|| mv .s1 a4, a30
|| mv .d2 b4, b30
add .s2 -4, b31, b31
sploopd 1
|| mvc .s2 b31, ilc
ldw .d2t2 *b30++, b31
nop 4
mv .s1x b31,a31
spkernel 6, 0
|| stw .d1t1 a31, *a30++
ret .s2 b3
nop 5
#endif
#ifdef L_strasgi
.global __c6xabi_strasgi
.type __c6xabi_strasgi, STT_FUNC
__c6xabi_strasgi:
;; This is essentially memcpy, with alignment known to be at least
;; 4, and the size a multiple of 4 greater than or equal to 28.
ldw .d2t1 *B4++, A0
|| mvk .s2 16, B1
ldw .d2t1 *B4++, A1
|| mvk .s2 20, B2
|| sub .d1 A6, 24, A6
ldw .d2t1 *B4++, A5
ldw .d2t1 *B4++, A7
|| mv .l2x A6, B7
ldw .d2t1 *B4++, A8
ldw .d2t1 *B4++, A9
|| mv .s2x A0, B5
|| cmpltu .l2 B2, B7, B0
0:
stw .d1t2 B5, *A4++
||[b0] ldw .d2t1 *B4++, A0
|| mv .s2x A1, B5
|| mv .l2 B7, B6
[b0] sub .d2 B6, 24, B7
||[b0] b .s2 0b
|| cmpltu .l2 B1, B6, B0
[b0] ldw .d2t1 *B4++, A1
|| stw .d1t2 B5, *A4++
|| mv .s2x A5, B5
|| cmpltu .l2 12, B6, B0
[b0] ldw .d2t1 *B4++, A5
|| stw .d1t2 B5, *A4++
|| mv .s2x A7, B5
|| cmpltu .l2 8, B6, B0
[b0] ldw .d2t1 *B4++, A7
|| stw .d1t2 B5, *A4++
|| mv .s2x A8, B5
|| cmpltu .l2 4, B6, B0
[b0] ldw .d2t1 *B4++, A8
|| stw .d1t2 B5, *A4++
|| mv .s2x A9, B5
|| cmpltu .l2 0, B6, B0
[b0] ldw .d2t1 *B4++, A9
|| stw .d1t2 B5, *A4++
|| mv .s2x A0, B5
|| cmpltu .l2 B2, B7, B0
;; loop back branch happens here
cmpltu .l2 B1, B6, B0
|| ret .s2 b3
[b0] stw .d1t1 A1, *A4++
|| cmpltu .l2 12, B6, B0
[b0] stw .d1t1 A5, *A4++
|| cmpltu .l2 8, B6, B0
[b0] stw .d1t1 A7, *A4++
|| cmpltu .l2 4, B6, B0
[b0] stw .d1t1 A8, *A4++
|| cmpltu .l2 0, B6, B0
[b0] stw .d1t1 A9, *A4++
;; return happens here
#endif
#ifdef _TMS320C6400_PLUS
#ifdef L_push_rts
.align 2
.global __c6xabi_push_rts
.hidden __c6xabi_push_rts
.type __c6xabi_push_rts, STT_FUNC
__c6xabi_push_rts:
stw .d2t2 B14, *B15--[2]
stdw .d2t1 A15:A14, *B15--
|| b .s2x A3
stdw .d2t2 B13:B12, *B15--
stdw .d2t1 A13:A12, *B15--
stdw .d2t2 B11:B10, *B15--
stdw .d2t1 A11:A10, *B15--
stdw .d2t2 B3:B2, *B15--
#endif
#ifdef L_pop_rts
.align 2
.global __c6xabi_pop_rts
.hidden __c6xabi_pop_rts
.type __c6xabi_pop_rts, STT_FUNC
__c6xabi_pop_rts:
lddw .d2t2 *++B15, B3:B2
lddw .d2t1 *++B15, A11:A10
lddw .d2t2 *++B15, B11:B10
lddw .d2t1 *++B15, A13:A12
lddw .d2t2 *++B15, B13:B12
lddw .d2t1 *++B15, A15:A14
|| b .s2 B3
ldw .d2t2 *++B15[2], B14
nop 4
#endif
#ifdef L_call_stub
.align 2
.global __c6xabi_call_stub
.type __c6xabi_call_stub, STT_FUNC
__c6xabi_call_stub:
stw .d2t1 A2, *B15--[2]
stdw .d2t1 A7:A6, *B15--
|| call .s2 B31
stdw .d2t1 A1:A0, *B15--
stdw .d2t2 B7:B6, *B15--
stdw .d2t2 B5:B4, *B15--
stdw .d2t2 B1:B0, *B15--
stdw .d2t2 B3:B2, *B15--
|| addkpc .s2 1f, B3, 0
1:
lddw .d2t2 *++B15, B3:B2
lddw .d2t2 *++B15, B1:B0
lddw .d2t2 *++B15, B5:B4
lddw .d2t2 *++B15, B7:B6
lddw .d2t1 *++B15, A1:A0
lddw .d2t1 *++B15, A7:A6
|| b .s2 B3
ldw .d2t1 *++B15[2], A2
nop 4
#endif
#endif
# Copyright (C) 2011 Free Software Foundation, Inc.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
GCC_4.7.0 {
__c6xabi_strasgi
__c6xabi_call_stub
__c6xabi_mpyll
__c6xabi_negll
__c6xabi_llshru
__c6xabi_llshl
__c6xabi_llshr
__c6xabi_fixfu
__c6xabi_fixdu
__c6xabi_fixflli
__c6xabi_fixdlli
__c6xabi_fixfull
__c6xabi_fixdull
__c6xabi_fltllif
__c6xabi_fltllid
__c6xabi_fltullf
__c6xabi_fltulld
__c6xabi_divlli
__c6xabi_remlli
__c6xabi_divull
__c6xabi_remull
__c6xabi_divremull
__c6xabi_gef
__c6xabi_gtf
__c6xabi_lef
__c6xabi_ltf
__c6xabi_eqf
__c6xabi_ged
__c6xabi_gtd
__c6xabi_led
__c6xabi_ltd
__c6xabi_eqd
__c6xabi_addf
__c6xabi_divf
__c6xabi_neqf
__c6xabi_cmpf
__c6xabi_mpyf
__c6xabi_negf
__c6xabi_subf
__c6xabi_unordf
__c6xabi_fixfi
__c6xabi_fltif
__c6xabi_fltuf
__c6xabi_addd
__c6xabi_divd
__c6xabi_neqd
__c6xabi_cmpd
__c6xabi_mpyd
__c6xabi_negd
__c6xabi_subd
__c6xabi_unordd
__c6xabi_fixdi
__c6xabi_fltid
__c6xabi_fltud
__c6xabi_cvtfd
__c6xabi_cvtdf
__c6xabi_mulcf
__c6xabi_mulcd
__c6xabi_divcf
__c6xabi_divcd
__gnu_ltsf2
__gnu_ltdf2
__gnu_gesf2
__gnu_gedf2
__gnu_gtsf2
__gnu_gtdf2
__gnu_eqsf2
__gnu_eqdf2
# Exception-Handling
_Unwind_Complete
_Unwind_VRS_Get
_Unwind_VRS_Set
_Unwind_VRS_Pop
__c6xabi_unwind_cpp_pr0
__c6xabi_unwind_cpp_pr1
__c6xabi_unwind_cpp_pr2
__c6xabi_unwind_cpp_pr3
__c6xabi_unwind_cpp_pr4
# The libstdc++ exception-handling personality routine uses this
# GNU-specific entry point.
__gnu_unwind_frame
}
/* Software floating-point emulation.
Return 1 iff a < b, 0 otherwise.
Copyright (C) 1997,1999,2006,2007,2011 Free Software Foundation, Inc.
Contributed by Richard Henderson (rth@cygnus.com) and
Jakub Jelinek (jj@ultra.linux.cz).
This file is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
In addition to the permissions in the GNU Lesser General Public
License, the Free Software Foundation gives you unlimited
permission to link the compiled version of this file into
combinations with other programs, and to distribute those
combinations without any restriction coming from the use of this
file. (The Lesser General Public License restrictions do apply in
other respects; for example, they cover modification of the file,
and distribution when not linked into a combine executable.)
This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with GCC; see the file COPYING.LIB. If not see
<http://www.gnu.org/licenses/>. */
#include "config/soft-fp/soft-fp.h"
#include "config/soft-fp/double.h"
CMPtype __c6xabi_ltd(DFtype a, DFtype b)
{
FP_DECL_EX;
FP_DECL_D(A); FP_DECL_D(B);
CMPtype r;
FP_UNPACK_RAW_D(A, a);
FP_UNPACK_RAW_D(B, b);
FP_CMP_D(r, A, B, 2);
if (r == 2 && (FP_ISSIGNAN_D(A) || FP_ISSIGNAN_D(B)))
FP_SET_EXCEPTION(FP_EX_INVALID);
FP_HANDLE_EXCEPTIONS;
return r < 0;
}
/* Software floating-point emulation.
Return 1 iff a < b, 0 otherwise.
Copyright (C) 1997,1999,2006,2007,2011 Free Software Foundation, Inc.
Contributed by Richard Henderson (rth@cygnus.com) and
Jakub Jelinek (jj@ultra.linux.cz).
This file is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
In addition to the permissions in the GNU Lesser General Public
License, the Free Software Foundation gives you unlimited
permission to link the compiled version of this file into
combinations with other programs, and to distribute those
combinations without any restriction coming from the use of this
file. (The Lesser General Public License restrictions do apply in
other respects; for example, they cover modification of the file,
and distribution when not linked into a combine executable.)
This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with GCC; see the file COPYING.LIB. If not see
<http://www.gnu.org/licenses/>. */
#include "config/soft-fp/soft-fp.h"
#include "config/soft-fp/single.h"
CMPtype __c6xabi_ltf(SFtype a, SFtype b)
{
FP_DECL_EX;
FP_DECL_S(A); FP_DECL_S(B);
CMPtype r;
FP_UNPACK_RAW_S(A, a);
FP_UNPACK_RAW_S(B, b);
FP_CMP_S(r, A, B, 2);
if (r == 2 && (FP_ISSIGNAN_S(A) || FP_ISSIGNAN_S(B)))
FP_SET_EXCEPTION(FP_EX_INVALID);
FP_HANDLE_EXCEPTIONS;
return r < 0;
}
/* Predicates for TI C6X
Copyright (C) 2010, 2011 Free Software Foundation, Inc.
Contributed by Andrew Jenner <andrew@codesourcery.com>
Contributed by Bernd Schmidt <bernds@codesourcery.com>
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
(define_predicate "reg_or_const_int_operand"
(ior (match_operand 0 "register_operand")
(match_operand 0 "const_int_operand")))
(define_predicate "const_vector_operand"
(match_code "const_vector"))
(define_predicate "scst5_operand"
(and (match_operand 0 "const_int_operand")
(match_test "satisfies_constraint_Is5 (op)")))
(define_predicate "reg_or_ucst4_operand"
(ior (match_operand 0 "register_operand")
(and (match_operand 0 "const_int_operand")
(match_test "satisfies_constraint_Iu4 (op)"))))
(define_predicate "reg_or_scst5_operand"
(ior (match_operand 0 "register_operand")
(match_operand 0 "scst5_operand")))
(define_predicate "reg_or_ucst5_operand"
(ior (match_operand 0 "register_operand")
(and (match_operand 0 "const_int_operand")
(match_test "satisfies_constraint_Iu5 (op)"))))
(define_predicate "addsi_operand"
(ior (match_operand 0 "register_operand")
(and (match_operand 0 "const_int_operand")
(match_test "satisfies_constraint_IsB (op)"))))
(define_predicate "andsi_operand"
(ior (match_operand 0 "reg_or_scst5_operand")
(and (match_operand 0 "const_int_operand")
(match_test "satisfies_constraint_Jc (op)"))))
(define_predicate "iorsi_operand"
(ior (match_operand 0 "reg_or_scst5_operand")
(and (match_operand 0 "const_int_operand")
(match_test "satisfies_constraint_Js (op)"))))
(define_predicate "insv_operand"
(and (match_operand 0 "const_int_operand")
(match_test "INTVAL (op) == 0 || INTVAL (op) == -1")))
(define_predicate "c6x_jump_operand"
(match_code "label_ref,symbol_ref,reg"))
(define_predicate "c6x_call_operand"
(ior (match_code "symbol_ref,reg")
(and (match_code "subreg")
(match_test "GET_CODE (XEXP (op, 0)) == REG")))
{
/* The linker transforms jumps to undefined weak symbols in a way that
is incompatible with our code generation. */
return (GET_CODE (op) != SYMBOL_REF
|| (!SYMBOL_REF_WEAK (op)
&& !c6x_long_call_p (op)));
})
;; Returns 1 if OP is a symbolic operand, i.e. a symbol_ref or a label_ref,
;; possibly with an offset.
(define_predicate "symbolic_operand"
(ior (match_code "symbol_ref,label_ref")
(and (match_code "const")
(match_test "GET_CODE (XEXP (op,0)) == PLUS
&& (GET_CODE (XEXP (XEXP (op, 0), 0)) == SYMBOL_REF
|| GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF)
&& GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT"))))
(define_predicate "const_int_or_symbolic_operand"
(ior (match_operand 0 "symbolic_operand")
(match_operand 0 "const_int_operand")))
;; Return nonzero iff OP is one of the integer constants 2, 4 or 8.
(define_predicate "adda_scale_operand"
(and (match_code "const_int")
(match_test "INTVAL (op) == 2 || INTVAL (op) == 4
|| ((TARGET_INSNS_64 || TARGET_INSNS_67)
&& INTVAL (op) == 8)")))
;; Return nonzero iff OP is one of the integer constants 2 or 4.
(define_predicate "suba_scale_operand"
(and (match_code "const_int")
(match_test "INTVAL (op) == 2 || INTVAL (op) == 4")))
;; True if this operator is valid for predication.
(define_predicate "predicate_operator"
(match_code "eq,ne"))
(define_predicate "c6x_comparison_operator"
(match_code "eq,ltu,gtu,lt,gt"))
(define_predicate "non_c6x_comparison_operator"
(match_code "ne,leu,geu,le,ge"))
;; FP Comparisons handled by c6x_expand_compare.
(define_predicate "c6x_fp_comparison_operator"
(ior (match_code "eq,lt,gt,le,ge")
(and (match_test "TARGET_FP")
(match_code "ltgt,uneq,unlt,ungt,unle,unge,ordered,unordered"))))
(define_predicate "c6x_any_comparison_operand"
(match_code "eq,lt,gt,le,ge,ltu,gtu")
{
rtx op0 = XEXP (op, 0);
rtx op1 = XEXP (op, 1);
if (ltugtu_operator (op, SImode)
&& register_operand (op0, SImode)
&& ((TARGET_INSNS_64 && reg_or_ucst5_operand (op1, SImode))
|| (!TARGET_INSNS_64 && reg_or_ucst4_operand (op1, SImode))))
return true;
if (eqltgt_operator (op, SImode)
&& register_operand (op0, SImode)
&& reg_or_scst5_operand (op1, SImode))
return true;
if (!TARGET_FP)
return false;
if (!eqltgt_operator (op, SFmode) && !eqltgt_operator (op, DFmode))
return false;
if (register_operand (op0, GET_MODE (op))
&& register_operand (op1, GET_MODE (op)))
return true;
return false;
})
(define_predicate "ltugtu_operator"
(match_code "ltu,gtu"))
(define_predicate "eqltgt_operator"
(match_code "eq,lt,gt"))
(define_predicate "eqne_operator"
(match_code "eq,ne"))
(define_predicate "predicate_register"
(and (match_code "reg")
(ior (match_test "REGNO_REG_CLASS (REGNO (op)) == PREDICATE_A_REGS")
(match_test "REGNO_REG_CLASS (REGNO (op)) == PREDICATE_B_REGS"))))
;; Allow const_ints for things like the real_mult patterns.
(define_predicate "a_register"
(ior (and (match_code "reg")
(match_test "A_REGNO_P (REGNO (op))"))
(and (match_code "const_int")
(match_test "A_REGNO_P (INTVAL (op))"))))
(define_predicate "b_register"
(ior (and (match_code "reg")
(match_test "B_REGNO_P (REGNO (op))"))
(and (match_code "const_int")
(match_test "B_REGNO_P (INTVAL (op))"))))
(define_predicate "pic_register_operand"
(and (match_code "reg")
(match_test "op == pic_offset_table_rtx")))
;; True if OP refers to a symbol in the sdata section.
(define_predicate "sdata_symbolic_operand"
(match_code "symbol_ref,const")
{
HOST_WIDE_INT offset = 0, size = 0;
tree t;
switch (GET_CODE (op))
{
case CONST:
op = XEXP (op, 0);
if (GET_CODE (op) != PLUS
|| GET_CODE (XEXP (op, 0)) != SYMBOL_REF
|| GET_CODE (XEXP (op, 1)) != CONST_INT)
return false;
offset = INTVAL (XEXP (op, 1));
op = XEXP (op, 0);
/* FALLTHRU */
case SYMBOL_REF:
/* For shared libraries, only allow symbols we know are local.
For executables, the linker knows to create copy relocs if
necessary so we can use DP-relative addressing for all small
objects. */
if ((c6x_initial_flag_pic && !SYMBOL_REF_LOCAL_P (op))
|| !SYMBOL_REF_SMALL_P (op))
return false;
/* Note that in addition to DECLs, we can get various forms
of constants here. */
t = SYMBOL_REF_DECL (op);
if (DECL_P (t))
t = DECL_SIZE_UNIT (t);
else
t = TYPE_SIZE_UNIT (TREE_TYPE (t));
if (t && host_integerp (t, 0))
{
size = tree_low_cst (t, 0);
if (size < 0)
size = 0;
}
/* Don't allow addressing outside the object. */
return (offset >= 0 && offset <= size);
default:
gcc_unreachable ();
}
})
/* Soft-FP definitions for TI C6X.
Copyright (C) 2010, 2011 Free Software Foundation, Inc.
This files is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
In addition to the permissions in the GNU Lesser General Public
License, the Free Software Foundation gives you unlimited
permission to link the compiled version of this file into
combinations with other programs, and to distribute those
combinations without any restriction coming from the use of this
file. (The Lesser General Public License restrictions do apply in
other respects; for example, they cover modification of the file,
and distribution when not linked into a combine executable.)
This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with GCC; see the file COPYING.LIB. If not see
<http://www.gnu.org/licenses/>. */
#define _FP_W_TYPE_SIZE 32
#define _FP_W_TYPE unsigned long
#define _FP_WS_TYPE signed long
#define _FP_I_TYPE long
#define _FP_MUL_MEAT_S(R,X,Y) \
_FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
#define _FP_MUL_MEAT_D(R,X,Y) \
_FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
#define _FP_MUL_MEAT_Q(R,X,Y) \
_FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_loop(S,R,X,Y)
#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)
#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
#define _FP_NANFRAC_H ((_FP_QNANBIT_H << 1) - 1)
#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1
#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
#define _FP_NANSIGN_H 0
#define _FP_NANSIGN_S 0
#define _FP_NANSIGN_D 0
#define _FP_NANSIGN_Q 0
#define _FP_KEEPNANFRACP 1
/* Someone please check this. */
#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
do { \
if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \
&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \
{ \
R##_s = Y##_s; \
_FP_FRAC_COPY_##wc(R,Y); \
} \
else \
{ \
R##_s = X##_s; \
_FP_FRAC_COPY_##wc(R,X); \
} \
R##_c = FP_CLS_NAN; \
} while (0)
#define __LITTLE_ENDIAN 1234
#define __BIG_ENDIAN 4321
#if defined _BIG_ENDIAN
# define __BYTE_ORDER __BIG_ENDIAN
#else
# define __BYTE_ORDER __LITTLE_ENDIAN
#endif
/* Define ALIASNAME as a strong alias for NAME. */
# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
# define _strong_alias(name, aliasname) \
extern __typeof (name) aliasname __attribute__ ((alias (#name)));
/* Rename helper functions to the names specified in the C6000 ELF ABI. */
#define __fixdfsi __c6xabi_fixdi
#define __fixsfsi __c6xabi_fixfi
#define __floatsidf __c6xabi_fltid
#define __floatunsidf __c6xabi_fltud
#define __floatsisf __c6xabi_fltif
#define __floatunsisf __c6xabi_fltuf
#define __truncdfsf2 __c6xabi_cvtdf
#define __extendsfdf2 __c6xabi_cvtfd
#define __adddf3 __c6xabi_addd
#define __subdf3 __c6xabi_subd
#define __muldf3 __c6xabi_mpyd
#define __divdf3 __c6xabi_divd
#define __negdf2 __c6xabi_negd
#define __absdf2 __c6xabi_absd
#define __addsf3 __c6xabi_addf
#define __subsf3 __c6xabi_subf
#define __mulsf3 __c6xabi_mpyf
#define __divsf3 __c6xabi_divf
#define __negsf2 __c6xabi_negf
#define __abssf2 __c6xabi_absf
#define __lesf2 __c6xabi_cmpf
#define __ledf2 __c6xabi_cmpd
#define __ltsf2 __gnu_ltsf2
#define __ltdf2 __gnu_ltdf2
#define __gesf2 __gnu_gesf2
#define __gedf2 __gnu_gedf2
#define __gtsf2 __gnu_gtsf2
#define __gtdf2 __gnu_gtdf2
#define __eqsf2 __gnu_eqsf2
#define __eqdf2 __gnu_eqdf2
#define __nesf2 __c6xabi_neqf
#define __nedf2 __c6xabi_neqd
#define __unordsf2 __c6xabi_unordf
#define __unorddf2 __c6xabi_unordd
;; GCC machine description for C6X synchronization instructions.
;; Copyright (C) 2011 Free Software Foundation, Inc.
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify
;; it under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful,
;; but WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;; GNU General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>.
;; C64X+ has atomic instructions, but they are not atomic on all
;; devices and have other problems. We use normal loads and stores,
;; and place them in overlapping branch shadows to ensure interrupts
;; are disabled during the sequence, which guarantees atomicity on all
;; single-core systems.
(define_code_iterator FETCHOP [plus minus ior xor and])
(define_code_attr fetchop_name
[(plus "add") (minus "sub") (ior "ior") (xor "xor") (and "and")])
(define_code_attr fetchop_pred
[(plus "reg_or_scst5_operand") (minus "register_operand")
(ior "reg_or_scst5_operand") (xor "reg_or_scst5_operand")
(and "reg_or_scst5_operand")])
(define_code_attr fetchop_constr
[(plus "bIs5") (minus "b") (ior "bIs5") (xor "bIs5") (and "bIs5")])
(define_code_attr fetchop_opcode
[(plus "add") (minus "sub") (ior "or") (xor "xor") (and "and")])
(define_code_attr fetchop_inops02
[(plus "%2, %0") (minus "%0, %2") (ior "%2, %0") (xor "%2, %0")
(and "%2, %0")])
(define_code_attr fetchop_inops21
[(plus "%1, %2") (minus "%2, %1") (ior "%1, %2") (xor "%1, %2")
(and "%1, %2")])
(define_expand "sync_compare_and_swapsi"
[(parallel
[(set (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "memory_operand" ""))
(set (match_dup 1)
(unspec_volatile:SI
[(match_operand:SI 2 "register_operand" "")
(match_operand:SI 3 "register_operand" "")]
UNSPECV_CAS))
(clobber (match_scratch:SI 4 ""))])]
""
{
})
(define_expand "sync_<fetchop_name>si"
[(parallel
[(set (match_operand:SI 0 "memory_operand" "")
(unspec:SI
[(FETCHOP:SI (match_dup 0)
(match_operand:SI 1 "<fetchop_pred>" ""))]
UNSPEC_ATOMIC))
(clobber (match_scratch:SI 2 ""))])]
""
{
})
(define_expand "sync_old_<fetchop_name>si"
[(parallel
[(set (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "memory_operand" ""))
(set (match_dup 1)
(unspec:SI
[(FETCHOP:SI (match_dup 1)
(match_operand:SI 2 "<fetchop_pred>" ""))]
UNSPEC_ATOMIC))
(clobber (match_scratch:SI 3 ""))])]
""
{
})
(define_expand "sync_new_<fetchop_name>si"
[(parallel
[(set (match_operand:SI 0 "register_operand" "")
(FETCHOP:SI (match_operand:SI 1 "memory_operand" "")
(match_operand:SI 2 "<fetchop_pred>" "")))
(set (match_dup 1)
(unspec:SI [(FETCHOP:SI (match_dup 1) (match_dup 2))]
UNSPEC_ATOMIC))
(clobber (match_scratch:SI 3 ""))])]
""
{
})
(define_expand "sync_nandsi"
[(parallel
[(set (match_operand:SI 0 "memory_operand" "")
(unspec:SI
[(not:SI (and:SI (match_dup 0)
(match_operand:SI 1 "reg_or_scst5_operand" "")))]
UNSPEC_ATOMIC))
(clobber (match_scratch:SI 2 ""))])]
""
{
})
(define_expand "sync_old_nandsi"
[(parallel
[(set (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "memory_operand" ""))
(set (match_dup 1)
(unspec:SI
[(not:SI (and:SI (match_dup 1)
(match_operand:SI 2 "reg_or_scst5_operand" "")))]
UNSPEC_ATOMIC))
(clobber (match_scratch:SI 3 ""))])]
""
{
})
(define_expand "sync_new_nandsi"
[(parallel
[(set (match_operand:SI 0 "register_operand" "")
(not:SI (and:SI (match_operand:SI 1 "memory_operand" "")
(match_operand:SI 2 "reg_or_scst5_operand" ""))))
(set (match_dup 1)
(unspec:SI [(not:SI (and:SI (match_dup 1) (match_dup 2)))]
UNSPEC_ATOMIC))
(clobber (match_scratch:SI 3 ""))])]
""
{
})
(define_insn "*sync_compare_and_swapsi"
[(set (match_operand:SI 0 "register_operand" "=&b")
(match_operand:SI 1 "memory_operand" "+m"))
(set (match_dup 1)
(unspec_volatile:SI
[(match_operand:SI 2 "register_operand" "B")
(match_operand:SI 3 "register_operand" "b")]
UNSPECV_CAS))
(clobber (match_scratch:SI 4 "=&B"))]
""
"0: b .s2 1f ; 0\n\\
|| ldw .d%U1t%U0 %1, %0\n\\
nop 4\n\\
|| b .s2 2f ; 1\n\\
cmpeq .l2 %0, %2, %2 ; 5\n\\
1: [%2] stw .d%U1t%U3 %3, %1 ; 6\n\\
2:"
[(set_attr "type" "atomic")])
(define_insn "sync_<fetchop_name>si_insn"
[(set (match_operand:SI 0 "memory_operand" "+m")
(unspec:SI
[(FETCHOP:SI (match_dup 0)
(match_operand:SI 1 "<fetchop_pred>" "<fetchop_constr>"))]
UNSPEC_ATOMIC))
(clobber (match_scratch:SI 2 "=&B"))]
""
"0: b .s2 1f ; 0\n\\
|| ldw .d%U0t%U2 %0, %2\n\\
nop 4\n\\
|| b .s2 2f ; 1\n\\
<fetchop_opcode> .l2 <fetchop_inops21>, %2 ; 5\n\\
1: stw .d%U0t%U2 %2, %0 ; 6\n\\
2:"
[(set_attr "type" "atomic")])
(define_insn "sync_old_<fetchop_name>si_insn"
[(set (match_operand:SI 0 "register_operand" "=&b")
(match_operand:SI 1 "memory_operand" "+m"))
(set (match_dup 1)
(unspec:SI
[(FETCHOP:SI (match_dup 1)
(match_operand:SI 2 "<fetchop_pred>" "<fetchop_constr>"))]
UNSPEC_ATOMIC))
(clobber (match_scratch:SI 3 "=&B"))]
""
"0: b .s2 1f ; 0\n\\
|| ldw .d%U1t%U0 %1, %0\n\\
nop 4\n\\
|| b .s2 2f ; 1\n\\
<fetchop_opcode> .l2 <fetchop_inops02>, %3 ; 5\n\\
1: stw .d%U1t%U3 %3, %1 ; 6\n\\
2:"
[(set_attr "type" "atomic")])
(define_insn "sync_new_<fetchop_name>si_insn"
[(set (match_operand:SI 0 "register_operand" "=&b")
(FETCHOP:SI (match_operand:SI 1 "memory_operand" "+m")
(match_operand:SI 2 "<fetchop_pred>" "<fetchop_constr>")))
(set (match_dup 1)
(unspec:SI
[(FETCHOP:SI (match_dup 1)
(match_dup 2))]
UNSPEC_ATOMIC))
(clobber (match_scratch:SI 3 "=&B"))]
""
"0: b .s2 1f ; 0\n\\
|| ldw .d%U1t%U0 %1, %0\n\\
nop 4\n\\
|| b .s2 2f ; 1\n\\
<fetchop_opcode> .l2 <fetchop_inops02>, %0 ; 5\n\\
1: stw .d%U1t%U0 %0, %1 ; 6\n\\
2:"
[(set_attr "type" "atomic")])
(define_insn "sync_nandsi_insn"
[(set (match_operand:SI 0 "memory_operand" "+m")
(unspec:SI
[(not:SI (and:SI (match_dup 0)
(match_operand:SI 1 "reg_or_scst5_operand" "bIs5")))]
UNSPEC_ATOMIC))
(clobber (match_scratch:SI 2 "=&B"))]
""
"0: b .s2 1f ; 0\n\\
|| ldw .d%U0t%U2 %0, %2\n\\
nop 1\n\\
nop 3\n\\
|| b .s2 2f ; 2\n\\
and .l2 %1, %2, %2 ; 5\n\\
1: not .l2 %2, %2 ; 6\n\\
stw .d%U0t%U2 %2, %0 ; 7\n\\
2:"
[(set_attr "type" "atomic")])
(define_insn "sync_old_nandsi_insn"
[(set (match_operand:SI 0 "register_operand" "=&b")
(match_operand:SI 1 "memory_operand" "+m"))
(set (match_dup 1)
(unspec:SI
[(not:SI (and:SI (match_dup 1)
(match_operand:SI 2 "reg_or_scst5_operand" "bIs5")))]
UNSPEC_ATOMIC))
(clobber (match_scratch:SI 3 "=&B"))]
""
"0: b .s2 1f ; 0\n\\
|| ldw .d%U1t%U0 %1, %0\n\\
nop 1\n\\
nop 3\n\\
|| b .s2 2f ; 2\n\\
and .l2 %2, %0, %3 ; 5\n\\
1: not .l2 %3, %3 ; 6\n\\
stw .d%U1t%U3 %3, %1 ; 7\n\\
2:"
[(set_attr "type" "atomic")])
(define_insn "sync_new_nandsi_insn"
[(set (match_operand:SI 0 "register_operand" "=&b")
(not:SI (and:SI (match_operand:SI 1 "memory_operand" "+m")
(match_operand:SI 2 "reg_or_scst5_operand" "bIs5"))))
(set (match_dup 1)
(unspec:SI
[(not:SI (and:SI (match_dup 1) (match_dup 2)))]
UNSPEC_ATOMIC))
(clobber (match_scratch:SI 3 "=&B"))]
""
"0: b .s2 1f ; 0\n\\
|| ldw .d%U1t%U0 %1, %0\n\\
nop 1\n\\
nop 3\n\\
|| b .s2 2f ; 2\n\\
and .l2 %2, %0, %0 ; 5\n\\
1: not .l2 %0, %0 ; 6\n\\
stw .d%U1t%U0 %0, %1 ; 7\n\\
2:"
[(set_attr "type" "atomic")])
# Target Makefile Fragment for TI C6X.
# Copyright (C) 2010, 2011
# Free Software Foundation, Inc.
# Contributed by CodeSourcery.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published
# by the Free Software Foundation; either version 3, or (at your
# option) any later version.
#
# GCC is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
# License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
MD_INCLUDES= $(srcdir)/config/c6x/constraints.md \
$(srcdir)/config/c6x/predicates.md \
$(srcdir)/config/c6x/c6x-mult.md \
$(srcdir)/config/c6x/c6x-sched.md
s-config s-conditions s-flags s-codes s-constants s-emit s-recog s-preds \
s-opinit s-extract s-peep s-attr s-attrtab s-output: $(MD_INCLUDES)
$(srcdir)/config/c6x/c6x-sched.md: $(srcdir)/config/c6x/gensched.sh \
$(srcdir)/config/c6x/c6x-sched.md.in
$(SHELL) $(srcdir)/config/c6x/gensched.sh \
$(srcdir)/config/c6x/c6x-sched.md.in > $@
$(srcdir)/config/c6x/c6x-mult.md: $(srcdir)/config/c6x/genmult.sh \
$(srcdir)/config/c6x/c6x-mult.md.in
$(SHELL) $(srcdir)/config/c6x/genmult.sh \
$(srcdir)/config/c6x/c6x-mult.md.in > $@
$(srcdir)/config/c6x/c6x-tables.opt: $(srcdir)/config/c6x/genopt.sh \
$(srcdir)/config/c6x/c6x-isas.def
$(SHELL) $(srcdir)/config/c6x/genopt.sh $(srcdir)/config/c6x > \
$(srcdir)/config/c6x/c6x-tables.opt
# Target Makefile Fragment for TI C6X using ELF.
# Copyright (C) 2010, 2011 Free Software Foundation, Inc.
# Contributed by CodeSourcery.
#
# This file is part of GCC.
#
# GCC is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published
# by the Free Software Foundation; either version 3, or (at your
# option) any later version.
#
# GCC is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
# License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
LIB1ASMSRC = c6x/lib1funcs.asm
LIB1ASMFUNCS = _divsi3 _udivsi3 _umodsi3 _modsi3 _udivmodsi4 _divmodsi4
LIB1ASMFUNCS += _strasgi _strasgi_64plus _clzsi2 _clzdi2 _clz
LIB1ASMFUNCS += _push_rts _pop_rts _call_stub
LIB2FUNCS_EXCLUDE = _cmpdi2 _ucmpdi2 _gcc_bcmp _eprintf _clzsi _clzdi
LIB2FUNCS_EXTRA = $(srcdir)/config/c6x/gef.c \
$(srcdir)/config/c6x/gtf.c \
$(srcdir)/config/c6x/lef.c \
$(srcdir)/config/c6x/ltf.c \
$(srcdir)/config/c6x/eqf.c \
$(srcdir)/config/c6x/ged.c \
$(srcdir)/config/c6x/gtd.c \
$(srcdir)/config/c6x/led.c \
$(srcdir)/config/c6x/ltd.c \
$(srcdir)/config/c6x/eqd.c
# Use this variant for fully testing all CPU types
#MULTILIB_OPTIONS = mbig-endian march=c674x/march=c64x/march=c67x/march=c67x+/march=c62x
#MULTILIB_DIRNAMES = be c674x c64x c67x c67x+ c62x
MULTILIB_OPTIONS = mbig-endian march=c674x
MULTILIB_DIRNAMES = be c674x
MULTILIB_EXCEPTIONS =
MULTILIB_MATCHES =
# Assemble startup files.
$(T)crti.o: $(srcdir)/config/c6x/crti.s $(GCC_PASSES)
$(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
-c -o $(T)crti.o $(CRTSTUFF_T_CFLAGS) -x assembler-with-cpp \
$(srcdir)/config/c6x/crti.s
$(T)crtn.o: $(srcdir)/config/c6x/crtn.s $(GCC_PASSES)
$(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
-c -o $(T)crtn.o $(CRTSTUFF_T_CFLAGS) -x assembler-with-cpp \
$(srcdir)/config/c6x/crtn.s
EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crtbeginS.o crtendS.o crti.o crtn.o
# Avoid failures when the user's GOT becomes too large.
CRTSTUFF_T_CFLAGS = -msdata=none
CRTSTUFF_T_CFLAGS_S = -msdata=none
TARGET_LIBGCC2_CFLAGS = -msdata=none
SHLIB_MAPFILES += $(srcdir)/config/c6x/libgcc-c6xeabi.ver
softfp_float_modes := sf df
softfp_int_modes := si di
softfp_extensions := sfdf
softfp_truncations := dfsf
softfp_machine_header := c6x/sfp-machine.h
softfp_exclude_libgcc2 := y
# softfp seems to be missing a whole bunch of prototypes.
TARGET_LIBGCC2_CFLAGS += -Wno-missing-prototypes
MULTILIB_OSDIRNAMES = march.c674x=!c674x
MULTILIB_OSDIRNAMES += mbig-endian=!be
MULTILIB_OSDIRNAMES += mbig-endian/march.c674x=!be/c674x
CRTSTUFF_T_CFLAGS = -fPIC -msdata=none
CRTSTUFF_T_CFLAGS_S = -fPIC -msdata=none
TARGET_LIBGCC2_CFLAGS = -fPIC -msdata=none
/* Definitions for TI C6X running ucLinux using ELF
Copyright (C) 2010, 2011 Free Software Foundation, Inc.
Contributed by Andrew Jenner <andrew@codesourcery.com>
Contributed by Bernd Schmidt <bernds@codesourcery.com>
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#undef TARGET_OS_CPP_BUILTINS
#define TARGET_OS_CPP_BUILTINS() \
do \
{ \
builtin_define ("__uClinux__"); \
builtin_define_std ("linux"); \
builtin_define_std ("unix"); \
builtin_assert ("system=linux"); \
builtin_assert ("system=unix"); \
builtin_assert ("system=posix"); \
} \
while (false)
#undef STARTFILE_SPEC
#define STARTFILE_SPEC \
"%{!shared:crt1%O%s} crti%O%s %{shared|pie:crtbeginS.o%s;:crtbegin.o%s}"
#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
#undef LINK_SPEC
#define LINK_SPEC ENDIAN_LINK_SPEC \
"%{shared} %{fpie|fPIE:-pie} \
%{!shared: %{!static: \
%{rdynamic:-export-dynamic} \
%{!dynamic-linker:-dynamic-linker " UCLIBC_DYNAMIC_LINKER "}} \
%{static}}"
#undef DRIVER_SELF_SPECS
#define DRIVER_SELF_SPECS "%{!mno-dsbt:-mdsbt}"
/* Clear the instruction cache from `beg' to `end'. This makes an
inline system call to SYS_cacheflush. */
#undef CLEAR_INSN_CACHE
#define CLEAR_INSN_CACHE(BEG, END) \
{ \
register unsigned long _beg __asm ("A4") = (unsigned long) (BEG); \
register unsigned long _end __asm ("B4") = (unsigned long) (END); \
register unsigned long _scno __asm ("B0") = 244; \
__asm __volatile ("swe ; sys_cache_sync" \
: "=a" (_beg) \
: "0" (_beg), "b" (_end), "b" (_scno)); \
}
...@@ -806,8 +806,8 @@ Tobias Schl@"uter for work on GNU Fortran. ...@@ -806,8 +806,8 @@ Tobias Schl@"uter for work on GNU Fortran.
@item @item
Bernd Schmidt for various code generation improvements and major Bernd Schmidt for various code generation improvements and major
work in the reload pass as well a serving as release manager for work in the reload pass, serving as release manager for
GCC 2.95.3. GCC 2.95.3, and work on the Blackfin and C6X ports.
@item @item
Peter Schmid for constant testing of libstdc++---especially application Peter Schmid for constant testing of libstdc++---especially application
......
...@@ -7975,6 +7975,7 @@ instructions, but allow the compiler to schedule those calls. ...@@ -7975,6 +7975,7 @@ instructions, but allow the compiler to schedule those calls.
* RX Built-in Functions:: * RX Built-in Functions::
* SPARC VIS Built-in Functions:: * SPARC VIS Built-in Functions::
* SPU Built-in Functions:: * SPU Built-in Functions::
* TI C6X Built-in Functions::
@end menu @end menu
@node Alpha Built-in Functions @node Alpha Built-in Functions
...@@ -12793,6 +12794,45 @@ specification is supported. Internally, GCC uses built-in functions to ...@@ -12793,6 +12794,45 @@ specification is supported. Internally, GCC uses built-in functions to
implement the required functionality, but these are not supported and implement the required functionality, but these are not supported and
are subject to change without notice. are subject to change without notice.
@node TI C6X Built-in Functions
@subsection TI C6X Built-in Functions
GCC provides intrinsics to access certain instructions of the TI C6X
processors. These intrinsics, listed below, are available after
inclusion of the @code{c6x_intrinsics.h} header file. They map directly
to C6X instructions.
@smallexample
int _sadd (int, int)
int _ssub (int, int)
int _sadd2 (int, int)
int _ssub2 (int, int)
long long _mpy2 (int, int)
long long _smpy2 (int, int)
int _add4 (int, int)
int _sub4 (int, int)
int _saddu4 (int, int)
int _smpy (int, int)
int _smpyh (int, int)
int _smpyhl (int, int)
int _smpylh (int, int)
int _sshl (int, int)
int _subc (int, int)
int _avg2 (int, int)
int _avgu4 (int, int)
int _clrr (int, int)
int _extr (int, int)
int _extru (int, int)
int _abs (int)
int _abs2 (int)
@end smallexample
@node Target Format Checks @node Target Format Checks
@section Format Checks Specific to Particular Target Machines @section Format Checks Specific to Particular Target Machines
......
...@@ -3071,6 +3071,8 @@ information are. ...@@ -3071,6 +3071,8 @@ information are.
@item @item
@uref{#sparcv9-x-solaris2,,sparcv9-*-solaris2*} @uref{#sparcv9-x-solaris2,,sparcv9-*-solaris2*}
@item @item
@uref{#c6x-x-x,,c6x-*-*}
@item
@uref{#x-x-vxworks,,*-*-vxworks*} @uref{#x-x-vxworks,,*-*-vxworks*}
@item @item
@uref{#x86-64-x-x,,x86_64-*-*, amd64-*-*} @uref{#x86-64-x-x,,x86_64-*-*, amd64-*-*}
...@@ -4382,6 +4384,13 @@ This is a synonym for @samp{sparc64-*-solaris2*}. ...@@ -4382,6 +4384,13 @@ This is a synonym for @samp{sparc64-*-solaris2*}.
@html @html
<hr /> <hr />
@end html @end html
@heading @anchor{c6x-x-x}c6x-*-*
The C6X family of processors. This port requires binutils-2.22 or newer.
@html
<hr />
@end html
@heading @anchor{x-x-vxworks}*-*-vxworks* @heading @anchor{x-x-vxworks}*-*-vxworks*
Support for VxWorks is in flux. At present GCC supports @emph{only} the Support for VxWorks is in flux. At present GCC supports @emph{only} the
very recent VxWorks 5.5 (aka Tornado 2.2) release, and only on PowerPC@. very recent VxWorks 5.5 (aka Tornado 2.2) release, and only on PowerPC@.
......
...@@ -496,6 +496,10 @@ Objective-C and Objective-C++ Dialects}. ...@@ -496,6 +496,10 @@ Objective-C and Objective-C++ Dialects}.
-mfast-fp -minline-plt -mmulticore -mcorea -mcoreb -msdram @gol -mfast-fp -minline-plt -mmulticore -mcorea -mcoreb -msdram @gol
-micplb} -micplb}
@emph{C6X Options}
@gccoptlist{-mbig-endian -mlittle-endian -march=@var{cpu} @gol
-msim -msdata=@var{sdata-type}}
@emph{CRIS Options} @emph{CRIS Options}
@gccoptlist{-mcpu=@var{cpu} -march=@var{cpu} -mtune=@var{cpu} @gol @gccoptlist{-mcpu=@var{cpu} -march=@var{cpu} -mtune=@var{cpu} @gol
-mmax-stack-frame=@var{n} -melinux-stacksize=@var{n} @gol -mmax-stack-frame=@var{n} -melinux-stacksize=@var{n} @gol
...@@ -10091,6 +10095,7 @@ platform. ...@@ -10091,6 +10095,7 @@ platform.
* ARM Options:: * ARM Options::
* AVR Options:: * AVR Options::
* Blackfin Options:: * Blackfin Options::
* C6X Options::
* CRIS Options:: * CRIS Options::
* Darwin Options:: * Darwin Options::
* DEC Alpha Options:: * DEC Alpha Options::
...@@ -10755,6 +10760,54 @@ anomaly workarounds. For Linux targets, the default is to assume ICPLBs ...@@ -10755,6 +10760,54 @@ anomaly workarounds. For Linux targets, the default is to assume ICPLBs
are enabled; for standalone applications the default is off. are enabled; for standalone applications the default is off.
@end table @end table
@node C6X Options
@subsection C6X Options
@cindex C6X Options
@table @gcctabopt
@item -march=@var{name}
@opindex march
This specifies the name of the target architecture. GCC uses this
name to determine what kind of instructions it can emit when generating
assembly code. Permissible names are: @samp{c62x},
@samp{c64x}, @samp{c64x+}, @samp{c67x}, @samp{c67x+}, @samp{c674x}.
@item -mbig-endian
@opindex mbig-endian
Generate code for a big endian target.
@item -mlittle-endian
@opindex mlittle-endian
Generate code for a little endian target. This is the default.
@item -msim
@opindex msim
Choose startup files and linker script suitable for the simulator.
@item -msdata=default
@opindex msdata=default
Put small global and static data in the @samp{.neardata} section,
which is pointed to by register @code{B14}. Put small uninitialized
global and static data in the @samp{.bss} section, which is adjacent
to the @samp{.neardata} section. Put small read-only data into the
@samp{.rodata} section. The corresponding sections used for large
pieces of data are @samp{.fardata}, @samp{.far} and @samp{.const}.
@item -msdata=all
@opindex msdata=all
Put all data, not just small objets, into the sections reserved for
small data, and use addressing relative to the @code{B14} register to
access them.
@item -msdata=none
@opindex msdata=none
Make no use of the sections reserved for small data, and use absolute
addresses to access all data. Put all initialized global and static
data in the @samp{.fardata} section, and all uninitialized data in the
@samp{.far} section. Put all constant data into the @samp{.const}
section.
@end table
@node CRIS Options @node CRIS Options
@subsection CRIS Options @subsection CRIS Options
@cindex CRIS Options @cindex CRIS Options
......
...@@ -3304,6 +3304,89 @@ The constant 0. ...@@ -3304,6 +3304,89 @@ The constant 0.
@end table @end table
@item TI C6X family---@file{config/c6x/constraints.md}
@table @code
@item a
Register file A (A0--A31).
@item b
Register file B (B0--B31).
@item A
Predicate registers in register file A (A0--A2 on C64X and
higher, A1 and A2 otherwise).
@item B
Predicate registers in register file B (B0--B2).
@item C
A call-used register in register file B (B0--B9, B16--B31).
@item Da
Register file A, excluding predicate registers (A3--A31,
plus A0 if not C64X or higher).
@item Db
Register file B, excluding predicate registers (B3--B31).
@item Iu4
Integer constant in the range 0 @dots{} 15.
@item Iu5
Integer constant in the range 0 @dots{} 31.
@item In5
Integer constant in the range @minus{}31 @dots{} 0.
@item Is5
Integer constant in the range @minus{}16 @dots{} 15.
@item I5x
Integer constant that can be the operand of an ADDA or a SUBA insn.
@item IuB
Integer constant in the range 0 @dots{} 65535.
@item IsB
Integer constant in the range @minus{}32768 @dots{} 32767.
@item IsC
Integer constant in the range @math{-2^{20}} @dots{} @math{2^{20} - 1}.
@item Jc
Integer constant that is a valid mask for the clr instruction.
@item Js
Integer constant that is a valid mask for the set instruction.
@item Q
Memory location with A base register.
@item R
Memory location with B base register.
@ifset INTERNALS
@item S0
On C64x+ targets, a GP-relative small data reference.
@item S1
Any kind of @code{SYMBOL_REF}, for use in a call address.
@item Si
Any kind of immediate operand, unless it matches the S0 constraint.
@item T
Memory location with B base register, but not using a long offset.
@item W
A memory operand with an address that can't be used in an unaligned access.
@end ifset
@item Z
Register B14 (aka DP).
@end table
@item Xtensa---@file{config/xtensa/constraints.md} @item Xtensa---@file{config/xtensa/constraints.md}
@table @code @table @code
@item a @item a
......
...@@ -1389,6 +1389,36 @@ UDItype __umulsidi3 (USItype, USItype); ...@@ -1389,6 +1389,36 @@ UDItype __umulsidi3 (USItype, USItype);
} while (0) } while (0)
#endif /* __vax__ */ #endif /* __vax__ */
#ifdef _TMS320C6X
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
do \
{ \
UDItype __ll; \
__asm__ ("addu .l1 %1, %2, %0" \
: "=a" (__ll) : "a" (al), "a" (bl)); \
(sl) = (USItype)__ll; \
(sh) = ((USItype)(__ll >> 32)) + (ah) + (bh); \
} \
while (0)
#ifdef _TMS320C6400_PLUS
#define __umulsidi3(u,v) ((UDItype)(USItype)u*(USItype)v)
#define umul_ppmm(w1, w0, u, v) \
do { \
UDItype __x = (UDItype) (USItype) (u) * (USItype) (v); \
(w1) = (USItype) (__x >> 32); \
(w0) = (USItype) (__x); \
} while (0)
#endif /* _TMS320C6400_PLUS */
#define count_leading_zeros(count, x) ((count) = __builtin_clz (x))
#ifdef _TMS320C6400
#define count_trailing_zeros(count, x) ((count) = __builtin_ctz (x))
#endif
#define UMUL_TIME 4
#define UDIV_TIME 40
#endif /* _TMS320C6X */
#if defined (__xtensa__) && W_TYPE_SIZE == 32 #if defined (__xtensa__) && W_TYPE_SIZE == 32
/* This code is not Xtensa-configuration-specific, so rely on the compiler /* This code is not Xtensa-configuration-specific, so rely on the compiler
to expand builtin functions depending on what configuration features to expand builtin functions depending on what configuration features
......
2011-07-15 Bernd Schmidt <bernds@codesourcery.com>
* config.host: Handle tic6x-*-*.
* config/c6x/c6x-abi.h: New file.
2011-07-13 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> 2011-07-13 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* config/i386/crtprec.c: New file. * config/i386/crtprec.c: New file.
......
...@@ -146,6 +146,9 @@ sh[123456789lbe]*-*-*) ...@@ -146,6 +146,9 @@ sh[123456789lbe]*-*-*)
v850*-*-*) v850*-*-*)
cpu_type=v850 cpu_type=v850
;; ;;
tic6x-*-*)
cpu_type=c6x
;;
esac esac
# Common parts for widely ported systems. # Common parts for widely ported systems.
...@@ -662,6 +665,9 @@ sparc64-*-netbsd*) ...@@ -662,6 +665,9 @@ sparc64-*-netbsd*)
;; ;;
spu-*-elf*) spu-*-elf*)
;; ;;
tic6x-*-*)
tmake_file="${tmake_file} t-gnu-prefix"
;;
v850*-*-*) v850*-*-*)
;; ;;
vax-*-linux*) vax-*-linux*)
......
/* Header file for C6X ABI versions of libgcc functions.
Copyright (C) 2011
Free Software Foundation, Inc.
Contributed by Bernd Schmidt <bernds@codesourcery.com>
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* Make __c6xabi_AEABI_NAME an alias for __GCC_NAME. */
#define RENAME_LIBRARY(GCC_NAME, AEABI_NAME) \
__asm__ (".globl\t__c6xabi_" #AEABI_NAME "\n" \
".set\t__c6xabi_" #AEABI_NAME \
", __gnu_" #GCC_NAME "\n");
/* Rename helper functions to the names specified in the C6000 ELF ABI. */
#ifdef L_divsi3
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (divsi3, divi)
#endif
#ifdef L_divdi3
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (divdi3, divlli)
#endif
#ifdef L_udivsi3
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (udivsi3, divu)
#endif
#ifdef L_udivdi3
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (udivdi3, divull)
#endif
#ifdef L_udivmoddi4
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (udivmoddi4, divremull)
#endif
#ifdef L_modsi3
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (modsi3, remi)
#endif
#ifdef L_moddi3
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (moddi3, remlli)
#endif
#ifdef L_umodsi3
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (umodsi3, remu)
#endif
#ifdef L_umoddi3
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (umoddi3, remull)
#endif
#ifdef L_negdi2
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (negdi2, negll)
#endif
#ifdef L_muldi3
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (muldi3, mpyll)
#endif
#ifdef L_ashrdi3
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (ashrdi3, llshr)
#endif
#ifdef L_lshrdi3
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (lshrdi3, llshru)
#endif
#ifdef L_ashldi3
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (ashldi3, llshl)
#endif
/* The following are excluded from softfp due to softfp_exclude_libgcc2,
so we rename them here rather than in sfp-machine.h. */
#ifdef L_fixdfdi
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixdfdi, fixdlli)
#endif
#ifdef L_fixunsdfsi
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunsdfsi, fixdu)
#endif
#ifdef L_fixunsdfdi
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunsdfdi, fixdull)
#endif
#ifdef L_fixsfdi
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixsfdi, fixflli)
#endif
#ifdef L_fixunssfsi
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunssfsi, fixfu)
#endif
#ifdef L_fixunssfdi
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunssfdi, fixfull)
#endif
#ifdef L_floatdidf
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatdidf, fltllid)
#endif
#ifdef L_floatundidf
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatundidf, fltulld)
#endif
#ifdef L_floatdisf
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatdisf, fltllif)
#endif
#ifdef L_floatundisf
#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatundisf, fltullf)
#endif
#define LIBGCC2_GNU_PREFIX
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