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riscv-gcc-1
Commit bcd48995 by Alex Velenko Committed by Marcus Shawcroft
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[AArch64] 64-bit float vreinterpret implemention 

This patch introduces vreinterpret implementation for vectors with
64-bit float lanes and adds testcase for those intrinsics.

From-SVN: r209642
parent 0bf3afc1
Showing with 996 additions and 0 deletions
gcc/ChangeLog
2014-04-22 Alex Velenko <Alex.Velenko@arm.com> 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
* config/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
(aarch64_types_signed_unsigned_qualifiers): Qualifier added.
(aarch64_types_signed_poly_qualifiers): Likewise.
(aarch64_types_unsigned_signed_qualifiers): Likewise.
(aarch64_types_poly_signed_qualifiers): Likewise.
(TYPES_REINTERP_SS): Type macro added.
(TYPES_REINTERP_SU): Likewise.
(TYPES_REINTERP_SP): Likewise.
(TYPES_REINTERP_US): Likewise.
(TYPES_REINTERP_PS): Likewise.
(aarch64_fold_builtin): New expression folding added.
* config/aarch64/aarch64-simd-builtins.def (REINTERP):
Declarations removed.
(REINTERP_SS): Declarations added.
(REINTERP_US): Likewise.
(REINTERP_PS): Likewise.
(REINTERP_SU): Likewise.
(REINTERP_SP): Likewise.
* config/aarch64/arm_neon.h (vreinterpret_p8_f64): Implemented.
(vreinterpretq_p8_f64): Likewise.
(vreinterpret_p16_f64): Likewise.
(vreinterpretq_p16_f64): Likewise.
(vreinterpret_f32_f64): Likewise.
(vreinterpretq_f32_f64): Likewise.
(vreinterpret_f64_f32): Likewise.
(vreinterpret_f64_p8): Likewise.
(vreinterpret_f64_p16): Likewise.
(vreinterpret_f64_s8): Likewise.
(vreinterpret_f64_s16): Likewise.
(vreinterpret_f64_s32): Likewise.
(vreinterpret_f64_s64): Likewise.
(vreinterpret_f64_u8): Likewise.
(vreinterpret_f64_u16): Likewise.
(vreinterpret_f64_u32): Likewise.
(vreinterpret_f64_u64): Likewise.
(vreinterpretq_f64_f32): Likewise.
(vreinterpretq_f64_p8): Likewise.
(vreinterpretq_f64_p16): Likewise.
(vreinterpretq_f64_s8): Likewise.
(vreinterpretq_f64_s16): Likewise.
(vreinterpretq_f64_s32): Likewise.
(vreinterpretq_f64_s64): Likewise.
(vreinterpretq_f64_u8): Likewise.
(vreinterpretq_f64_u16): Likewise.
(vreinterpretq_f64_u32): Likewise.
(vreinterpretq_f64_u64): Likewise.
(vreinterpret_s64_f64): Likewise.
(vreinterpretq_s64_f64): Likewise.
(vreinterpret_u64_f64): Likewise.
(vreinterpretq_u64_f64): Likewise.
(vreinterpret_s8_f64): Likewise.
(vreinterpretq_s8_f64): Likewise.
(vreinterpret_s16_f64): Likewise.
(vreinterpretq_s16_f64): Likewise.
(vreinterpret_s32_f64): Likewise.
(vreinterpretq_s32_f64): Likewise.
(vreinterpret_u8_f64): Likewise.
(vreinterpretq_u8_f64): Likewise.
(vreinterpret_u16_f64): Likewise.
(vreinterpretq_u16_f64): Likewise.
(vreinterpret_u32_f64): Likewise.
(vreinterpretq_u32_f64): Likewise.
2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
* config/aarch64/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed. * config/aarch64/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
* config/aarch64/aarch64/aarch64-simd-builtins.def (REINTERP): Removed. * config/aarch64/aarch64/aarch64-simd-builtins.def (REINTERP): Removed.
(vreinterpret_p8_s8): Likewise. (vreinterpret_p8_s8): Likewise.
......
gcc/config/aarch64/aarch64-builtins.c
...@@ -147,6 +147,23 @@ aarch64_types_unopu_qualifiers[SIMD_MAX_BUILTIN_ARGS] ...@@ -147,6 +147,23 @@ aarch64_types_unopu_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_unsigned, qualifier_unsigned }; = { qualifier_unsigned, qualifier_unsigned };
#define TYPES_UNOPU (aarch64_types_unopu_qualifiers) #define TYPES_UNOPU (aarch64_types_unopu_qualifiers)
#define TYPES_CREATE (aarch64_types_unop_qualifiers) #define TYPES_CREATE (aarch64_types_unop_qualifiers)
#define TYPES_REINTERP_SS (aarch64_types_unop_qualifiers)
static enum aarch64_type_qualifiers
aarch64_types_unop_su_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_none, qualifier_unsigned };
#define TYPES_REINTERP_SU (aarch64_types_unop_su_qualifiers)
static enum aarch64_type_qualifiers
aarch64_types_unop_sp_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_none, qualifier_poly };
#define TYPES_REINTERP_SP (aarch64_types_unop_sp_qualifiers)
static enum aarch64_type_qualifiers
aarch64_types_unop_us_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_unsigned, qualifier_none };
#define TYPES_REINTERP_US (aarch64_types_unop_us_qualifiers)
static enum aarch64_type_qualifiers
aarch64_types_unop_ps_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_poly, qualifier_none };
#define TYPES_REINTERP_PS (aarch64_types_unop_ps_qualifiers)
static enum aarch64_type_qualifiers static enum aarch64_type_qualifiers
aarch64_types_binop_qualifiers[SIMD_MAX_BUILTIN_ARGS] aarch64_types_binop_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_none, qualifier_none, qualifier_maybe_immediate }; = { qualifier_none, qualifier_none, qualifier_maybe_immediate };
...@@ -1128,6 +1145,25 @@ aarch64_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED, tree *args, ...@@ -1128,6 +1145,25 @@ aarch64_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED, tree *args,
return fold_build2 (NE_EXPR, type, and_node, vec_zero_node); return fold_build2 (NE_EXPR, type, and_node, vec_zero_node);
break; break;
} }
VAR1 (REINTERP_SS, reinterpretdi, 0, df)
VAR1 (REINTERP_SS, reinterpretv8qi, 0, df)
VAR1 (REINTERP_SS, reinterpretv4hi, 0, df)
VAR1 (REINTERP_SS, reinterpretv2si, 0, df)
VAR1 (REINTERP_SS, reinterpretv2sf, 0, df)
BUILTIN_VD (REINTERP_SS, reinterpretdf, 0)
BUILTIN_VD (REINTERP_SU, reinterpretdf, 0)
VAR1 (REINTERP_US, reinterpretdi, 0, df)
VAR1 (REINTERP_US, reinterpretv8qi, 0, df)
VAR1 (REINTERP_US, reinterpretv4hi, 0, df)
VAR1 (REINTERP_US, reinterpretv2si, 0, df)
VAR1 (REINTERP_US, reinterpretv2sf, 0, df)
BUILTIN_VD (REINTERP_SP, reinterpretdf, 0)
VAR1 (REINTERP_PS, reinterpretdi, 0, df)
VAR1 (REINTERP_PS, reinterpretv8qi, 0, df)
VAR1 (REINTERP_PS, reinterpretv4hi, 0, df)
VAR1 (REINTERP_PS, reinterpretv2si, 0, df)
VAR1 (REINTERP_PS, reinterpretv2sf, 0, df)
return fold_build1 (VIEW_CONVERT_EXPR, type, args[0]);
VAR1 (UNOP, floatv2si, 2, v2sf) VAR1 (UNOP, floatv2si, 2, v2sf)
VAR1 (UNOP, floatv4si, 2, v4sf) VAR1 (UNOP, floatv4si, 2, v4sf)
VAR1 (UNOP, floatv2di, 2, v2df) VAR1 (UNOP, floatv2di, 2, v2df)
......
gcc/config/aarch64/aarch64-simd-builtins.def
...@@ -51,6 +51,28 @@ ...@@ -51,6 +51,28 @@
VAR1 (GETLANE, get_lane, 0, di) VAR1 (GETLANE, get_lane, 0, di)
BUILTIN_VALL (GETLANE, be_checked_get_lane, 0) BUILTIN_VALL (GETLANE, be_checked_get_lane, 0)
VAR1 (REINTERP_SS, reinterpretdi, 0, df)
VAR1 (REINTERP_SS, reinterpretv8qi, 0, df)
VAR1 (REINTERP_SS, reinterpretv4hi, 0, df)
VAR1 (REINTERP_SS, reinterpretv2si, 0, df)
VAR1 (REINTERP_SS, reinterpretv2sf, 0, df)
BUILTIN_VD (REINTERP_SS, reinterpretdf, 0)
BUILTIN_VD (REINTERP_SU, reinterpretdf, 0)
VAR1 (REINTERP_US, reinterpretdi, 0, df)
VAR1 (REINTERP_US, reinterpretv8qi, 0, df)
VAR1 (REINTERP_US, reinterpretv4hi, 0, df)
VAR1 (REINTERP_US, reinterpretv2si, 0, df)
VAR1 (REINTERP_US, reinterpretv2sf, 0, df)
BUILTIN_VD (REINTERP_SP, reinterpretdf, 0)
VAR1 (REINTERP_PS, reinterpretdi, 0, df)
VAR1 (REINTERP_PS, reinterpretv8qi, 0, df)
VAR1 (REINTERP_PS, reinterpretv4hi, 0, df)
VAR1 (REINTERP_PS, reinterpretv2si, 0, df)
VAR1 (REINTERP_PS, reinterpretv2sf, 0, df)
BUILTIN_VDQ_I (BINOP, dup_lane, 0) BUILTIN_VDQ_I (BINOP, dup_lane, 0)
/* Implemented by aarch64_<sur>q<r>shl<mode>. */ /* Implemented by aarch64_<sur>q<r>shl<mode>. */
......
gcc/config/aarch64/aarch64-simd.md
...@@ -2259,6 +2259,15 @@ ...@@ -2259,6 +2259,15 @@
DONE; DONE;
}) })
(define_expand "aarch64_reinterpretdf<mode>"
[(match_operand:DF 0 "register_operand" "")
(match_operand:VD_RE 1 "register_operand" "")]
"TARGET_SIMD"
{
aarch64_simd_reinterpret (operands[0], operands[1]);
DONE;
})
(define_expand "aarch64_reinterpretv16qi<mode>" (define_expand "aarch64_reinterpretv16qi<mode>"
[(match_operand:V16QI 0 "register_operand" "") [(match_operand:V16QI 0 "register_operand" "")
(match_operand:VQ 1 "register_operand" "")] (match_operand:VQ 1 "register_operand" "")]
......
gcc/config/aarch64/arm_neon.h
...@@ -2655,6 +2655,12 @@ vgetq_lane_u64 (uint64x2_t __a, const int __b) ...@@ -2655,6 +2655,12 @@ vgetq_lane_u64 (uint64x2_t __a, const int __b)
/* vreinterpret */ /* vreinterpret */
__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
vreinterpret_p8_f64 (float64x1_t __a)
{
return __builtin_aarch64_reinterpretv8qidf_ps (__a);
}
__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
vreinterpret_p8_s8 (int8x8_t __a) vreinterpret_p8_s8 (int8x8_t __a)
{ {
return (poly8x8_t) __a; return (poly8x8_t) __a;
...@@ -2715,6 +2721,12 @@ vreinterpret_p8_p16 (poly16x4_t __a) ...@@ -2715,6 +2721,12 @@ vreinterpret_p8_p16 (poly16x4_t __a)
} }
__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) __extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
vreinterpretq_p8_f64 (float64x2_t __a)
{
return (poly8x16_t) __a;
}
__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
vreinterpretq_p8_s8 (int8x16_t __a) vreinterpretq_p8_s8 (int8x16_t __a)
{ {
return (poly8x16_t) __a; return (poly8x16_t) __a;
...@@ -2775,6 +2787,12 @@ vreinterpretq_p8_p16 (poly16x8_t __a) ...@@ -2775,6 +2787,12 @@ vreinterpretq_p8_p16 (poly16x8_t __a)
} }
__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) __extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
vreinterpret_p16_f64 (float64x1_t __a)
{
return __builtin_aarch64_reinterpretv4hidf_ps (__a);
}
__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
vreinterpret_p16_s8 (int8x8_t __a) vreinterpret_p16_s8 (int8x8_t __a)
{ {
return (poly16x4_t) __a; return (poly16x4_t) __a;
...@@ -2835,6 +2853,12 @@ vreinterpret_p16_p8 (poly8x8_t __a) ...@@ -2835,6 +2853,12 @@ vreinterpret_p16_p8 (poly8x8_t __a)
} }
__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) __extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
vreinterpretq_p16_f64 (float64x2_t __a)
{
return (poly16x8_t) __a;
}
__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
vreinterpretq_p16_s8 (int8x16_t __a) vreinterpretq_p16_s8 (int8x16_t __a)
{ {
return (poly16x8_t) __a; return (poly16x8_t) __a;
...@@ -2895,6 +2919,12 @@ vreinterpretq_p16_p8 (poly8x16_t __a) ...@@ -2895,6 +2919,12 @@ vreinterpretq_p16_p8 (poly8x16_t __a)
} }
__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
vreinterpret_f32_f64 (float64x1_t __a)
{
return __builtin_aarch64_reinterpretv2sfdf (__a);
}
__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
vreinterpret_f32_s8 (int8x8_t __a) vreinterpret_f32_s8 (int8x8_t __a)
{ {
return (float32x2_t) __a; return (float32x2_t) __a;
...@@ -2955,6 +2985,12 @@ vreinterpret_f32_p16 (poly16x4_t __a) ...@@ -2955,6 +2985,12 @@ vreinterpret_f32_p16 (poly16x4_t __a)
} }
__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
vreinterpretq_f32_f64 (float64x2_t __a)
{
return (float32x4_t) __a;
}
__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
vreinterpretq_f32_s8 (int8x16_t __a) vreinterpretq_f32_s8 (int8x16_t __a)
{ {
return (float32x4_t) __a; return (float32x4_t) __a;
...@@ -3014,6 +3050,144 @@ vreinterpretq_f32_p16 (poly16x8_t __a) ...@@ -3014,6 +3050,144 @@ vreinterpretq_f32_p16 (poly16x8_t __a)
return (float32x4_t) __a; return (float32x4_t) __a;
} }
__extension__ static __inline float64x1_t __attribute__((__always_inline__))
vreinterpret_f64_f32 (float32x2_t __a)
{
return __builtin_aarch64_reinterpretdfv2sf (__a);
}
__extension__ static __inline float64x1_t __attribute__((__always_inline__))
vreinterpret_f64_p8 (poly8x8_t __a)
{
return __builtin_aarch64_reinterpretdfv8qi_sp (__a);
}
__extension__ static __inline float64x1_t __attribute__((__always_inline__))
vreinterpret_f64_p16 (poly16x4_t __a)
{
return __builtin_aarch64_reinterpretdfv4hi_sp (__a);
}
__extension__ static __inline float64x1_t __attribute__((__always_inline__))
vreinterpret_f64_s8 (int8x8_t __a)
{
return __builtin_aarch64_reinterpretdfv8qi (__a);
}
__extension__ static __inline float64x1_t __attribute__((__always_inline__))
vreinterpret_f64_s16 (int16x4_t __a)
{
return __builtin_aarch64_reinterpretdfv4hi (__a);
}
__extension__ static __inline float64x1_t __attribute__((__always_inline__))
vreinterpret_f64_s32 (int32x2_t __a)
{
return __builtin_aarch64_reinterpretdfv2si (__a);
}
__extension__ static __inline float64x1_t __attribute__((__always_inline__))
vreinterpret_f64_s64 (int64x1_t __a)
{
return __builtin_aarch64_createdf ((uint64_t) vget_lane_s64 (__a, 0));
}
__extension__ static __inline float64x1_t __attribute__((__always_inline__))
vreinterpret_f64_u8 (uint8x8_t __a)
{
return __builtin_aarch64_reinterpretdfv8qi_su (__a);
}
__extension__ static __inline float64x1_t __attribute__((__always_inline__))
vreinterpret_f64_u16 (uint16x4_t __a)
{
return __builtin_aarch64_reinterpretdfv4hi_su (__a);
}
__extension__ static __inline float64x1_t __attribute__((__always_inline__))
vreinterpret_f64_u32 (uint32x2_t __a)
{
return __builtin_aarch64_reinterpretdfv2si_su (__a);
}
__extension__ static __inline float64x1_t __attribute__((__always_inline__))
vreinterpret_f64_u64 (uint64x1_t __a)
{
return __builtin_aarch64_createdf (vget_lane_u64 (__a, 0));
}
__extension__ static __inline float64x2_t __attribute__((__always_inline__))
vreinterpretq_f64_f32 (float32x4_t __a)
{
return (float64x2_t) __a;
}
__extension__ static __inline float64x2_t __attribute__((__always_inline__))
vreinterpretq_f64_p8 (poly8x16_t __a)
{
return (float64x2_t) __a;
}
__extension__ static __inline float64x2_t __attribute__((__always_inline__))
vreinterpretq_f64_p16 (poly16x8_t __a)
{
return (float64x2_t) __a;
}
__extension__ static __inline float64x2_t __attribute__((__always_inline__))
vreinterpretq_f64_s8 (int8x16_t __a)
{
return (float64x2_t) __a;
}
__extension__ static __inline float64x2_t __attribute__((__always_inline__))
vreinterpretq_f64_s16 (int16x8_t __a)
{
return (float64x2_t) __a;
}
__extension__ static __inline float64x2_t __attribute__((__always_inline__))
vreinterpretq_f64_s32 (int32x4_t __a)
{
return (float64x2_t) __a;
}
__extension__ static __inline float64x2_t __attribute__((__always_inline__))
vreinterpretq_f64_s64 (int64x2_t __a)
{
return (float64x2_t) __a;
}
__extension__ static __inline float64x2_t __attribute__((__always_inline__))
vreinterpretq_f64_u8 (uint8x16_t __a)
{
return (float64x2_t) __a;
}
__extension__ static __inline float64x2_t __attribute__((__always_inline__))
vreinterpretq_f64_u16 (uint16x8_t __a)
{
return (float64x2_t) __a;
}
__extension__ static __inline float64x2_t __attribute__((__always_inline__))
vreinterpretq_f64_u32 (uint32x4_t __a)
{
return (float64x2_t) __a;
}
__extension__ static __inline float64x2_t __attribute__((__always_inline__))
vreinterpretq_f64_u64 (uint64x2_t __a)
{
return (float64x2_t) __a;
}
__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
vreinterpret_s64_f64 (float64x1_t __a)
{
return __builtin_aarch64_reinterpretdidf (__a);
}
__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) __extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
vreinterpret_s64_s8 (int8x8_t __a) vreinterpret_s64_s8 (int8x8_t __a)
{ {
...@@ -3075,6 +3249,12 @@ vreinterpret_s64_p16 (poly16x4_t __a) ...@@ -3075,6 +3249,12 @@ vreinterpret_s64_p16 (poly16x4_t __a)
} }
__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
vreinterpretq_s64_f64 (float64x2_t __a)
{
return (int64x2_t) __a;
}
__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
vreinterpretq_s64_s8 (int8x16_t __a) vreinterpretq_s64_s8 (int8x16_t __a)
{ {
return (int64x2_t) __a; return (int64x2_t) __a;
...@@ -3135,6 +3315,12 @@ vreinterpretq_s64_p16 (poly16x8_t __a) ...@@ -3135,6 +3315,12 @@ vreinterpretq_s64_p16 (poly16x8_t __a)
} }
__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
vreinterpret_u64_f64 (float64x1_t __a)
{
return __builtin_aarch64_reinterpretdidf_us (__a);
}
__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
vreinterpret_u64_s8 (int8x8_t __a) vreinterpret_u64_s8 (int8x8_t __a)
{ {
return (uint64x1_t) __a; return (uint64x1_t) __a;
...@@ -3195,6 +3381,12 @@ vreinterpret_u64_p16 (poly16x4_t __a) ...@@ -3195,6 +3381,12 @@ vreinterpret_u64_p16 (poly16x4_t __a)
} }
__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
vreinterpretq_u64_f64 (float64x2_t __a)
{
return (uint64x2_t) __a;
}
__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
vreinterpretq_u64_s8 (int8x16_t __a) vreinterpretq_u64_s8 (int8x16_t __a)
{ {
return (uint64x2_t) __a; return (uint64x2_t) __a;
...@@ -3255,6 +3447,12 @@ vreinterpretq_u64_p16 (poly16x8_t __a) ...@@ -3255,6 +3447,12 @@ vreinterpretq_u64_p16 (poly16x8_t __a)
} }
__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) __extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
vreinterpret_s8_f64 (float64x1_t __a)
{
return __builtin_aarch64_reinterpretv8qidf (__a);
}
__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
vreinterpret_s8_s16 (int16x4_t __a) vreinterpret_s8_s16 (int16x4_t __a)
{ {
return (int8x8_t) __a; return (int8x8_t) __a;
...@@ -3315,6 +3513,12 @@ vreinterpret_s8_p16 (poly16x4_t __a) ...@@ -3315,6 +3513,12 @@ vreinterpret_s8_p16 (poly16x4_t __a)
} }
__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) __extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
vreinterpretq_s8_f64 (float64x2_t __a)
{
return (int8x16_t) __a;
}
__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
vreinterpretq_s8_s16 (int16x8_t __a) vreinterpretq_s8_s16 (int16x8_t __a)
{ {
return (int8x16_t) __a; return (int8x16_t) __a;
...@@ -3375,6 +3579,12 @@ vreinterpretq_s8_p16 (poly16x8_t __a) ...@@ -3375,6 +3579,12 @@ vreinterpretq_s8_p16 (poly16x8_t __a)
} }
__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) __extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
vreinterpret_s16_f64 (float64x1_t __a)
{
return __builtin_aarch64_reinterpretv4hidf (__a);
}
__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
vreinterpret_s16_s8 (int8x8_t __a) vreinterpret_s16_s8 (int8x8_t __a)
{ {
return (int16x4_t) __a; return (int16x4_t) __a;
...@@ -3435,6 +3645,12 @@ vreinterpret_s16_p16 (poly16x4_t __a) ...@@ -3435,6 +3645,12 @@ vreinterpret_s16_p16 (poly16x4_t __a)
} }
__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) __extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
vreinterpretq_s16_f64 (float64x2_t __a)
{
return (int16x8_t) __a;
}
__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
vreinterpretq_s16_s8 (int8x16_t __a) vreinterpretq_s16_s8 (int8x16_t __a)
{ {
return (int16x8_t) __a; return (int16x8_t) __a;
...@@ -3495,6 +3711,12 @@ vreinterpretq_s16_p16 (poly16x8_t __a) ...@@ -3495,6 +3711,12 @@ vreinterpretq_s16_p16 (poly16x8_t __a)
} }
__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
vreinterpret_s32_f64 (float64x1_t __a)
{
return __builtin_aarch64_reinterpretv2sidf (__a);
}
__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
vreinterpret_s32_s8 (int8x8_t __a) vreinterpret_s32_s8 (int8x8_t __a)
{ {
return (int32x2_t) __a; return (int32x2_t) __a;
...@@ -3555,6 +3777,12 @@ vreinterpret_s32_p16 (poly16x4_t __a) ...@@ -3555,6 +3777,12 @@ vreinterpret_s32_p16 (poly16x4_t __a)
} }
__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
vreinterpretq_s32_f64 (float64x2_t __a)
{
return (int32x4_t) __a;
}
__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
vreinterpretq_s32_s8 (int8x16_t __a) vreinterpretq_s32_s8 (int8x16_t __a)
{ {
return (int32x4_t) __a; return (int32x4_t) __a;
...@@ -3615,6 +3843,12 @@ vreinterpretq_s32_p16 (poly16x8_t __a) ...@@ -3615,6 +3843,12 @@ vreinterpretq_s32_p16 (poly16x8_t __a)
} }
__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
vreinterpret_u8_f64 (float64x1_t __a)
{
return __builtin_aarch64_reinterpretv8qidf_us (__a);
}
__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
vreinterpret_u8_s8 (int8x8_t __a) vreinterpret_u8_s8 (int8x8_t __a)
{ {
return (uint8x8_t) __a; return (uint8x8_t) __a;
...@@ -3675,6 +3909,12 @@ vreinterpret_u8_p16 (poly16x4_t __a) ...@@ -3675,6 +3909,12 @@ vreinterpret_u8_p16 (poly16x4_t __a)
} }
__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
vreinterpretq_u8_f64 (float64x2_t __a)
{
return (uint8x16_t) __a;
}
__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
vreinterpretq_u8_s8 (int8x16_t __a) vreinterpretq_u8_s8 (int8x16_t __a)
{ {
return (uint8x16_t) __a; return (uint8x16_t) __a;
...@@ -3735,6 +3975,12 @@ vreinterpretq_u8_p16 (poly16x8_t __a) ...@@ -3735,6 +3975,12 @@ vreinterpretq_u8_p16 (poly16x8_t __a)
} }
__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
vreinterpret_u16_f64 (float64x1_t __a)
{
return __builtin_aarch64_reinterpretv4hidf_us (__a);
}
__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
vreinterpret_u16_s8 (int8x8_t __a) vreinterpret_u16_s8 (int8x8_t __a)
{ {
return (uint16x4_t) __a; return (uint16x4_t) __a;
...@@ -3795,6 +4041,12 @@ vreinterpret_u16_p16 (poly16x4_t __a) ...@@ -3795,6 +4041,12 @@ vreinterpret_u16_p16 (poly16x4_t __a)
} }
__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
vreinterpretq_u16_f64 (float64x2_t __a)
{
return (uint16x8_t) __a;
}
__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
vreinterpretq_u16_s8 (int8x16_t __a) vreinterpretq_u16_s8 (int8x16_t __a)
{ {
return (uint16x8_t) __a; return (uint16x8_t) __a;
...@@ -3855,6 +4107,12 @@ vreinterpretq_u16_p16 (poly16x8_t __a) ...@@ -3855,6 +4107,12 @@ vreinterpretq_u16_p16 (poly16x8_t __a)
} }
__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
vreinterpret_u32_f64 (float64x1_t __a)
{
return __builtin_aarch64_reinterpretv2sidf_us (__a);
}
__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
vreinterpret_u32_s8 (int8x8_t __a) vreinterpret_u32_s8 (int8x8_t __a)
{ {
return (uint32x2_t) __a; return (uint32x2_t) __a;
...@@ -3915,6 +4173,12 @@ vreinterpret_u32_p16 (poly16x4_t __a) ...@@ -3915,6 +4173,12 @@ vreinterpret_u32_p16 (poly16x4_t __a)
} }
__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
vreinterpretq_u32_f64 (float64x2_t __a)
{
return (uint32x4_t) __a;
}
__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
vreinterpretq_u32_s8 (int8x16_t __a) vreinterpretq_u32_s8 (int8x16_t __a)
{ {
return (uint32x4_t) __a; return (uint32x4_t) __a;
......
gcc/testsuite/ChangeLog
2014-04-22 Alex Velenko <Alex.Velenko@arm.com> 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
* gcc.target/aarch64/vreinterpret_f64_1.c: New.
2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
* gcc.target/aarch64/vqneg_s64_1.c: New testcase. * gcc.target/aarch64/vqneg_s64_1.c: New testcase.
* gcc.target/aarch64/vqabs_s64_1.c: New testcase. * gcc.target/aarch64/vqabs_s64_1.c: New testcase.
......
gcc/testsuite/gcc.target/aarch64/vreinterpret_f64_1.c 0 → 100644
/* Test vreinterpret_f64_* and vreinterpret_*_f64 intrinsics work correctly. */
/* { dg-do run } */
/* { dg-options "-O3" } */
#include <arm_neon.h>
extern void abort (void);
#define ABS(a) __builtin_fabs (a)
#define ISNAN(a) __builtin_isnan (a)
#define DOUBLE_EQUALS(a, b, epsilon) \
( \
((a) == (b)) \
|| (ISNAN (a) && ISNAN (b)) \
|| (ABS (a - b) < epsilon) \
)
/* Pi accurate up to 16 digits.
Further digits are a closest binary approximation. */
#define PI_F64 3.14159265358979311599796346854
/* Hex representation in Double (IEEE754 Double precision 64-bit) is:
0x400921FB54442D18. */
/* E accurate up to 16 digits.
Further digits are a closest binary approximation. */
#define E_F64 2.71828182845904509079559829843
/* Hex representation in Double (IEEE754 Double precision 64-bit) is:
0x4005BF0A8B145769. */
float32x2_t __attribute__ ((noinline))
wrap_vreinterpret_f32_f64 (float64x1_t __a)
{
return vreinterpret_f32_f64 (__a);
}
int __attribute__ ((noinline))
test_vreinterpret_f32_f64 ()
{
float64x1_t a;
float32x2_t b;
float64_t c[1] = { PI_F64 };
/* Values { 0x54442D18, 0x400921FB } reinterpreted as f32. */
float32_t d[2] = { 3.3702805504E12, 2.1426990032196044921875E0 };
float32_t e[2];
int i;
a = vld1_f64 (c);
b = wrap_vreinterpret_f32_f64 (a);
vst1_f32 (e, b);
for (i = 0; i < 2; i++)
if (!DOUBLE_EQUALS (d[i], e[i], __FLT_EPSILON__))
return 1;
return 0;
};
int8x8_t __attribute__ ((noinline))
wrap_vreinterpret_s8_f64 (float64x1_t __a)
{
return vreinterpret_s8_f64 (__a);
}
int __attribute__ ((noinline))
test_vreinterpret_s8_f64 ()
{
float64x1_t a;
int8x8_t b;
float64_t c[1] = { PI_F64 };
int8_t d[8] = { 0x18, 0x2D, 0x44, 0x54, 0xFB, 0x21, 0x09, 0x40 };
int8_t e[8];
int i;
a = vld1_f64 (c);
b = wrap_vreinterpret_s8_f64 (a);
vst1_s8 (e, b);
for (i = 0; i < 8; i++)
if (d[i] != e[i])
return 1;
return 0;
};
int16x4_t __attribute__ ((noinline))
wrap_vreinterpret_s16_f64 (float64x1_t __a)
{
return vreinterpret_s16_f64 (__a);
}
int __attribute__ ((noinline))
test_vreinterpret_s16_f64 ()
{
float64x1_t a;
int16x4_t b;
float64_t c[1] = { PI_F64 };
int16_t d[4] = { 0x2D18, 0x5444, 0x21FB, 0x4009 };
int16_t e[4];
int i;
a = vld1_f64 (c);
b = wrap_vreinterpret_s16_f64 (a);
vst1_s16 (e, b);
for (i = 0; i < 4; i++)
if (d[i] != e[i])
return 1;
return 0;
};
int32x2_t __attribute__ ((noinline))
wrap_vreinterpret_s32_f64 (float64x1_t __a)
{
return vreinterpret_s32_f64 (__a);
}
int __attribute__ ((noinline))
test_vreinterpret_s32_f64 ()
{
float64x1_t a;
int32x2_t b;
float64_t c[1] = { PI_F64 };
int32_t d[2] = { 0x54442D18, 0x400921FB };
int32_t e[2];
int i;
a = vld1_f64 (c);
b = wrap_vreinterpret_s32_f64 (a);
vst1_s32 (e, b);
for (i = 0; i < 2; i++)
if (d[i] != e[i])
return 1;
return 0;
};
int64x1_t __attribute__ ((noinline))
wrap_vreinterpret_s64_f64 (float64x1_t __a)
{
return vreinterpret_s64_f64 (__a);
}
int __attribute__ ((noinline))
test_vreinterpret_s64_f64 ()
{
float64x1_t a;
int64x1_t b;
float64_t c[1] = { PI_F64 };
int64_t d[1] = { 0x400921FB54442D18 };
int64_t e[1];
int i;
a = vld1_f64 (c);
b = wrap_vreinterpret_s64_f64 (a);
vst1_s64 (e, b);
if (d[0] != e[0])
return 1;
return 0;
};
float32x4_t __attribute__ ((noinline))
wrap_vreinterpretq_f32_f64 (float64x2_t __a)
{
return vreinterpretq_f32_f64 (__a);
}
int __attribute__ ((noinline))
test_vreinterpretq_f32_f64 ()
{
float64x2_t a;
float32x4_t b;
float64_t c[2] = { PI_F64, E_F64 };
/* Values corresponding to f32 reinterpret of
{ 0x54442D18, 0x400921FB, 0x8B145769, 0x4005BF0A }. */
float32_t d[4] = { 3.3702805504E12,
2.1426990032196044921875E0,
-2.8569523269651966444143014594E-32,
2.089785099029541015625E0 };
float32_t e[4];
int i;
a = vld1q_f64 (c);
b = wrap_vreinterpretq_f32_f64 (a);
vst1q_f32 (e, b);
for (i = 0; i < 4; i++)
{
if (!DOUBLE_EQUALS (d[i], e[i], __FLT_EPSILON__))
return 1;
}
return 0;
};
int8x16_t __attribute__ ((noinline))
wrap_vreinterpretq_s8_f64 (float64x2_t __a)
{
return vreinterpretq_s8_f64 (__a);
}
int __attribute__ ((noinline))
test_vreinterpretq_s8_f64 ()
{
float64x2_t a;
int8x16_t b;
float64_t c[2] = { PI_F64, E_F64 };
int8_t d[16] = { 0x18, 0x2D, 0x44, 0x54, 0xFB, 0x21, 0x09, 0x40,
0x69, 0x57, 0x14, 0x8B, 0x0A, 0xBF, 0x05, 0x40 };
int8_t e[16];
int i;
a = vld1q_f64 (c);
b = wrap_vreinterpretq_s8_f64 (a);
vst1q_s8 (e, b);
for (i = 0; i < 16; i++)
if (d[i] != e[i])
return 1;
return 0;
};
int16x8_t __attribute__ ((noinline))
wrap_vreinterpretq_s16_f64 (float64x2_t __a)
{
return vreinterpretq_s16_f64 (__a);
}
int __attribute__ ((noinline))
test_vreinterpretq_s16_f64 ()
{
float64x2_t a;
int16x8_t b;
float64_t c[2] = { PI_F64, E_F64 };
int16_t d[8] = { 0x2D18, 0x5444, 0x21FB, 0x4009,
0x5769, 0x8B14, 0xBF0A, 0x4005 };
int16_t e[8];
int i;
a = vld1q_f64 (c);
b = wrap_vreinterpretq_s16_f64 (a);
vst1q_s16 (e, b);
for (i = 0; i < 8; i++)
if (d[i] != e[i])
return 1;
return 0;
};
int32x4_t __attribute__ ((noinline))
wrap_vreinterpretq_s32_f64 (float64x2_t __a)
{
return vreinterpretq_s32_f64 (__a);
}
int __attribute__ ((noinline))
test_vreinterpretq_s32_f64 ()
{
float64x2_t a;
int32x4_t b;
float64_t c[2] = { PI_F64, E_F64 };
int32_t d[4] = { 0x54442D18, 0x400921FB, 0x8B145769, 0x4005BF0A };
int32_t e[4];
int i;
a = vld1q_f64 (c);
b = wrap_vreinterpretq_s32_f64 (a);
vst1q_s32 (e, b);
for (i = 0; i < 4; i++)
if (d[i] != e[i])
return 1;
return 0;
};
int64x2_t __attribute__ ((noinline))
wrap_vreinterpretq_s64_f64 (float64x2_t __a)
{
return vreinterpretq_s64_f64 (__a);
}
int __attribute__ ((noinline))
test_vreinterpretq_s64_f64 ()
{
float64x2_t a;
int64x2_t b;
float64_t c[2] = { PI_F64, E_F64 };
int64_t d[2] = { 0x400921FB54442D18, 0x4005BF0A8B145769 };
int64_t e[2];
int i;
a = vld1q_f64 (c);
b = wrap_vreinterpretq_s64_f64 (a);
vst1q_s64 (e, b);
for (i = 0; i < 2; i++)
if (d[i] != e[i])
return 1;
return 0;
};
float64x1_t __attribute__ ((noinline))
wrap_vreinterpret_f64_f32 (float32x2_t __a)
{
return vreinterpret_f64_f32 (__a);
}
int __attribute__ ((noinline))
test_vreinterpret_f64_f32 ()
{
float32x2_t a;
float64x1_t b;
/* Values { 0x54442D18, 0x400921FB } reinterpreted as f32. */
float32_t c[2] = { 3.3702805504E12, 2.1426990032196044921875E0 };
float64_t d[1] = { PI_F64 };
float64_t e[1];
int i;
a = vld1_f32 (c);
b = wrap_vreinterpret_f64_f32 (a);
vst1_f64 (e, b);
if (!DOUBLE_EQUALS (d[0], e[0], __DBL_EPSILON__))
return 1;
return 0;
};
float64x1_t __attribute__ ((noinline))
wrap_vreinterpret_f64_s8 (int8x8_t __a)
{
return vreinterpret_f64_s8 (__a);
}
int __attribute__ ((noinline))
test_vreinterpret_f64_s8 ()
{
int8x8_t a;
float64x1_t b;
int8_t c[8] = { 0x18, 0x2D, 0x44, 0x54, 0xFB, 0x21, 0x09, 0x40 };
float64_t d[1] = { PI_F64 };
float64_t e[1];
int i;
a = vld1_s8 (c);
b = wrap_vreinterpret_f64_s8 (a);
vst1_f64 (e, b);
if (!DOUBLE_EQUALS (d[0], e[0], __DBL_EPSILON__))
return 1;
return 0;
};
float64x1_t __attribute__ ((noinline))
wrap_vreinterpret_f64_s16 (int16x4_t __a)
{
return vreinterpret_f64_s16 (__a);
}
int __attribute__ ((noinline))
test_vreinterpret_f64_s16 ()
{
int16x4_t a;
float64x1_t b;
int16_t c[4] = { 0x2D18, 0x5444, 0x21FB, 0x4009 };
float64_t d[1] = { PI_F64 };
float64_t e[1];
int i;
a = vld1_s16 (c);
b = wrap_vreinterpret_f64_s16 (a);
vst1_f64 (e, b);
if (!DOUBLE_EQUALS (d[0], e[0], __DBL_EPSILON__))
return 1;
return 0;
};
float64x1_t __attribute__ ((noinline))
wrap_vreinterpret_f64_s32 (int32x2_t __a)
{
return vreinterpret_f64_s32 (__a);
}
int __attribute__ ((noinline))
test_vreinterpret_f64_s32 ()
{
int32x2_t a;
float64x1_t b;
int32_t c[2] = { 0x54442D18, 0x400921FB };
float64_t d[1] = { PI_F64 };
float64_t e[1];
int i;
a = vld1_s32 (c);
b = wrap_vreinterpret_f64_s32 (a);
vst1_f64 (e, b);
if (!DOUBLE_EQUALS (d[0], e[0], __DBL_EPSILON__))
return 1;
return 0;
};
float64x1_t __attribute__ ((noinline))
wrap_vreinterpret_f64_s64 (int64x1_t __a)
{
return vreinterpret_f64_s64 (__a);
}
int __attribute__ ((noinline))
test_vreinterpret_f64_s64 ()
{
int64x1_t a;
float64x1_t b;
int64_t c[1] = { 0x400921FB54442D18 };
float64_t d[1] = { PI_F64 };
float64_t e[1];
a = vld1_s64 (c);
b = wrap_vreinterpret_f64_s64 (a);
vst1_f64 (e, b);
if (!DOUBLE_EQUALS (d[0], e[0], __DBL_EPSILON__))
return 1;
return 0;
};
float64x2_t __attribute__ ((noinline))
wrap_vreinterpretq_f64_f32 (float32x4_t __a)
{
return vreinterpretq_f64_f32 (__a);
}
int __attribute__ ((noinline))
test_vreinterpretq_f64_f32 ()
{
float32x4_t a;
float64x2_t b;
/* Values corresponding to f32 reinterpret of
{ 0x54442D18, 0x400921FB, 0x8B145769, 0x4005BF0A }. */
float32_t c[4] = { 3.3702805504E12,
2.1426990032196044921875E0,
-2.8569523269651966444143014594E-32,
2.089785099029541015625E0 };
float64_t d[2] = { PI_F64, E_F64 };
float64_t e[2];
int i;
a = vld1q_f32 (c);
b = wrap_vreinterpretq_f64_f32 (a);
vst1q_f64 (e, b);
for (i = 0; i < 2; i++)
if (!DOUBLE_EQUALS (d[i], e[i], __DBL_EPSILON__))
return 1;
return 0;
};
float64x2_t __attribute__ ((noinline))
wrap_vreinterpretq_f64_s8 (int8x16_t __a)
{
return vreinterpretq_f64_s8 (__a);
}
int __attribute__ ((noinline))
test_vreinterpretq_f64_s8 ()
{
int8x16_t a;
float64x2_t b;
int8_t c[16] = { 0x18, 0x2D, 0x44, 0x54, 0xFB, 0x21, 0x09, 0x40,
0x69, 0x57, 0x14, 0x8B, 0x0A, 0xBF, 0x05, 0x40 };
float64_t d[2] = { PI_F64, E_F64 };
float64_t e[2];
int i;
a = vld1q_s8 (c);
b = wrap_vreinterpretq_f64_s8 (a);
vst1q_f64 (e, b);
for (i = 0; i < 2; i++)
if (!DOUBLE_EQUALS (d[i], e[i], __DBL_EPSILON__))
return 1;
return 0;
};
float64x2_t __attribute__ ((noinline))
wrap_vreinterpretq_f64_s16 (int16x8_t __a)
{
return vreinterpretq_f64_s16 (__a);
}
int __attribute__ ((noinline))
test_vreinterpretq_f64_s16 ()
{
int16x8_t a;
float64x2_t b;
int16_t c[8] = { 0x2D18, 0x5444, 0x21FB, 0x4009,
0x5769, 0x8B14, 0xBF0A, 0x4005 };
float64_t d[2] = { PI_F64, E_F64 };
float64_t e[2];
int i;
a = vld1q_s16 (c);
b = wrap_vreinterpretq_f64_s16 (a);
vst1q_f64 (e, b);
for (i = 0; i < 2; i++)
if (!DOUBLE_EQUALS (d[i], e[i], __DBL_EPSILON__))
return 1;
return 0;
};
float64x2_t __attribute__ ((noinline))
wrap_vreinterpretq_f64_s32 (int32x4_t __a)
{
return vreinterpretq_f64_s32 (__a);
}
int __attribute__ ((noinline))
test_vreinterpretq_f64_s32 ()
{
int32x4_t a;
float64x2_t b;
int32_t c[4] = { 0x54442D18, 0x400921FB, 0x8B145769, 0x4005BF0A };
float64_t d[2] = { PI_F64, E_F64 };
float64_t e[2];
int i;
a = vld1q_s32 (c);
b = wrap_vreinterpretq_f64_s32 (a);
vst1q_f64 (e, b);
for (i = 0; i < 2; i++)
if (!DOUBLE_EQUALS (d[i], e[i], __DBL_EPSILON__))
return 1;
return 0;
};
float64x2_t __attribute__ ((noinline))
wrap_vreinterpretq_f64_s64 (int64x2_t __a)
{
return vreinterpretq_f64_s64 (__a);
}
int __attribute__ ((noinline))
test_vreinterpretq_f64_s64 ()
{
int64x2_t a;
float64x2_t b;
int64_t c[2] = { 0x400921FB54442D18, 0x4005BF0A8B145769 };
float64_t d[2] = { PI_F64, E_F64 };
float64_t e[2];
int i;
a = vld1q_s64 (c);
b = wrap_vreinterpretq_f64_s64 (a);
vst1q_f64 (e, b);
for (i = 0; i < 2; i++)
if (!DOUBLE_EQUALS (d[i], e[i], __DBL_EPSILON__))
return 1;
return 0;
};
int
main (int argc, char **argv)
{
if (test_vreinterpret_f32_f64 ())
abort ();
if (test_vreinterpret_s8_f64 ())
abort ();
if (test_vreinterpret_s16_f64 ())
abort ();
if (test_vreinterpret_s32_f64 ())
abort ();
if (test_vreinterpret_s64_f64 ())
abort ();
if (test_vreinterpretq_f32_f64 ())
abort ();
if (test_vreinterpretq_s8_f64 ())
abort ();
if (test_vreinterpretq_s16_f64 ())
abort ();
if (test_vreinterpretq_s32_f64 ())
abort ();
if (test_vreinterpretq_s64_f64 ())
abort ();
if (test_vreinterpret_f64_f32 ())
abort ();
if (test_vreinterpret_f64_s8 ())
abort ();
if (test_vreinterpret_f64_s16 ())
abort ();
if (test_vreinterpret_f64_s32 ())
abort ();
if (test_vreinterpret_f64_s64 ())
abort ();
if (test_vreinterpretq_f64_f32 ())
abort ();
if (test_vreinterpretq_f64_s8 ())
abort ();
if (test_vreinterpretq_f64_s16 ())
abort ();
if (test_vreinterpretq_f64_s32 ())
abort ();
if (test_vreinterpretq_f64_s64 ())
abort ();
return 0;
}
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