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riscv-gcc-1
Commit bccef6d8 by Nathan Sidwell Committed by Nathan Sidwell
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Second part of MS1->MT renaming 

	Second part of MS1->MT renaming
	* config/mt/mt.md (doloop_end): Call mt_add_loop.
	(movqi, movhi): Call mt_set_memflags.
	(*movdf_internal): Call mt_split_words. 
	(reload_inqi, reload_outqi, reload_inhi, reload_outhi): Call
	mt_set_memflags.
	(cmpsi): Store to mt_compare_op[01].
	(beq, bne, bge, bgt, ble, blt, bgeu, bgtu, bleu, bltu, bunge,
	bungt, bunle, bunlt): Call mt_emit_cbranch.
	(prologue): Call mt_expand_prologue.
	(epilogu): Call mt_expend_epilogue.
	(eh_return): Call mt_expand_eh_return.
	(eh_epilogue): Call me_emit_eh_epilogue.
	(conditional_trap): Store to mt_compare_op[01].
	* config/mt/crti.asm: Adjust comment.
	* config/mt/crtn.asm: Adjust comment.
	* config/mt/mt.c (MT_INT_ARG_FIRST): Renamed.
	(mt_compare_op0, mt_compare_op1): Renamed.
	(current_frame_info, zero_frame_info): Adjust type.
	(mt_ucmpsi3_libcall): Renamed.
	(mt_flag_delayed_branch): Renamed.
	(mt_struct_value_rtx, mt_return_addr_rtx): Renamed.
	(mt_nops_required, mt_nop_reasons): Renamed.
	(mt_asm_output_opcode, mt_get_attr_type, mt_final_prescan_insn,
	mt_debug_stack, mt_print_operand_simple_address,
	mt_print_operand_address, mt_print_operand): Renamed, adjusted.
	(mt_init_cumulative_args, mt_function_arg_slotno, mt_function_arg,
	mt_function_arg_advance, mt_arg_partial_bytes,
	mt_pass_by_reference, mt_function_arg_boundary,
	mt_reg_ok_for_base_p, mt_legitimate_simple_address_p,
	mt_legitimate_address_p): Renamed, adjusted.
	(mt_cpu): Renamed.
	(mt_init_machine_status, mt_override_options, mt_builtin_saveregs,
	mt_va_start, mt_compute_frame_size, mt_emit_save_restore,
	mt_emit_save_fp, mt_emit_save_regs, mt_interrupt_function_p, 
	mt_expand_prologue, mt_epilogue_uses, mt_expand_epilogue,
	mt_expand_eh_return, mt_emit_eh_prologue,
	mt_handl_interrupt_attribute): Renamed, adjusted.
	(mt_attribute_table): Renamed, adjusted.
	(mt_initial_elimination_offset, mt_generate_compare,
	mt_emit_cbranch, mt_set_memflags_1, mt_set_memflags,
	mt_secondary_reload_class, mt_function_value, mt_split_words,
	mt_pass_in_stack, mt_add_loop, mt_loop_nesting, mt_block_length,
	mt_scan_loop, mt_reorg_loops): Renamed, adjusted.
	(mt_labels): Renamed.
	(mt_add_branches, mt_check_delay_slot, mt_reorg_hazard,
	mt_machine_reorg): Renamed, adjusted.
	(mt_attribute_table: Renamed.
	(TARGET_ATTRIBUTE_TABLE, TARGET_STRUCT_VALUE_RTX,
	TARGET_PASS_BY_REFERENCE, TARGET_MUST_PASS_IN_STACK,
	TARGET_ARG_PARTIAL_BYTES, TARGET_MACHINE_DEPENDENT_REORG): Adjust.
	* config/mt/mt.opt (march): Set mt_cpu_string.
	* config/mt/mt.h (mt_ucmpsi3_libcall, mt_cpu): Renamed.
	(TARGET_CPU_CPP_BUILTINS): Adjust.
	(TARGET_MS1_64_001, TARGET_MS1_16_002, TARGET_MS1_16_003,
	TARGET_MS2): Adjust.
	(TARGET_VERSION, OVERRIDE_OPTIONS, SECONDARY_RELOAD_CLASS): Adjust.
	(MT_MIN_INT): Renamed.
	(RETURN_ADDR_RTX): Adjust.
	(struct mt_frame_info): Renamed.
	(current_frame_info): Adjust type.
	(INITIAL_ELIMINATION_OFFSET): Adjust.
	(MT_NUM_ARG_REGS): Renamed.
	(REG_PARM_STACK_SPACE, FUNCTION_ARG, INIT_CUMULATVE_ARGS,
	FUNCTION_ARG_ADVANCE, FUNCTION_ARG_BOUNDARY, FUNCTION_VALUE,
	LIBCALL_VALUE, EPILOGUE_USES, EXPAND_BUILTIN_VA_START,
	GO_IF_LEGITIMATE_ADDRESS, REG_OK_FOR_BASE_P, ASM_OUTPUT_OPCODE,
	FINAL_REPSCAN_INSN, PRINT_OPERAND, PRINT_OPERAND_ADDRESS): Adjust.
	(mt_compare_op0, mt_compare_op1): Renamed.
	* config/mt/mt-protos.h: Rename prototypes.

From-SVN: r108569
parent 6bec9271
Showing with 413 additions and 341 deletions
gcc/ChangeLog
2005-12-15 Nathan Sidwell <nathan@codesourcery.com>
Second part of MS1->MT renaming
* config/mt/mt.md (doloop_end): Call mt_add_loop.
(movqi, movhi): Call mt_set_memflags.
(*movdf_internal): Call mt_split_words.
(reload_inqi, reload_outqi, reload_inhi, reload_outhi): Call
mt_set_memflags.
(cmpsi): Store to mt_compare_op[01].
(beq, bne, bge, bgt, ble, blt, bgeu, bgtu, bleu, bltu, bunge,
bungt, bunle, bunlt): Call mt_emit_cbranch.
(prologue): Call mt_expand_prologue.
(epilogu): Call mt_expend_epilogue.
(eh_return): Call mt_expand_eh_return.
(eh_epilogue): Call me_emit_eh_epilogue.
(conditional_trap): Store to mt_compare_op[01].
* config/mt/crti.asm: Adjust comment.
* config/mt/crtn.asm: Adjust comment.
* config/mt/mt.c (MT_INT_ARG_FIRST): Renamed.
(mt_compare_op0, mt_compare_op1): Renamed.
(current_frame_info, zero_frame_info): Adjust type.
(mt_ucmpsi3_libcall): Renamed.
(mt_flag_delayed_branch): Renamed.
(mt_struct_value_rtx, mt_return_addr_rtx): Renamed.
(mt_nops_required, mt_nop_reasons): Renamed.
(mt_asm_output_opcode, mt_get_attr_type, mt_final_prescan_insn,
mt_debug_stack, mt_print_operand_simple_address,
mt_print_operand_address, mt_print_operand): Renamed, adjusted.
(mt_init_cumulative_args, mt_function_arg_slotno, mt_function_arg,
mt_function_arg_advance, mt_arg_partial_bytes,
mt_pass_by_reference, mt_function_arg_boundary,
mt_reg_ok_for_base_p, mt_legitimate_simple_address_p,
mt_legitimate_address_p): Renamed, adjusted.
(mt_cpu): Renamed.
(mt_init_machine_status, mt_override_options, mt_builtin_saveregs,
mt_va_start, mt_compute_frame_size, mt_emit_save_restore,
mt_emit_save_fp, mt_emit_save_regs, mt_interrupt_function_p,
mt_expand_prologue, mt_epilogue_uses, mt_expand_epilogue,
mt_expand_eh_return, mt_emit_eh_prologue,
mt_handl_interrupt_attribute): Renamed, adjusted.
(mt_attribute_table): Renamed, adjusted.
(mt_initial_elimination_offset, mt_generate_compare,
mt_emit_cbranch, mt_set_memflags_1, mt_set_memflags,
mt_secondary_reload_class, mt_function_value, mt_split_words,
mt_pass_in_stack, mt_add_loop, mt_loop_nesting, mt_block_length,
mt_scan_loop, mt_reorg_loops): Renamed, adjusted.
(mt_labels): Renamed.
(mt_add_branches, mt_check_delay_slot, mt_reorg_hazard,
mt_machine_reorg): Renamed, adjusted.
(mt_attribute_table: Renamed.
(TARGET_ATTRIBUTE_TABLE, TARGET_STRUCT_VALUE_RTX,
TARGET_PASS_BY_REFERENCE, TARGET_MUST_PASS_IN_STACK,
TARGET_ARG_PARTIAL_BYTES, TARGET_MACHINE_DEPENDENT_REORG): Adjust.
* config/mt/mt.opt (march): Set mt_cpu_string.
* config/mt/mt.h (mt_ucmpsi3_libcall, mt_cpu): Renamed.
(TARGET_CPU_CPP_BUILTINS): Adjust.
(TARGET_MS1_64_001, TARGET_MS1_16_002, TARGET_MS1_16_003,
TARGET_MS2): Adjust.
(TARGET_VERSION, OVERRIDE_OPTIONS, SECONDARY_RELOAD_CLASS): Adjust.
(MT_MIN_INT): Renamed.
(RETURN_ADDR_RTX): Adjust.
(struct mt_frame_info): Renamed.
(current_frame_info): Adjust type.
(INITIAL_ELIMINATION_OFFSET): Adjust.
(MT_NUM_ARG_REGS): Renamed.
(REG_PARM_STACK_SPACE, FUNCTION_ARG, INIT_CUMULATVE_ARGS,
FUNCTION_ARG_ADVANCE, FUNCTION_ARG_BOUNDARY, FUNCTION_VALUE,
LIBCALL_VALUE, EPILOGUE_USES, EXPAND_BUILTIN_VA_START,
GO_IF_LEGITIMATE_ADDRESS, REG_OK_FOR_BASE_P, ASM_OUTPUT_OPCODE,
FINAL_REPSCAN_INSN, PRINT_OPERAND, PRINT_OPERAND_ADDRESS): Adjust.
(mt_compare_op0, mt_compare_op1): Renamed.
* config/mt/mt-protos.h: Rename prototypes.
2005-12-15 Richard Guenther <rguenther@suse.de>
* tree-flow.h (okay_component_ref_for_subvars): Remove.
......@@ -147,6 +220,9 @@
2005-12-13 Nathan Sidwell <nathan@codesourcery.com>
* sim/common/sim-signal.c (sim_signal_to_target): Add missing ':'.
* sim/common/sim-signal.h (sim_signal_to_target): Return an int.
* config/mt/t-mt (crti.o, crtn.o): Add multilib options.
(EXTRA_MULTILIB_PARTS): Define.
......
gcc/config/mt/crti.asm
# crti.asm for ms1
# crti.asm for mt
#
# Copyright (C) 2005 Free Software Foundation, Inc.
#
......
gcc/config/mt/crtn.asm
# crtn.asm for ms1
# crtn.asm for mt
# Copyright (C) 2005 Free Software Foundation, Inc.
#
......
gcc/config/mt/mt-protos.h
......@@ -18,49 +18,49 @@
Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA. */
extern void ms1_init_expanders (void);
extern void ms1_expand_prologue (void);
extern void ms1_expand_epilogue (enum epilogue_type);
extern unsigned ms1_compute_frame_size (int);
extern void ms1_override_options (void);
extern int ms1_initial_elimination_offset (int, int);
extern const char * ms1_asm_output_opcode (FILE *, const char *);
extern int ms1_epilogue_uses (int);
extern void ms1_add_loop (void);
extern void mt_init_expanders (void);
extern void mt_expand_prologue (void);
extern void mt_expand_epilogue (enum epilogue_type);
extern unsigned mt_compute_frame_size (int);
extern void mt_override_options (void);
extern int mt_initial_elimination_offset (int, int);
extern const char * mt_asm_output_opcode (FILE *, const char *);
extern int mt_epilogue_uses (int);
extern void mt_add_loop (void);
#ifdef TREE_CODE
extern const char * ms1_cannot_inline_p (tree);
extern int ms1_function_arg_boundary (enum machine_mode, tree);
extern void ms1_function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, tree, int);
extern const char * mt_cannot_inline_p (tree);
extern int mt_function_arg_boundary (enum machine_mode, tree);
extern void mt_function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, tree, int);
#endif
#ifdef RTX_CODE
extern void ms1_expand_eh_return (rtx *);
extern void ms1_emit_eh_epilogue (rtx *);
extern void ms1_print_operand (FILE *, rtx, int);
extern void ms1_print_operand_address (FILE *, rtx);
extern int ms1_check_split (rtx, enum machine_mode);
extern int ms1_reg_ok_for_base_p (rtx, int);
extern int ms1_legitimate_address_p (enum machine_mode, rtx, int);
extern void mt_expand_eh_return (rtx *);
extern void mt_emit_eh_epilogue (rtx *);
extern void mt_print_operand (FILE *, rtx, int);
extern void mt_print_operand_address (FILE *, rtx);
extern int mt_check_split (rtx, enum machine_mode);
extern int mt_reg_ok_for_base_p (rtx, int);
extern int mt_legitimate_address_p (enum machine_mode, rtx, int);
/* Predicates for machine description. */
extern int uns_arith_operand (rtx, enum machine_mode);
extern int arith_operand (rtx, enum machine_mode);
extern int reg_or_0_operand (rtx, enum machine_mode);
extern int big_const_operand (rtx, enum machine_mode);
extern int single_const_operand (rtx, enum machine_mode);
extern void ms1_emit_cbranch (enum rtx_code, rtx, rtx, rtx);
extern void ms1_set_memflags (rtx);
extern rtx ms1_return_addr_rtx (int);
extern void ms1_split_words (enum machine_mode, enum machine_mode, rtx *);
extern void ms1_final_prescan_insn (rtx, rtx *, int);
extern void mt_emit_cbranch (enum rtx_code, rtx, rtx, rtx);
extern void mt_set_memflags (rtx);
extern rtx mt_return_addr_rtx (int);
extern void mt_split_words (enum machine_mode, enum machine_mode, rtx *);
extern void mt_final_prescan_insn (rtx, rtx *, int);
#endif
#ifdef TREE_CODE
#ifdef RTX_CODE
extern void ms1_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int);
extern rtx ms1_function_arg (const CUMULATIVE_ARGS *, enum machine_mode, tree, int, int);
extern void ms1_va_start (tree, rtx);
extern enum reg_class ms1_secondary_reload_class (enum reg_class, enum machine_mode, rtx);
extern rtx ms1_function_value (tree, enum machine_mode, tree);
extern void mt_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int);
extern rtx mt_function_arg (const CUMULATIVE_ARGS *, enum machine_mode, tree, int, int);
extern void mt_va_start (tree, rtx);
extern enum reg_class mt_secondary_reload_class (enum reg_class, enum machine_mode, rtx);
extern rtx mt_function_value (tree, enum machine_mode, tree);
#endif
#endif
gcc/config/mt/mt.c
......@@ -56,7 +56,7 @@
#define LINK_MASK (1 << (GPR_LINK))
/* First GPR. */
#define MS1_INT_ARG_FIRST 1
#define MT_INT_ARG_FIRST 1
/* Given a SIZE in bytes, advance to the next word. */
#define ROUND_ADVANCE(SIZE) (((SIZE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
......@@ -74,23 +74,23 @@ struct machine_function GTY(())
/* Define the information needed to generate branch and scc insns.
This is stored from the compare operation. */
struct rtx_def * ms1_compare_op0;
struct rtx_def * ms1_compare_op1;
struct rtx_def * mt_compare_op0;
struct rtx_def * mt_compare_op1;
/* Current frame information calculated by compute_frame_size. */
struct ms1_frame_info current_frame_info;
struct mt_frame_info current_frame_info;
/* Zero structure to initialize current_frame_info. */
struct ms1_frame_info zero_frame_info;
struct mt_frame_info zero_frame_info;
/* ms1 doesn't have unsigned compares need a library call for this. */
struct rtx_def * ms1_ucmpsi3_libcall;
/* mt doesn't have unsigned compares need a library call for this. */
struct rtx_def * mt_ucmpsi3_libcall;
static int ms1_flag_delayed_branch;
static int mt_flag_delayed_branch;
static rtx
ms1_struct_value_rtx (tree fndecl ATTRIBUTE_UNUSED,
mt_struct_value_rtx (tree fndecl ATTRIBUTE_UNUSED,
int incoming ATTRIBUTE_UNUSED)
{
return gen_rtx_REG (Pmode, RETVAL_REGNUM);
......@@ -98,7 +98,7 @@ ms1_struct_value_rtx (tree fndecl ATTRIBUTE_UNUSED,
/* Implement RETURN_ADDR_RTX. */
rtx
ms1_return_addr_rtx (int count)
mt_return_addr_rtx (int count)
{
if (count != 0)
return NULL_RTX;
......@@ -109,21 +109,21 @@ ms1_return_addr_rtx (int count)
/* The following variable value indicates the number of nops required
between the current instruction and the next instruction to avoid
any pipeline hazards. */
static int ms1_nops_required = 0;
static const char * ms1_nop_reasons = "";
static int mt_nops_required = 0;
static const char * mt_nop_reasons = "";
/* Implement ASM_OUTPUT_OPCODE. */
const char *
ms1_asm_output_opcode (FILE *f ATTRIBUTE_UNUSED, const char *ptr)
mt_asm_output_opcode (FILE *f ATTRIBUTE_UNUSED, const char *ptr)
{
if (ms1_nops_required)
if (mt_nops_required)
fprintf (f, ";# need %d nops because of %s\n\t",
ms1_nops_required, ms1_nop_reasons);
mt_nops_required, mt_nop_reasons);
while (ms1_nops_required)
while (mt_nops_required)
{
fprintf (f, "or r0, r0, r0\n\t");
-- ms1_nops_required;
-- mt_nops_required;
}
return ptr;
......@@ -132,7 +132,7 @@ ms1_asm_output_opcode (FILE *f ATTRIBUTE_UNUSED, const char *ptr)
/* Given an insn, return whether it's a memory operation or a branch
operation, otherwise return TYPE_ARITH. */
static enum attr_type
ms1_get_attr_type (rtx complete_insn)
mt_get_attr_type (rtx complete_insn)
{
rtx insn = PATTERN (complete_insn);
......@@ -206,19 +206,19 @@ insn_true_dependent_p (rtx x, rtx y)
/* The following determines the number of nops that need to be
inserted between the previous instructions and current instruction
to avoid pipeline hazards on the ms1 processor. Remember that
to avoid pipeline hazards on the mt processor. Remember that
the function is not called for asm insns. */
void
ms1_final_prescan_insn (rtx insn,
mt_final_prescan_insn (rtx insn,
rtx * opvec ATTRIBUTE_UNUSED,
int noperands ATTRIBUTE_UNUSED)
{
rtx prev_i;
enum attr_type prev_attr;
ms1_nops_required = 0;
ms1_nop_reasons = "";
mt_nops_required = 0;
mt_nop_reasons = "";
/* ms2 constraints are dealt with in reorg. */
if (TARGET_MS2)
......@@ -245,13 +245,13 @@ ms1_final_prescan_insn (rtx insn,
if (prev_i == NULL || ! INSN_P (prev_i))
return;
prev_attr = ms1_get_attr_type (prev_i);
prev_attr = mt_get_attr_type (prev_i);
/* Delayed branch slots already taken care of by delay branch scheduling. */
if (prev_attr == TYPE_BRANCH)
return;
switch (ms1_get_attr_type (insn))
switch (mt_get_attr_type (insn))
{
case TYPE_LOAD:
case TYPE_STORE:
......@@ -259,8 +259,8 @@ ms1_final_prescan_insn (rtx insn,
if ((prev_attr == TYPE_LOAD || prev_attr == TYPE_STORE)
&& TARGET_MS1_64_001)
{
ms1_nops_required = 1;
ms1_nop_reasons = "consecutive mem ops";
mt_nops_required = 1;
mt_nop_reasons = "consecutive mem ops";
}
/* Drop through. */
......@@ -271,8 +271,8 @@ ms1_final_prescan_insn (rtx insn,
if (prev_attr == TYPE_LOAD
&& insn_true_dependent_p (prev_i, insn))
{
ms1_nops_required = 1;
ms1_nop_reasons = "load->arith dependency delay";
mt_nops_required = 1;
mt_nop_reasons = "load->arith dependency delay";
}
break;
......@@ -283,31 +283,31 @@ ms1_final_prescan_insn (rtx insn,
{
/* One cycle of delay between arith
instructions and branch dependent on arith. */
ms1_nops_required = 1;
ms1_nop_reasons = "arith->branch dependency delay";
mt_nops_required = 1;
mt_nop_reasons = "arith->branch dependency delay";
}
else if (prev_attr == TYPE_LOAD)
{
/* Two cycles of delay are required
between load and dependent branch. */
if (TARGET_MS1_64_001)
ms1_nops_required = 2;
mt_nops_required = 2;
else
ms1_nops_required = 1;
ms1_nop_reasons = "load->branch dependency delay";
mt_nops_required = 1;
mt_nop_reasons = "load->branch dependency delay";
}
}
break;
default:
fatal_insn ("ms1_final_prescan_insn, invalid insn #1", insn);
fatal_insn ("mt_final_prescan_insn, invalid insn #1", insn);
break;
}
}
/* Print debugging information for a frame. */
static void
ms1_debug_stack (struct ms1_frame_info * info)
mt_debug_stack (struct mt_frame_info * info)
{
int regno;
......@@ -347,7 +347,7 @@ ms1_debug_stack (struct ms1_frame_info * info)
/* Print a memory address as an operand to reference that memory location. */
static void
ms1_print_operand_simple_address (FILE * file, rtx addr)
mt_print_operand_simple_address (FILE * file, rtx addr)
{
if (!addr)
error ("PRINT_OPERAND_ADDRESS, null pointer");
......@@ -402,19 +402,19 @@ ms1_print_operand_simple_address (FILE * file, rtx addr)
/* Implement PRINT_OPERAND_ADDRESS. */
void
ms1_print_operand_address (FILE * file, rtx addr)
mt_print_operand_address (FILE * file, rtx addr)
{
if (GET_CODE (addr) == AND
&& GET_CODE (XEXP (addr, 1)) == CONST_INT
&& INTVAL (XEXP (addr, 1)) == -3)
ms1_print_operand_simple_address (file, XEXP (addr, 0));
mt_print_operand_simple_address (file, XEXP (addr, 0));
else
ms1_print_operand_simple_address (file, addr);
mt_print_operand_simple_address (file, addr);
}
/* Implement PRINT_OPERAND. */
void
ms1_print_operand (FILE * file, rtx x, int code)
mt_print_operand (FILE * file, rtx x, int code)
{
switch (code)
{
......@@ -452,7 +452,7 @@ ms1_print_operand (FILE * file, rtx x, int code)
break;
default:
/* output_operand_lossage ("ms1_print_operand: unknown code"); */
/* output_operand_lossage ("mt_print_operand: unknown code"); */
fprintf (file, "unknown code");
return;
}
......@@ -469,7 +469,7 @@ ms1_print_operand (FILE * file, rtx x, int code)
break;
case MEM:
ms1_print_operand_address(file, XEXP (x,0));
mt_print_operand_address(file, XEXP (x,0));
break;
case LABEL_REF:
......@@ -487,14 +487,14 @@ ms1_print_operand (FILE * file, rtx x, int code)
/* Implement INIT_CUMULATIVE_ARGS. */
void
ms1_init_cumulative_args (CUMULATIVE_ARGS * cum, tree fntype, rtx libname,
tree fndecl ATTRIBUTE_UNUSED, int incoming)
mt_init_cumulative_args (CUMULATIVE_ARGS * cum, tree fntype, rtx libname,
tree fndecl ATTRIBUTE_UNUSED, int incoming)
{
*cum = 0;
if (TARGET_DEBUG_ARG)
{
fprintf (stderr, "\nms1_init_cumulative_args:");
fprintf (stderr, "\nmt_init_cumulative_args:");
if (incoming)
fputs (" incoming", stderr);
......@@ -531,20 +531,20 @@ ms1_init_cumulative_args (CUMULATIVE_ARGS * cum, tree fntype, rtx libname,
*PREGNO records the register number to use if scalar type. */
static int
ms1_function_arg_slotno (const CUMULATIVE_ARGS * cum,
enum machine_mode mode,
tree type,
int named ATTRIBUTE_UNUSED,
int incoming_p ATTRIBUTE_UNUSED,
int * pregno)
{
int regbase = MS1_INT_ARG_FIRST;
mt_function_arg_slotno (const CUMULATIVE_ARGS * cum,
enum machine_mode mode,
tree type,
int named ATTRIBUTE_UNUSED,
int incoming_p ATTRIBUTE_UNUSED,
int * pregno)
{
int regbase = MT_INT_ARG_FIRST;
int slotno = * cum;
if (mode == VOIDmode || targetm.calls.must_pass_in_stack (mode, type))
return -1;
if (slotno >= MS1_NUM_ARG_REGS)
if (slotno >= MT_NUM_ARG_REGS)
return -1;
* pregno = regbase + slotno;
......@@ -554,17 +554,16 @@ ms1_function_arg_slotno (const CUMULATIVE_ARGS * cum,
/* Implement FUNCTION_ARG. */
rtx
ms1_function_arg (const CUMULATIVE_ARGS * cum,
enum machine_mode mode,
tree type,
int named,
int incoming_p)
mt_function_arg (const CUMULATIVE_ARGS * cum,
enum machine_mode mode,
tree type,
int named,
int incoming_p)
{
int slotno, regno;
rtx reg;
slotno = ms1_function_arg_slotno (cum, mode, type, named, incoming_p,
& regno);
slotno = mt_function_arg_slotno (cum, mode, type, named, incoming_p, &regno);
if (slotno == -1)
reg = NULL_RTX;
......@@ -576,15 +575,15 @@ ms1_function_arg (const CUMULATIVE_ARGS * cum,
/* Implement FUNCTION_ARG_ADVANCE. */
void
ms1_function_arg_advance (CUMULATIVE_ARGS * cum,
enum machine_mode mode,
tree type ATTRIBUTE_UNUSED,
int named)
mt_function_arg_advance (CUMULATIVE_ARGS * cum,
enum machine_mode mode,
tree type ATTRIBUTE_UNUSED,
int named)
{
int slotno, regno;
/* We pass 0 for incoming_p here, it doesn't matter. */
slotno = ms1_function_arg_slotno (cum, mode, type, named, 0, &regno);
slotno = mt_function_arg_slotno (cum, mode, type, named, 0, &regno);
* cum += (mode != BLKmode
? ROUND_ADVANCE (GET_MODE_SIZE (mode))
......@@ -592,7 +591,7 @@ ms1_function_arg_advance (CUMULATIVE_ARGS * cum,
if (TARGET_DEBUG_ARG)
fprintf (stderr,
"ms1_function_arg_advance: words = %2d, mode = %4s, named = %d, size = %3d\n",
"mt_function_arg_advance: words = %2d, mode = %4s, named = %d, size = %3d\n",
*cum, GET_MODE_NAME (mode), named,
(*cum) * UNITS_PER_WORD);
}
......@@ -604,7 +603,7 @@ ms1_function_arg_advance (CUMULATIVE_ARGS * cum,
that are passed entirely in registers or that are entirely pushed
on the stack. */
static int
ms1_arg_partial_bytes (CUMULATIVE_ARGS * pcum,
mt_arg_partial_bytes (CUMULATIVE_ARGS * pcum,
enum machine_mode mode,
tree type,
bool named ATTRIBUTE_UNUSED)
......@@ -618,11 +617,11 @@ ms1_arg_partial_bytes (CUMULATIVE_ARGS * pcum,
else
words = (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
if (! targetm.calls.pass_by_reference (& cum, mode, type, named)
&& cum < MS1_NUM_ARG_REGS
&& (cum + words) > MS1_NUM_ARG_REGS)
if (! targetm.calls.pass_by_reference (&cum, mode, type, named)
&& cum < MT_NUM_ARG_REGS
&& (cum + words) > MT_NUM_ARG_REGS)
{
int bytes = (MS1_NUM_ARG_REGS - cum) * UNITS_PER_WORD;
int bytes = (MT_NUM_ARG_REGS - cum) * UNITS_PER_WORD;
if (TARGET_DEBUG)
fprintf (stderr, "function_arg_partial_nregs = %d\n", bytes);
......@@ -635,7 +634,7 @@ ms1_arg_partial_bytes (CUMULATIVE_ARGS * pcum,
/* Implement TARGET_PASS_BY_REFERENCE hook. */
static bool
ms1_pass_by_reference (CUMULATIVE_ARGS * cum ATTRIBUTE_UNUSED,
mt_pass_by_reference (CUMULATIVE_ARGS * cum ATTRIBUTE_UNUSED,
enum machine_mode mode ATTRIBUTE_UNUSED,
tree type,
bool named ATTRIBUTE_UNUSED)
......@@ -645,7 +644,7 @@ ms1_pass_by_reference (CUMULATIVE_ARGS * cum ATTRIBUTE_UNUSED,
/* Implement FUNCTION_ARG_BOUNDARY. */
int
ms1_function_arg_boundary (enum machine_mode mode ATTRIBUTE_UNUSED,
mt_function_arg_boundary (enum machine_mode mode ATTRIBUTE_UNUSED,
tree type ATTRIBUTE_UNUSED)
{
return BITS_PER_WORD;
......@@ -653,19 +652,18 @@ ms1_function_arg_boundary (enum machine_mode mode ATTRIBUTE_UNUSED,
/* Implement REG_OK_FOR_BASE_P. */
int
ms1_reg_ok_for_base_p (rtx x, int strict)
mt_reg_ok_for_base_p (rtx x, int strict)
{
if (strict)
return (((unsigned) REGNO (x)) < FIRST_PSEUDO_REGISTER);
return 1;
}
/* Helper function of ms1_legitimate_address_p. Return true if XINSN
/* Helper function of mt_legitimate_address_p. Return true if XINSN
is a simple address, otherwise false. */
static bool
ms1_legitimate_simple_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
rtx xinsn,
int strict)
mt_legitimate_simple_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
rtx xinsn, int strict)
{
if (TARGET_DEBUG)
{
......@@ -674,12 +672,12 @@ ms1_legitimate_simple_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
debug_rtx (xinsn);
}
if (GET_CODE (xinsn) == REG && ms1_reg_ok_for_base_p (xinsn, strict))
if (GET_CODE (xinsn) == REG && mt_reg_ok_for_base_p (xinsn, strict))
return true;
if (GET_CODE (xinsn) == PLUS
&& GET_CODE (XEXP (xinsn, 0)) == REG
&& ms1_reg_ok_for_base_p (XEXP (xinsn, 0), strict)
&& mt_reg_ok_for_base_p (XEXP (xinsn, 0), strict)
&& GET_CODE (XEXP (xinsn, 1)) == CONST_INT
&& SMALL_INT (XEXP (xinsn, 1)))
return true;
......@@ -689,20 +687,18 @@ ms1_legitimate_simple_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
/* Helper function of GO_IF_LEGITIMATE_ADDRESS. Return non-zero if
XINSN is a legitimate address on MS1. */
XINSN is a legitimate address on MT. */
int
ms1_legitimate_address_p (enum machine_mode mode,
rtx xinsn,
int strict)
mt_legitimate_address_p (enum machine_mode mode, rtx xinsn, int strict)
{
if (ms1_legitimate_simple_address_p (mode, xinsn, strict))
if (mt_legitimate_simple_address_p (mode, xinsn, strict))
return 1;
if ((mode) == SImode
&& GET_CODE (xinsn) == AND
&& GET_CODE (XEXP (xinsn, 1)) == CONST_INT
&& INTVAL (XEXP (xinsn, 1)) == -3)
return ms1_legitimate_simple_address_p (mode, XEXP (xinsn, 0), strict);
return mt_legitimate_simple_address_p (mode, XEXP (xinsn, 0), strict);
else
return 0;
}
......@@ -782,10 +778,10 @@ single_const_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
/* True if the current function is an interrupt handler
(either via #pragma or an attribute specification). */
int interrupt_handler;
enum processor_type ms1_cpu;
enum processor_type mt_cpu;
static struct machine_function *
ms1_init_machine_status (void)
mt_init_machine_status (void)
{
struct machine_function *f;
......@@ -796,23 +792,23 @@ ms1_init_machine_status (void)
/* Implement OVERRIDE_OPTIONS. */
void
ms1_override_options (void)
mt_override_options (void)
{
if (ms1_cpu_string != NULL)
if (mt_cpu_string != NULL)
{
if (!strcasecmp (ms1_cpu_string, "MS1-64-001"))
ms1_cpu = PROCESSOR_MS1_64_001;
else if (!strcasecmp (ms1_cpu_string, "MS1-16-002"))
ms1_cpu = PROCESSOR_MS1_16_002;
else if (!strcasecmp (ms1_cpu_string, "MS1-16-003"))
ms1_cpu = PROCESSOR_MS1_16_003;
else if (!strcasecmp (ms1_cpu_string, "MS2"))
ms1_cpu = PROCESSOR_MS2;
if (!strcasecmp (mt_cpu_string, "MS1-64-001"))
mt_cpu = PROCESSOR_MS1_64_001;
else if (!strcasecmp (mt_cpu_string, "MS1-16-002"))
mt_cpu = PROCESSOR_MS1_16_002;
else if (!strcasecmp (mt_cpu_string, "MS1-16-003"))
mt_cpu = PROCESSOR_MS1_16_003;
else if (!strcasecmp (mt_cpu_string, "MS2"))
mt_cpu = PROCESSOR_MS2;
else
error ("bad value (%s) for -march= switch", ms1_cpu_string);
error ("bad value (%s) for -march= switch", mt_cpu_string);
}
else
ms1_cpu = PROCESSOR_MS2;
mt_cpu = PROCESSOR_MS2;
if (flag_exceptions)
{
......@@ -821,10 +817,10 @@ ms1_override_options (void)
}
/* We do delayed branch filling in machine dependent reorg */
ms1_flag_delayed_branch = flag_delayed_branch;
mt_flag_delayed_branch = flag_delayed_branch;
flag_delayed_branch = 0;
init_machine_status = ms1_init_machine_status;
init_machine_status = mt_init_machine_status;
}
/* Do what is necessary for `va_start'. We look at the current function
......@@ -832,19 +828,20 @@ ms1_override_options (void)
first unnamed parameter. */
static rtx
ms1_builtin_saveregs (void)
mt_builtin_saveregs (void)
{
int first_reg = 0;
rtx address;
int regno;
for (regno = first_reg; regno < MS1_NUM_ARG_REGS; regno ++)
emit_move_insn (gen_rtx_MEM (word_mode,
gen_rtx_PLUS (Pmode,
gen_rtx_REG (SImode, ARG_POINTER_REGNUM),
GEN_INT (UNITS_PER_WORD * regno))),
gen_rtx_REG (word_mode,
MS1_INT_ARG_FIRST + regno));
for (regno = first_reg; regno < MT_NUM_ARG_REGS; regno ++)
emit_move_insn
(gen_rtx_MEM (word_mode,
gen_rtx_PLUS (Pmode,
gen_rtx_REG (SImode, ARG_POINTER_REGNUM),
GEN_INT (UNITS_PER_WORD * regno))),
gen_rtx_REG (word_mode,
MT_INT_ARG_FIRST + regno));
address = gen_rtx_PLUS (Pmode,
gen_rtx_REG (SImode, ARG_POINTER_REGNUM),
......@@ -855,9 +852,9 @@ ms1_builtin_saveregs (void)
/* Implement `va_start'. */
void
ms1_va_start (tree valist, rtx nextarg)
mt_va_start (tree valist, rtx nextarg)
{
ms1_builtin_saveregs ();
mt_builtin_saveregs ();
std_expand_builtin_va_start (valist, nextarg);
}
......@@ -866,7 +863,7 @@ ms1_va_start (tree valist, rtx nextarg)
needed for local variables. */
unsigned int
ms1_compute_frame_size (int size)
mt_compute_frame_size (int size)
{
int regno;
unsigned int total_size;
......@@ -928,10 +925,8 @@ ms1_compute_frame_size (int size)
STACK_OFFSET is the offset from the SP where the save will happen.
This function sets the REG_FRAME_RELATED_EXPR note accordingly. */
static void
ms1_emit_save_restore (enum save_direction direction,
rtx reg,
rtx mem,
int stack_offset)
mt_emit_save_restore (enum save_direction direction,
rtx reg, rtx mem, int stack_offset)
{
if (direction == FROM_PROCESSOR_TO_MEM)
{
......@@ -940,15 +935,15 @@ ms1_emit_save_restore (enum save_direction direction,
insn = emit_move_insn (mem, reg);
RTX_FRAME_RELATED_P (insn) = 1;
REG_NOTES (insn)
= gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
gen_rtx_SET (VOIDmode,
gen_rtx_MEM
(SImode,
gen_rtx_PLUS (SImode,
stack_pointer_rtx,
GEN_INT (stack_offset))),
reg),
REG_NOTES (insn));
= gen_rtx_EXPR_LIST
(REG_FRAME_RELATED_EXPR,
gen_rtx_SET (VOIDmode,
gen_rtx_MEM (SImode,
gen_rtx_PLUS (SImode,
stack_pointer_rtx,
GEN_INT (stack_offset))),
reg),
REG_NOTES (insn));
}
else
emit_move_insn (reg, mem);
......@@ -959,8 +954,8 @@ ms1_emit_save_restore (enum save_direction direction,
frame pointer in epilogue. */
static void
ms1_emit_save_fp (enum save_direction direction,
struct ms1_frame_info info)
mt_emit_save_fp (enum save_direction direction,
struct mt_frame_info info)
{
rtx base_reg;
int reg_mask = info.reg_mask & ~(FP_MASK | LINK_MASK);
......@@ -986,10 +981,11 @@ ms1_emit_save_fp (enum save_direction direction,
{
offset -= UNITS_PER_WORD;
stack_offset -= UNITS_PER_WORD;
ms1_emit_save_restore (direction, gen_rtx_REG (SImode, GPR_FP),
gen_rtx_MEM (SImode,
gen_rtx_PLUS (SImode, base_reg, GEN_INT (offset))),
stack_offset);
mt_emit_save_restore
(direction, gen_rtx_REG (SImode, GPR_FP),
gen_rtx_MEM (SImode,
gen_rtx_PLUS (SImode, base_reg, GEN_INT (offset))),
stack_offset);
}
}
......@@ -997,8 +993,8 @@ ms1_emit_save_fp (enum save_direction direction,
in epilogue. */
static void
ms1_emit_save_regs (enum save_direction direction,
struct ms1_frame_info info)
mt_emit_save_regs (enum save_direction direction,
struct mt_frame_info info)
{
rtx base_reg;
int regno;
......@@ -1024,7 +1020,7 @@ ms1_emit_save_regs (enum save_direction direction,
if (info.save_fp)
{
/* This just records the space for it, the actual move generated in
ms1_emit_save_fp (). */
mt_emit_save_fp (). */
offset -= UNITS_PER_WORD;
stack_offset -= UNITS_PER_WORD;
}
......@@ -1033,10 +1029,11 @@ ms1_emit_save_regs (enum save_direction direction,
{
offset -= UNITS_PER_WORD;
stack_offset -= UNITS_PER_WORD;
ms1_emit_save_restore (direction, gen_rtx_REG (SImode, GPR_LINK),
gen_rtx_MEM (SImode,
gen_rtx_PLUS (SImode, base_reg, GEN_INT (offset))),
stack_offset);
mt_emit_save_restore
(direction, gen_rtx_REG (SImode, GPR_LINK),
gen_rtx_MEM (SImode,
gen_rtx_PLUS (SImode, base_reg, GEN_INT (offset))),
stack_offset);
}
/* Save any needed call-saved regs. */
......@@ -1046,17 +1043,18 @@ ms1_emit_save_regs (enum save_direction direction,
{
offset -= UNITS_PER_WORD;
stack_offset -= UNITS_PER_WORD;
ms1_emit_save_restore (direction, gen_rtx_REG (SImode, regno),
gen_rtx_MEM (SImode,
gen_rtx_PLUS (SImode, base_reg, GEN_INT (offset))),
stack_offset);
mt_emit_save_restore
(direction, gen_rtx_REG (SImode, regno),
gen_rtx_MEM (SImode,
gen_rtx_PLUS (SImode, base_reg, GEN_INT (offset))),
stack_offset);
}
}
}
/* Return true if FUNC is a function with the 'interrupt' attribute. */
static bool
ms1_interrupt_function_p (tree func)
mt_interrupt_function_p (tree func)
{
tree a;
......@@ -1069,22 +1067,22 @@ ms1_interrupt_function_p (tree func)
/* Generate prologue code. */
void
ms1_expand_prologue (void)
mt_expand_prologue (void)
{
rtx size_rtx, insn;
unsigned int frame_size;
if (ms1_interrupt_function_p (current_function_decl))
if (mt_interrupt_function_p (current_function_decl))
{
interrupt_handler = 1;
if (cfun->machine)
cfun->machine->interrupt_handler = 1;
}
ms1_compute_frame_size (get_frame_size ());
mt_compute_frame_size (get_frame_size ());
if (TARGET_DEBUG_STACK)
ms1_debug_stack (&current_frame_info);
mt_debug_stack (&current_frame_info);
/* Compute size of stack adjustment. */
frame_size = current_frame_info.total_size;
......@@ -1123,13 +1121,14 @@ ms1_expand_prologue (void)
REG_NOTES (insn));
}
/* Set R9 to point to old sp if required for access to register save area. */
/* Set R9 to point to old sp if required for access to register save
area. */
if ( current_frame_info.reg_size != 0
&& !CONST_OK_FOR_LETTER_P (frame_size, 'O'))
emit_insn (gen_addsi3 (size_rtx, size_rtx, stack_pointer_rtx));
/* Save the frame pointer. */
ms1_emit_save_fp (FROM_PROCESSOR_TO_MEM, current_frame_info);
mt_emit_save_fp (FROM_PROCESSOR_TO_MEM, current_frame_info);
/* Now put the frame pointer into the frame pointer register. */
if (frame_pointer_needed)
......@@ -1139,7 +1138,7 @@ ms1_expand_prologue (void)
}
/* Save the registers. */
ms1_emit_save_regs (FROM_PROCESSOR_TO_MEM, current_frame_info);
mt_emit_save_regs (FROM_PROCESSOR_TO_MEM, current_frame_info);
/* If we are profiling, make sure no instructions are scheduled before
the call to mcount. */
......@@ -1149,7 +1148,7 @@ ms1_expand_prologue (void)
/* Implement EPILOGUE_USES. */
int
ms1_epilogue_uses (int regno)
mt_epilogue_uses (int regno)
{
if (cfun->machine && cfun->machine->interrupt_handler && reload_completed)
return 1;
......@@ -1160,15 +1159,15 @@ ms1_epilogue_uses (int regno)
function epilogue, or EH_EPILOGUE when generating an EH
epilogue. */
void
ms1_expand_epilogue (enum epilogue_type eh_mode)
mt_expand_epilogue (enum epilogue_type eh_mode)
{
rtx size_rtx, insn;
unsigned frame_size;
ms1_compute_frame_size (get_frame_size ());
mt_compute_frame_size (get_frame_size ());
if (TARGET_DEBUG_STACK)
ms1_debug_stack (& current_frame_info);
mt_debug_stack (& current_frame_info);
/* Compute size of stack adjustment. */
frame_size = current_frame_info.total_size;
......@@ -1196,8 +1195,8 @@ ms1_expand_epilogue (enum epilogue_type eh_mode)
insn = emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
/* Restore the registers. */
ms1_emit_save_fp (FROM_MEM_TO_PROCESSOR, current_frame_info);
ms1_emit_save_regs (FROM_MEM_TO_PROCESSOR, current_frame_info);
mt_emit_save_fp (FROM_MEM_TO_PROCESSOR, current_frame_info);
mt_emit_save_regs (FROM_MEM_TO_PROCESSOR, current_frame_info);
/* Make stack adjustment and use scratch register if constant too
large to fit as immediate. */
......@@ -1250,7 +1249,7 @@ ms1_expand_epilogue (enum epilogue_type eh_mode)
/* Generate code for the "eh_return" pattern. */
void
ms1_expand_eh_return (rtx * operands)
mt_expand_eh_return (rtx * operands)
{
if (GET_CODE (operands[0]) != REG
|| REGNO (operands[0]) != EH_RETURN_STACKADJ_REGNO)
......@@ -1266,15 +1265,15 @@ ms1_expand_eh_return (rtx * operands)
/* Generate code for the "eh_epilogue" pattern. */
void
ms1_emit_eh_epilogue (rtx * operands ATTRIBUTE_UNUSED)
mt_emit_eh_epilogue (rtx * operands ATTRIBUTE_UNUSED)
{
cfun->machine->eh_stack_adjust = EH_RETURN_STACKADJ_RTX; /* operands[0]; */
ms1_expand_epilogue (EH_EPILOGUE);
mt_expand_epilogue (EH_EPILOGUE);
}
/* Handle an "interrupt" attribute. */
static tree
ms1_handle_interrupt_attribute (tree * node,
mt_handle_interrupt_attribute (tree * node,
tree name,
tree args ATTRIBUTE_UNUSED,
int flags ATTRIBUTE_UNUSED,
......@@ -1292,18 +1291,18 @@ ms1_handle_interrupt_attribute (tree * node,
}
/* Table of machine attributes. */
const struct attribute_spec ms1_attribute_table[] =
const struct attribute_spec mt_attribute_table[] =
{
/* name, min, max, decl?, type?, func?, handler */
{ "interrupt", 0, 0, false, false, false, ms1_handle_interrupt_attribute },
{ "interrupt", 0, 0, false, false, false, mt_handle_interrupt_attribute },
{ NULL, 0, 0, false, false, false, NULL }
};
/* Implement INITIAL_ELIMINATION_OFFSET. */
int
ms1_initial_elimination_offset (int from, int to)
mt_initial_elimination_offset (int from, int to)
{
ms1_compute_frame_size (get_frame_size ());
mt_compute_frame_size (get_frame_size ());
if (from == FRAME_POINTER_REGNUM && to == STACK_POINTER_REGNUM)
return 0;
......@@ -1322,7 +1321,7 @@ ms1_initial_elimination_offset (int from, int to)
represents the result of the compare. */
static rtx
ms1_generate_compare (enum rtx_code code, rtx op0, rtx op1)
mt_generate_compare (enum rtx_code code, rtx op0, rtx op1)
{
rtx scratch0, scratch1, const_scratch;
......@@ -1335,7 +1334,7 @@ ms1_generate_compare (enum rtx_code code, rtx op0, rtx op1)
/* Need to adjust ranges for faking unsigned compares. */
scratch0 = gen_reg_rtx (SImode);
scratch1 = gen_reg_rtx (SImode);
const_scratch = force_reg (SImode, GEN_INT(MS1_MIN_INT));
const_scratch = force_reg (SImode, GEN_INT(MT_MIN_INT));
emit_insn (gen_addsi3 (scratch0, const_scratch, op0));
emit_insn (gen_addsi3 (scratch1, const_scratch, op1));
break;
......@@ -1368,7 +1367,7 @@ ms1_generate_compare (enum rtx_code code, rtx op0, rtx op1)
/* Emit a branch of kind CODE to location LOC. */
void
ms1_emit_cbranch (enum rtx_code code, rtx loc, rtx op0, rtx op1)
mt_emit_cbranch (enum rtx_code code, rtx loc, rtx op0, rtx op1)
{
rtx condition_rtx, loc_ref;
......@@ -1378,7 +1377,7 @@ ms1_emit_cbranch (enum rtx_code code, rtx loc, rtx op0, rtx op1)
if (! reg_or_0_operand (op1, SImode))
op1 = copy_to_mode_reg (SImode, op1);
condition_rtx = ms1_generate_compare (code, op0, op1);
condition_rtx = mt_generate_compare (code, op0, op1);
loc_ref = gen_rtx_LABEL_REF (VOIDmode, loc);
emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
gen_rtx_IF_THEN_ELSE (VOIDmode, condition_rtx,
......@@ -1389,7 +1388,7 @@ ms1_emit_cbranch (enum rtx_code code, rtx loc, rtx op0, rtx op1)
found in part of X. */
static void
ms1_set_memflags_1 (rtx x, int in_struct_p, int volatile_p)
mt_set_memflags_1 (rtx x, int in_struct_p, int volatile_p)
{
int i;
......@@ -1398,16 +1397,16 @@ ms1_set_memflags_1 (rtx x, int in_struct_p, int volatile_p)
case SEQUENCE:
case PARALLEL:
for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
ms1_set_memflags_1 (XVECEXP (x, 0, i), in_struct_p, volatile_p);
mt_set_memflags_1 (XVECEXP (x, 0, i), in_struct_p, volatile_p);
break;
case INSN:
ms1_set_memflags_1 (PATTERN (x), in_struct_p, volatile_p);
mt_set_memflags_1 (PATTERN (x), in_struct_p, volatile_p);
break;
case SET:
ms1_set_memflags_1 (SET_DEST (x), in_struct_p, volatile_p);
ms1_set_memflags_1 (SET_SRC (x), in_struct_p, volatile_p);
mt_set_memflags_1 (SET_DEST (x), in_struct_p, volatile_p);
mt_set_memflags_1 (SET_SRC (x), in_struct_p, volatile_p);
break;
case MEM:
......@@ -1431,7 +1430,7 @@ ms1_set_memflags_1 (rtx x, int in_struct_p, int volatile_p)
If REF is not a MEM, don't do anything. */
void
ms1_set_memflags (rtx ref)
mt_set_memflags (rtx ref)
{
rtx insn;
int in_struct_p, volatile_p;
......@@ -1442,19 +1441,19 @@ ms1_set_memflags (rtx ref)
in_struct_p = MEM_IN_STRUCT_P (ref);
volatile_p = MEM_VOLATILE_P (ref);
/* This is only called from ms1.md, after having had something
/* This is only called from mt.md, after having had something
generated from one of the insn patterns. So if everything is
zero, the pattern is already up-to-date. */
if (! in_struct_p && ! volatile_p)
return;
for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
ms1_set_memflags_1 (insn, in_struct_p, volatile_p);
mt_set_memflags_1 (insn, in_struct_p, volatile_p);
}
/* Implement SECONDARY_RELOAD_CLASS. */
enum reg_class
ms1_secondary_reload_class (enum reg_class class ATTRIBUTE_UNUSED,
mt_secondary_reload_class (enum reg_class class ATTRIBUTE_UNUSED,
enum machine_mode mode,
rtx x)
{
......@@ -1475,7 +1474,7 @@ ms1_secondary_reload_class (enum reg_class class ATTRIBUTE_UNUSED,
/* Handle FUNCTION_VALUE, FUNCTION_OUTGOING_VALUE, and LIBCALL_VALUE
macros. */
rtx
ms1_function_value (tree valtype, enum machine_mode mode, tree func_decl ATTRIBUTE_UNUSED)
mt_function_value (tree valtype, enum machine_mode mode, tree func_decl ATTRIBUTE_UNUSED)
{
if ((mode) == DImode || (mode) == DFmode)
return gen_rtx_MEM (mode, gen_rtx_REG (mode, RETURN_VALUE_REGNUM));
......@@ -1493,7 +1492,7 @@ ms1_function_value (tree valtype, enum machine_mode mode, tree func_decl ATTRIBU
and OPERANDS[5]. */
void
ms1_split_words (enum machine_mode nmode,
mt_split_words (enum machine_mode nmode,
enum machine_mode omode,
rtx *operands)
{
......@@ -1642,7 +1641,7 @@ ms1_split_words (enum machine_mode nmode,
/* Implement TARGET_MUST_PASS_IN_STACK hook. */
static bool
ms1_pass_in_stack (enum machine_mode mode ATTRIBUTE_UNUSED, tree type)
mt_pass_in_stack (enum machine_mode mode ATTRIBUTE_UNUSED, tree type)
{
return (((type) != 0
&& (TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST
......@@ -1652,7 +1651,7 @@ ms1_pass_in_stack (enum machine_mode mode ATTRIBUTE_UNUSED, tree type)
/* Increment the counter for the number of loop instructions in the
current function. */
void ms1_add_loop (void)
void mt_add_loop (void)
{
cfun->machine->has_loops++;
}
......@@ -1745,7 +1744,7 @@ DEF_VEC_ALLOC_O (loop_work,heap);
is bad. */
static bool
ms1_loop_nesting (loop_info loop)
mt_loop_nesting (loop_info loop)
{
loop_info inner;
unsigned ix;
......@@ -1775,7 +1774,7 @@ ms1_loop_nesting (loop_info loop)
for (ix = 0; VEC_iterate (loop_info, loop->loops, ix++, inner);)
{
if (!inner->depth)
ms1_loop_nesting (inner);
mt_loop_nesting (inner);
if (inner->depth < 0)
{
......@@ -1802,7 +1801,7 @@ ms1_loop_nesting (loop_info loop)
/* Determine the length of block BB. */
static int
ms1_block_length (basic_block bb)
mt_block_length (basic_block bb)
{
int length = 0;
rtx insn;
......@@ -1830,7 +1829,7 @@ ms1_block_length (basic_block bb)
insn if it matches DBNZ. */
static bool
ms1_scan_loop (loop_info loop, rtx reg, rtx dbnz)
mt_scan_loop (loop_info loop, rtx reg, rtx dbnz)
{
unsigned ix;
loop_info inner;
......@@ -1853,7 +1852,7 @@ ms1_scan_loop (loop_info loop, rtx reg, rtx dbnz)
}
}
for (ix = 0; VEC_iterate (loop_info, loop->loops, ix, inner); ix++)
if (ms1_scan_loop (inner, reg, NULL_RTX))
if (mt_scan_loop (inner, reg, NULL_RTX))
return true;
return false;
......@@ -1893,7 +1892,7 @@ ms1_scan_loop (loop_info loop, rtx reg, rtx dbnz)
subroutine calls in the loop. */
static void
ms1_reorg_loops (FILE *dump_file)
mt_reorg_loops (FILE *dump_file)
{
basic_block bb;
loop_info loops = NULL;
......@@ -1930,7 +1929,7 @@ ms1_reorg_loops (FILE *dump_file)
loop->predecessor = NULL;
loop->dbnz = tail;
loop->depth = 0;
loop->length = ms1_block_length (bb);
loop->length = mt_block_length (bb);
loop->blocks = VEC_alloc (basic_block, heap, 20);
VEC_quick_push (basic_block, loop->blocks, bb);
loop->loops = NULL;
......@@ -1981,7 +1980,7 @@ ms1_reorg_loops (FILE *dump_file)
/* We've not seen this block before. Add it to the loop's
list and then add each successor to the work list. */
bb->aux = loop;
loop->length += ms1_block_length (bb);
loop->length += mt_block_length (bb);
VEC_safe_push (basic_block, heap, loop->blocks, bb);
FOR_EACH_EDGE (e, ei, bb->succs)
{
......@@ -2027,7 +2026,7 @@ ms1_reorg_loops (FILE *dump_file)
rtx iter_reg, insn, init_insn;
rtx init_val, loop_end, loop_init, end_label, head_label;
if (!ms1_loop_nesting (loop))
if (!mt_loop_nesting (loop))
{
if (dump_file)
fprintf (dump_file, ";; loop %d is bad\n", loop->loop_no);
......@@ -2090,7 +2089,7 @@ ms1_reorg_loops (FILE *dump_file)
}
/* Scan all the blocks to make sure they don't use iter_reg. */
if (ms1_scan_loop (loop, iter_reg, loop->dbnz))
if (mt_scan_loop (loop, iter_reg, loop->dbnz))
{
if (dump_file)
fprintf (dump_file, ";; loop %d uses iterator\n",
......@@ -2170,13 +2169,13 @@ typedef struct label_info
} label_info;
/* Chain of labels found in current function, used during reorg. */
static label_info *ms1_labels;
static label_info *mt_labels;
/* If *X is a label, add INSN to the list of branches for that
label. */
static int
ms1_add_branches (rtx *x, void *insn)
mt_add_branches (rtx *x, void *insn)
{
if (GET_CODE (*x) == LABEL_REF)
{
......@@ -2184,15 +2183,15 @@ ms1_add_branches (rtx *x, void *insn)
rtx label = XEXP (*x, 0);
label_info *info;
for (info = ms1_labels; info; info = info->next)
for (info = mt_labels; info; info = info->next)
if (info->label == label)
break;
if (!info)
{
info = xmalloc (sizeof (*info));
info->next = ms1_labels;
ms1_labels = info;
info->next = mt_labels;
mt_labels = info;
info->label = label;
info->branches = NULL;
......@@ -2212,7 +2211,7 @@ ms1_add_branches (rtx *x, void *insn)
In that case, the caller must insert nops at the branch target. */
static rtx
ms1_check_delay_slot (rtx branch, rtx insn)
mt_check_delay_slot (rtx branch, rtx insn)
{
rtx slot;
rtx tmp;
......@@ -2266,7 +2265,7 @@ ms1_check_delay_slot (rtx branch, rtx insn)
delay slot. */
static void
ms1_reorg_hazard (void)
mt_reorg_hazard (void)
{
rtx insn, next;
......@@ -2295,7 +2294,7 @@ ms1_reorg_hazard (void)
jmp = NEXT_INSN (jmp))
continue;
for_each_rtx (&PATTERN (jmp), ms1_add_branches, insn);
for_each_rtx (&PATTERN (jmp), mt_add_branches, insn);
}
/* Now scan for dependencies. */
......@@ -2367,7 +2366,7 @@ ms1_reorg_hazard (void)
label_info *label;
branch_info *branch;
for (label = ms1_labels;
for (label = mt_labels;
label;
label = label->next)
if (label->label == prev)
......@@ -2376,7 +2375,7 @@ ms1_reorg_hazard (void)
branch;
branch = branch->next)
{
tmp = ms1_check_delay_slot (branch->insn, jmp);
tmp = mt_check_delay_slot (branch->insn, jmp);
if (tmp == branch->insn)
{
......@@ -2397,7 +2396,7 @@ ms1_reorg_hazard (void)
if (GET_CODE (PATTERN (prev)) == SEQUENCE)
{
/* Look at the delay slot. */
tmp = ms1_check_delay_slot (prev, jmp);
tmp = mt_check_delay_slot (prev, jmp);
if (tmp == prev)
nops = count;
break;
......@@ -2443,12 +2442,12 @@ ms1_reorg_hazard (void)
}
/* Free the data structures. */
while (ms1_labels)
while (mt_labels)
{
label_info *label = ms1_labels;
label_info *label = mt_labels;
branch_info *branch, *next;
ms1_labels = label->next;
mt_labels = label->next;
for (branch = label->branches; branch; branch = next)
{
next = branch->next;
......@@ -2462,35 +2461,35 @@ ms1_reorg_hazard (void)
scheduling hazards. */
static void
ms1_machine_reorg (void)
mt_machine_reorg (void)
{
if (cfun->machine->has_loops && TARGET_MS2)
ms1_reorg_loops (dump_file);
mt_reorg_loops (dump_file);
if (ms1_flag_delayed_branch)
if (mt_flag_delayed_branch)
dbr_schedule (get_insns (), dump_file);
if (TARGET_MS2)
ms1_reorg_hazard ();
mt_reorg_hazard ();
}
/* Initialize the GCC target structure. */
const struct attribute_spec ms1_attribute_table[];
const struct attribute_spec mt_attribute_table[];
#undef TARGET_ATTRIBUTE_TABLE
#define TARGET_ATTRIBUTE_TABLE ms1_attribute_table
#define TARGET_ATTRIBUTE_TABLE mt_attribute_table
#undef TARGET_STRUCT_VALUE_RTX
#define TARGET_STRUCT_VALUE_RTX ms1_struct_value_rtx
#define TARGET_STRUCT_VALUE_RTX mt_struct_value_rtx
#undef TARGET_PROMOTE_PROTOTYPES
#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true
#undef TARGET_PASS_BY_REFERENCE
#define TARGET_PASS_BY_REFERENCE ms1_pass_by_reference
#define TARGET_PASS_BY_REFERENCE mt_pass_by_reference
#undef TARGET_MUST_PASS_IN_STACK
#define TARGET_MUST_PASS_IN_STACK ms1_pass_in_stack
#define TARGET_MUST_PASS_IN_STACK mt_pass_in_stack
#undef TARGET_ARG_PARTIAL_BYTES
#define TARGET_ARG_PARTIAL_BYTES ms1_arg_partial_bytes
#define TARGET_ARG_PARTIAL_BYTES mt_arg_partial_bytes
#undef TARGET_MACHINE_DEPENDENT_REORG
#define TARGET_MACHINE_DEPENDENT_REORG ms1_machine_reorg
#define TARGET_MACHINE_DEPENDENT_REORG mt_machine_reorg
struct gcc_target targetm = TARGET_INITIALIZER;
......
gcc/config/mt/mt.h
......@@ -19,7 +19,7 @@
Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA. */
extern struct rtx_def * ms1_ucmpsi3_libcall;
extern struct rtx_def * mt_ucmpsi3_libcall;
enum processor_type
{
......@@ -35,7 +35,7 @@ enum epilogue_type
NORMAL_EPILOGUE
};
extern enum processor_type ms1_cpu;
extern enum processor_type mt_cpu;
/* A C string constant that tells the GCC driver program options to pass to
......@@ -91,19 +91,19 @@ march=MS2:exit-ms2.o%s; \
#define TARGET_CPU_CPP_BUILTINS() \
do \
{ \
builtin_define_std ("ms1"); \
builtin_assert ("machine=ms1"); \
builtin_define_std ("mt"); \
builtin_assert ("machine=mt"); \
} \
while (0)
#define TARGET_MS1_64_001 (ms1_cpu == PROCESSOR_MS1_64_001)
#define TARGET_MS1_16_002 (ms1_cpu == PROCESSOR_MS1_16_002)
#define TARGET_MS1_16_003 (ms1_cpu == PROCESSOR_MS1_16_003)
#define TARGET_MS2 (ms1_cpu == PROCESSOR_MS2)
#define TARGET_MS1_64_001 (mt_cpu == PROCESSOR_MS1_64_001)
#define TARGET_MS1_16_002 (mt_cpu == PROCESSOR_MS1_16_002)
#define TARGET_MS1_16_003 (mt_cpu == PROCESSOR_MS1_16_003)
#define TARGET_MS2 (mt_cpu == PROCESSOR_MS2)
#define TARGET_VERSION fprintf (stderr, " (ms1)");
#define TARGET_VERSION fprintf (stderr, " (mt)");
#define OVERRIDE_OPTIONS ms1_override_options ()
#define OVERRIDE_OPTIONS mt_override_options ()
#define CAN_DEBUG_WITHOUT_FP 1
......@@ -343,7 +343,7 @@ enum reg_class
#define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS)
#define SECONDARY_RELOAD_CLASS(CLASS,MODE,X) \
ms1_secondary_reload_class((CLASS), (MODE), (X))
mt_secondary_reload_class((CLASS), (MODE), (X))
/* A C expression for the maximum number of consecutive registers of
class CLASS needed to hold a value of mode MODE. */
......@@ -402,8 +402,8 @@ enum reg_class
(`G', `H') that specify particular ranges of `const_double' values. */
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0
/* Most negative value represent on ms1 */
#define MS1_MIN_INT 0x80000000
/* Most negative value represent on mt */
#define MT_MIN_INT 0x80000000
/* Basic Stack Layout. */
......@@ -454,7 +454,7 @@ enum save_direction
#define FIRST_PARM_OFFSET(FUNDECL) 0
#define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
ms1_return_addr_rtx (COUNT)
mt_return_addr_rtx (COUNT)
/* A C expression whose value is RTL representing the location of the incoming
return address at the beginning of any function, before the prologue. This
......@@ -493,7 +493,7 @@ enum save_direction
/* Structure to be filled in by compute_frame_size with register
save masks, and offsets for the current function. */
struct ms1_frame_info
struct mt_frame_info
{
unsigned int total_size; /* # Bytes that the entire frame takes up. */
unsigned int pretend_size; /* # Bytes we push and pretend caller did. */
......@@ -508,7 +508,7 @@ struct ms1_frame_info
int initialized; /* Nonzero if frame size already calculated. */
};
extern struct ms1_frame_info current_frame_info;
extern struct mt_frame_info current_frame_info;
/* If defined, this macro specifies a table of register pairs used to eliminate
unneeded registers that point into the stack frame. */
......@@ -531,7 +531,7 @@ extern struct ms1_frame_info current_frame_info;
registers. This macro must be defined if `ELIMINABLE_REGS' is
defined. */
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
(OFFSET) = ms1_initial_elimination_offset (FROM, TO)
(OFFSET) = mt_initial_elimination_offset (FROM, TO)
/* If defined, the maximum amount of space required for outgoing
arguments will be computed and placed into the variable
......@@ -543,11 +543,11 @@ extern struct ms1_frame_info current_frame_info;
#define OUTGOING_REG_PARM_STACK_SPACE
/* The number of register assigned to holding function arguments. */
#define MS1_NUM_ARG_REGS 4
#define MT_NUM_ARG_REGS 4
/* Define this if it is the responsibility of the caller to allocate
the area reserved for arguments passed in registers. */
#define REG_PARM_STACK_SPACE(FNDECL) (MS1_NUM_ARG_REGS * UNITS_PER_WORD)
#define REG_PARM_STACK_SPACE(FNDECL) (MT_NUM_ARG_REGS * UNITS_PER_WORD)
/* Define this macro if `REG_PARM_STACK_SPACE' is defined, but the stack
parameters don't skip the area specified by it. */
......@@ -560,18 +560,18 @@ extern struct ms1_frame_info current_frame_info;
#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
ms1_function_arg (& (CUM), (MODE), (TYPE), (NAMED), FALSE)
mt_function_arg (& (CUM), (MODE), (TYPE), (NAMED), FALSE)
#define CUMULATIVE_ARGS int
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
ms1_init_cumulative_args (& (CUM), FNTYPE, LIBNAME, FNDECL, FALSE)
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
mt_init_cumulative_args (& (CUM), FNTYPE, LIBNAME, FNDECL, FALSE)
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
ms1_function_arg_advance (&CUM, MODE, TYPE, NAMED)
mt_function_arg_advance (&CUM, MODE, TYPE, NAMED)
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
ms1_function_arg_boundary (MODE, TYPE)
mt_function_arg_boundary (MODE, TYPE)
#define FUNCTION_ARG_REGNO_P(REGNO) \
((REGNO) >= FIRST_ARG_REGNUM && ((REGNO) <= LAST_ARG_REGNUM))
......@@ -579,10 +579,10 @@ extern struct ms1_frame_info current_frame_info;
#define RETURN_VALUE_REGNUM RETVAL_REGNUM
#define FUNCTION_VALUE(VALTYPE, FUNC) \
ms1_function_value (VALTYPE, TYPE_MODE(VALTYPE), FUNC)
mt_function_value (VALTYPE, TYPE_MODE(VALTYPE), FUNC)
#define LIBCALL_VALUE(MODE) \
ms1_function_value (NULL_TREE, MODE, NULL_TREE)
mt_function_value (NULL_TREE, MODE, NULL_TREE)
#define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == RETURN_VALUE_REGNUM)
......@@ -600,7 +600,7 @@ extern struct ms1_frame_info current_frame_info;
adjust the stack pointer before a return from the function. */
#define EXIT_IGNORE_STACK 1
#define EPILOGUE_USES(REGNO) ms1_epilogue_uses(REGNO)
#define EPILOGUE_USES(REGNO) mt_epilogue_uses(REGNO)
/* Define this macro if the function epilogue contains delay slots to which
instructions from the rest of the function can be "moved". */
......@@ -613,7 +613,7 @@ extern struct ms1_frame_info current_frame_info;
#define FUNCTION_PROFILER(FILE, LABELNO) gcc_unreachable ()
#define EXPAND_BUILTIN_VA_START(VALIST, NEXTARG) \
ms1_va_start (VALIST, NEXTARG)
mt_va_start (VALIST, NEXTARG)
/* Trampolines are not implemented. */
#define TRAMPOLINE_SIZE 0
......@@ -637,21 +637,21 @@ extern struct ms1_frame_info current_frame_info;
#ifdef REG_OK_STRICT
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
{ \
if (ms1_legitimate_address_p (MODE, X, 1)) \
if (mt_legitimate_address_p (MODE, X, 1)) \
goto ADDR; \
}
#else
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
{ \
if (ms1_legitimate_address_p (MODE, X, 0)) \
if (mt_legitimate_address_p (MODE, X, 0)) \
goto ADDR; \
}
#endif
#ifdef REG_OK_STRICT
#define REG_OK_FOR_BASE_P(X) ms1_reg_ok_for_base_p (X, 1)
#define REG_OK_FOR_BASE_P(X) mt_reg_ok_for_base_p (X, 1)
#else
#define REG_OK_FOR_BASE_P(X) ms1_reg_ok_for_base_p (X, 0)
#define REG_OK_FOR_BASE_P(X) mt_reg_ok_for_base_p (X, 0)
#endif
#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
......@@ -759,19 +759,19 @@ extern struct ms1_frame_info current_frame_info;
desire, and increment the variable PTR to point at the end of the opcode so
that it will not be output twice. */
#define ASM_OUTPUT_OPCODE(STREAM, PTR) \
(PTR) = ms1_asm_output_opcode (STREAM, PTR)
(PTR) = mt_asm_output_opcode (STREAM, PTR)
#define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
ms1_final_prescan_insn (INSN, OPVEC, NOPERANDS)
mt_final_prescan_insn (INSN, OPVEC, NOPERANDS)
#define PRINT_OPERAND(STREAM, X, CODE) ms1_print_operand (STREAM, X, CODE)
#define PRINT_OPERAND(STREAM, X, CODE) mt_print_operand (STREAM, X, CODE)
/* A C expression which evaluates to true if CODE is a valid punctuation
character for use in the `PRINT_OPERAND' macro. */
/* #: Print nop for delay slot. */
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '#')
#define PRINT_OPERAND_ADDRESS(STREAM, X) ms1_print_operand_address (STREAM, X)
#define PRINT_OPERAND_ADDRESS(STREAM, X) mt_print_operand_address (STREAM, X)
/* If defined, C string expressions to be used for the `%R', `%L', `%U', and
`%I' options of `asm_fprintf' (see `final.c'). These are useful when a
......@@ -874,6 +874,6 @@ fprintf (STREAM, "\t.word .L%d\n", VALUE)
stored from the compare operation. Note that we can't use "rtx" here
since it hasn't been defined! */
extern struct rtx_def * ms1_compare_op0;
extern struct rtx_def * ms1_compare_op1;
extern struct rtx_def * mt_compare_op0;
extern struct rtx_def * mt_compare_op1;
gcc/config/mt/mt.md
......@@ -68,8 +68,8 @@
;; Delay Slots
;; The ms1 does not allow branches in the delay slot.
;; The ms1 does not allow back to back memory or io instruction.
;; The mt does not allow branches in the delay slot.
;; The mt does not allow back to back memory or io instruction.
;; The compiler does not know what the type of instruction is at
;; the destination of the branch. Thus, only type that will be acceptable
;; (safe) is the arith type.
......@@ -199,7 +199,7 @@
(const_int -1)))
(clobber (match_scratch:SI 5 ""))])]
"TARGET_MS1_16_003 || TARGET_MS2"
{ms1_add_loop ();})
{mt_add_loop ();})
;; Moves
......@@ -294,7 +294,7 @@
start_sequence ();
emit_insn (gen_storeqi (gen_lowpart (SImode, data), address,
scratch1, scratch2, scratch3));
ms1_set_memflags (operands[0]);
mt_set_memflags (operands[0]);
seq = get_insns ();
end_sequence ();
emit_insn (seq);
......@@ -313,7 +313,7 @@
start_sequence ();
emit_insn (gen_loadqi (gen_lowpart (SImode, data), address, scratch1));
ms1_set_memflags (operands[1]);
mt_set_memflags (operands[1]);
seq = get_insns ();
end_sequence ();
emit_insn (seq);
......@@ -333,7 +333,7 @@
start_sequence ();
emit_insn (gen_movsi (gen_lowpart (SImode, data), address));
ms1_set_memflags (operands[1]);
mt_set_memflags (operands[1]);
seq = get_insns ();
end_sequence ();
emit_insn (seq);
......@@ -467,7 +467,7 @@
start_sequence ();
emit_insn (gen_storehi (gen_lowpart (SImode, data), address,
scratch1, scratch2, scratch3));
ms1_set_memflags (operands[0]);
mt_set_memflags (operands[0]);
seq = get_insns ();
end_sequence ();
emit_insn (seq);
......@@ -487,7 +487,7 @@
start_sequence ();
emit_insn (gen_loadhi (gen_lowpart (SImode, data), address,
scratch1));
ms1_set_memflags (operands[1]);
mt_set_memflags (operands[1]);
seq = get_insns ();
end_sequence ();
emit_insn (seq);
......@@ -506,7 +506,7 @@
start_sequence ();
emit_insn (gen_movsi (gen_lowpart (SImode, data), address));
ms1_set_memflags (operands[1]);
mt_set_memflags (operands[1]);
seq = get_insns ();
end_sequence ();
emit_insn (seq);
......@@ -716,7 +716,7 @@
"{
/* figure out what precisely to put into operands 2, 3, 4, and 5 */
ms1_split_words (SImode, DFmode, operands);
mt_split_words (SImode, DFmode, operands);
}"
)
......@@ -757,7 +757,7 @@
start_sequence ();
emit_insn (gen_loadqi (gen_lowpart (SImode, data), address, scratch1));
ms1_set_memflags (operands[1]);
mt_set_memflags (operands[1]);
seq = get_insns ();
end_sequence ();
emit_insn (seq);
......@@ -786,7 +786,7 @@
start_sequence ();
emit_insn (gen_storeqi (gen_lowpart (SImode, data), address,
scratch1, scratch2, scratch3));
ms1_set_memflags (operands[0]);
mt_set_memflags (operands[0]);
seq = get_insns ();
end_sequence ();
emit_insn (seq);
......@@ -824,7 +824,7 @@
start_sequence ();
emit_insn (gen_loadhi (gen_lowpart (SImode, data), address,
scratch1));
ms1_set_memflags (operands[1]);
mt_set_memflags (operands[1]);
seq = get_insns ();
end_sequence ();
emit_insn (seq);
......@@ -853,7 +853,7 @@
start_sequence ();
emit_insn (gen_storehi (gen_lowpart (SImode, data), address,
scratch1, scratch2, scratch3));
ms1_set_memflags (operands[0]);
mt_set_memflags (operands[0]);
seq = get_insns ();
end_sequence ();
emit_insn (seq);
......@@ -1014,8 +1014,8 @@
""
"
{
ms1_compare_op0 = operands[0];
ms1_compare_op1 = operands[1];
mt_compare_op0 = operands[0];
mt_compare_op1 = operands[1];
DONE;
}")
......@@ -1026,8 +1026,8 @@
[(use (match_operand 0 "" ""))]
""
"
{ ms1_emit_cbranch (EQ, operands[0],
ms1_compare_op0, ms1_compare_op1);
{
mt_emit_cbranch (EQ, operands[0], mt_compare_op0, mt_compare_op1);
DONE;
}")
......@@ -1035,8 +1035,8 @@
[(use (match_operand 0 "" ""))]
""
"
{ ms1_emit_cbranch (NE, operands[0],
ms1_compare_op0, ms1_compare_op1);
{
mt_emit_cbranch (NE, operands[0], mt_compare_op0, mt_compare_op1);
DONE;
}")
......@@ -1044,8 +1044,8 @@
[(use (match_operand 0 "" ""))]
""
"
{ ms1_emit_cbranch (GE, operands[0],
ms1_compare_op0, ms1_compare_op1);
{
mt_emit_cbranch (GE, operands[0], mt_compare_op0, mt_compare_op1);
DONE;
}")
......@@ -1053,8 +1053,8 @@
[(use (match_operand 0 "" ""))]
""
"
{ ms1_emit_cbranch (GT, operands[0],
ms1_compare_op0, ms1_compare_op1);
{
mt_emit_cbranch (GT, operands[0], mt_compare_op0, mt_compare_op1);
DONE;
}")
......@@ -1062,8 +1062,8 @@
[(use (match_operand 0 "" ""))]
""
"
{ ms1_emit_cbranch (LE, operands[0],
ms1_compare_op0, ms1_compare_op1);
{
mt_emit_cbranch (LE, operands[0], mt_compare_op0, mt_compare_op1);
DONE;
}")
......@@ -1071,8 +1071,8 @@
[(use (match_operand 0 "" ""))]
""
"
{ ms1_emit_cbranch (LT, operands[0],
ms1_compare_op0, ms1_compare_op1);
{
mt_emit_cbranch (LT, operands[0], mt_compare_op0, mt_compare_op1);
DONE;
}")
......@@ -1080,8 +1080,8 @@
[(use (match_operand 0 "" ""))]
""
"
{ ms1_emit_cbranch (GEU, operands[0],
ms1_compare_op0, ms1_compare_op1);
{
mt_emit_cbranch (GEU, operands[0], mt_compare_op0, mt_compare_op1);
DONE;
}")
......@@ -1089,8 +1089,8 @@
[(use (match_operand 0 "" ""))]
""
"
{ ms1_emit_cbranch (GTU, operands[0],
ms1_compare_op0, ms1_compare_op1);
{
mt_emit_cbranch (GTU, operands[0], mt_compare_op0, mt_compare_op1);
DONE;
}")
......@@ -1098,8 +1098,8 @@
[(use (match_operand 0 "" ""))]
""
"
{ ms1_emit_cbranch (LEU, operands[0],
ms1_compare_op0, ms1_compare_op1);
{
mt_emit_cbranch (LEU, operands[0], mt_compare_op0, mt_compare_op1);
DONE;
}")
......@@ -1107,8 +1107,8 @@
[(use (match_operand 0 "" ""))]
""
"
{ ms1_emit_cbranch (LTU, operands[0],
ms1_compare_op0, ms1_compare_op1);
{
mt_emit_cbranch (LTU, operands[0], mt_compare_op0, mt_compare_op1);
DONE;
}")
......@@ -1116,8 +1116,8 @@
[(use (match_operand 0 "" ""))]
""
"
{ ms1_emit_cbranch (GEU, operands[0],
ms1_compare_op0, ms1_compare_op1);
{
mt_emit_cbranch (GEU, operands[0], mt_compare_op0, mt_compare_op1);
DONE;
}")
......@@ -1126,8 +1126,7 @@
""
"
{
ms1_emit_cbranch (GTU, operands[0],
ms1_compare_op0, ms1_compare_op1);
mt_emit_cbranch (GTU, operands[0], mt_compare_op0, mt_compare_op1);
DONE;
}")
......@@ -1136,8 +1135,7 @@
""
"
{
ms1_emit_cbranch (LEU, operands[0],
ms1_compare_op0, ms1_compare_op1);
mt_emit_cbranch (LEU, operands[0], mt_compare_op0, mt_compare_op1);
DONE;
}")
......@@ -1146,8 +1144,7 @@
""
"
{
ms1_emit_cbranch (LTU, operands[0],
ms1_compare_op0, ms1_compare_op1);
mt_emit_cbranch (LTU, operands[0], mt_compare_op0, mt_compare_op1);
DONE;
}")
......@@ -1284,7 +1281,7 @@
[(set_attr "length" "4")
(set_attr "type" "branch")])
;; No unsigned operators on Morpho ms1. All the unsigned operations are
;; No unsigned operators on Morpho mt. All the unsigned operations are
;; converted to the signed operations above.
......@@ -1292,7 +1289,7 @@
;; "seq", "sne", "slt", "sle", "sgt", "sge", "sltu", "sleu",
;; "sgtu", and "sgeu" don't exist as regular instruction on the
;; ms1, so these are not defined
;; mt, so these are not defined
;; Call and branch instructions
......@@ -1402,7 +1399,7 @@
""
"
{
ms1_expand_prologue ();
mt_expand_prologue ();
DONE;
}")
......@@ -1411,7 +1408,7 @@
""
"
{
ms1_expand_epilogue (NORMAL_EPILOGUE);
mt_expand_epilogue (NORMAL_EPILOGUE);
DONE;
}")
......@@ -1421,7 +1418,7 @@
""
"
{
ms1_expand_eh_return (operands);
mt_expand_eh_return (operands);
DONE;
}")
......@@ -1432,7 +1429,7 @@
"#"
"reload_completed"
[(const_int 1)]
"ms1_emit_eh_epilogue (operands); DONE;"
"mt_emit_eh_epilogue (operands); DONE;"
)
;; No operation, needed in case the user uses -g but not -O.
......@@ -1479,8 +1476,8 @@
""
"
{
operands[2] = ms1_compare_op0;
operands[3] = ms1_compare_op1;
operands[2] = mt_compare_op0;
operands[3] = mt_compare_op1;
}")
;; Templates to control handling of interrupts
......
gcc/config/mt/mt.opt
; Options for the ms1 port of the compiler
; Options for the mt port of the compiler
;
; Copyright (C) 2005 Free Software Foundation, Inc.
;
......@@ -52,5 +52,5 @@ Target RejectNegative Mask(DEBUG)
Internal debug switch
march=
Target RejectNegative Joined Var(ms1_cpu_string)
Target RejectNegative Joined Var(mt_cpu_string)
Specify CPU for code generation purposes
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