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riscv-gcc-1
Commit bbc8841b by Uros Bizjak
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i386.md (movmem<mode>): Macroize expander from movmem{si,di} using SWI48 mode iterator. 

	* config/i386/i386.md (movmem<mode>): Macroize expander from
	movmem{si,di} using SWI48 mode iterator.
	(*strmovsi_1): Macroize insn pattern from *strmovsi_1 and
	*strmovsi_rex_1 using P mode iterator.
	(*strmovhi_1): Ditto from *strmovhi_1 and *strmovhi_rex_1.
	(*strmovqi_1): Ditto from *strmovqi_1 and *strmovqi_rex_1.
	(*rep_movsi): Ditto from *rep_movsi and *rep_movsi_rex64.
	(*rep_movqi): Ditto from *rep_movqi and *rep_movqi_rex64.
	(setmem<mode>): Macroize expander from setmem{si,di} using
	SWI48 mode iterator.
	(*strsetsi_1): Macroize insn pattern from *strsetsi_1 and
	*strsetsi_rex_1 using P mode iterator.
	(*strsethi_1): Ditto from *strsethi_1 and *strsethi_rex_1.
	(*strsetqi_1): Ditto from *strsetqi_1 and *strsetqi_rex_1.
	(*rep_stossi): Ditto from *rep_stossi and *rep_stossi_rex64.
	(*rep_stosqi): Ditto from *rep_stosqi and *rep_stosqi_rex64.
	(*cmpstrnqi_nz_1): Ditto from *cmpstrnqi_nz_1 and *cmpstrnqi_nz_rex_1.
	(*cmpstrnqi_1): Ditto from *cmpstrnqi_1 and *cmpstrnqi_rex_1.
	(strlen<mode>): Macroize expander from strlen{si,di} using SWI48x
	mode iterator.
	(*strlenqi_1): Macroize insn pattern from *strlenqi_1 and
	*strlenqi_rex_1 using P mode iterator.

From-SVN: r165331
parent 7c663eb0
Showing with 160 additions and 356 deletions
gcc/ChangeLog
2010-10-11 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (movmem<mode>): Macroize expander from
movmem{si,di} using SWI48 mode iterator.
(*strmovsi_1): Macroize insn pattern from *strmovsi_1 and
*strmovsi_rex_1 using P mode iterator.
(*strmovhi_1): Ditto from *strmovhi_1 and *strmovhi_rex_1.
(*strmovqi_1): Ditto from *strmovqi_1 and *strmovqi_rex_1.
(*rep_movsi): Ditto from *rep_movsi and *rep_movsi_rex64.
(*rep_movqi): Ditto from *rep_movqi and *rep_movqi_rex64.
(setmem<mode>): Macroize expander from setmem{si,di} using
SWI48 mode iterator.
(*strsetsi_1): Macroize insn pattern from *strsetsi_1 and
*strsetsi_rex_1 using P mode iterator.
(*strsethi_1): Ditto from *strsethi_1 and *strsethi_rex_1.
(*strsetqi_1): Ditto from *strsetqi_1 and *strsetqi_rex_1.
(*rep_stossi): Ditto from *rep_stossi and *rep_stossi_rex64.
(*rep_stosqi): Ditto from *rep_stosqi and *rep_stosqi_rex64.
(*cmpstrnqi_nz_1): Ditto from *cmpstrnqi_nz_1 and *cmpstrnqi_nz_rex_1.
(*cmpstrnqi_1): Ditto from *cmpstrnqi_1 and *cmpstrnqi_rex_1.
(strlen<mode>): Macroize expander from strlen{si,di} using SWI48x
mode iterator.
(*strlenqi_1): Macroize insn pattern from *strlenqi_1 and
*strlenqi_rex_1 using P mode iterator.
2010-10-11 Bernd Schmidt <bernds@codesourcery.com> 2010-10-11 Bernd Schmidt <bernds@codesourcery.com>
PR bootstrap/45445 PR bootstrap/45445
...@@ -118,8 +143,7 @@ ...@@ -118,8 +143,7 @@
* tree.h (TREE_THIS_NOTRAP): Use TREE_CHECK5. * tree.h (TREE_THIS_NOTRAP): Use TREE_CHECK5.
* emit-rtl.c (set_mem_attributes_minus_bitpos): Only check * emit-rtl.c (set_mem_attributes_minus_bitpos): Only check
TREE_THIS_NOTRAP when appropriate. TREE_THIS_NOTRAP when appropriate.
(get_spill_slot_decl): Don't set TREE_THIS_NOTRAP on the new (get_spill_slot_decl): Don't set TREE_THIS_NOTRAP on the new VAR_DECL.
VAR_DECL.
* gimplify.c (gimplify_expr): Copy NOTRAP from INDIRECT_REF to * gimplify.c (gimplify_expr): Copy NOTRAP from INDIRECT_REF to
newly created MEM_REF. newly created MEM_REF.
...@@ -166,8 +190,7 @@ ...@@ -166,8 +190,7 @@
(maybe_set_param_value, set_default_param_value): New. (maybe_set_param_value, set_default_param_value): New.
* params.h (PARAM_VALUE, PARAM_SET_P): Make into rvalues. * params.h (PARAM_VALUE, PARAM_SET_P): Make into rvalues.
(maybe_set_param_value, set_default_param_value): Declare. (maybe_set_param_value, set_default_param_value): Declare.
* config/arm/arm.c (arm_option_override): Use * config/arm/arm.c (arm_option_override): Use maybe_set_param_value.
maybe_set_param_value.
* config/i386/i386.c (ix86_option_override_internal): Use * config/i386/i386.c (ix86_option_override_internal): Use
maybe_set_param_value. maybe_set_param_value.
* config/ia64/ia64.c (ia64_option_default_params, * config/ia64/ia64.c (ia64_option_default_params,
...@@ -181,18 +204,15 @@ ...@@ -181,18 +204,15 @@
(rs6000_option_override_internal): Use maybe_set_param_value. (rs6000_option_override_internal): Use maybe_set_param_value.
(rs6000_option_optimization): Move some code to (rs6000_option_optimization): Move some code to
rs6000_option_default_params. rs6000_option_default_params.
* config/s390/s390.c (s390_option_override): Use * config/s390/s390.c (s390_option_override): Use maybe_set_param_value.
maybe_set_param_value.
* config/sh/sh.c (sh_option_default_params, * config/sh/sh.c (sh_option_default_params,
TARGET_OPTION_DEFAULT_PARAMS): New. TARGET_OPTION_DEFAULT_PARAMS): New.
(sh_option_optimization): Move some code to (sh_option_optimization): Move some code to sh_option_default_params.
sh_option_default_params.
* config/sparc/sparc.c (sparc_option_override): Use * config/sparc/sparc.c (sparc_option_override): Use
maybe_set_param_value. maybe_set_param_value.
* config/spu/spu.c (spu_option_default_params, * config/spu/spu.c (spu_option_default_params,
TARGET_OPTION_DEFAULT_PARAMS): New. TARGET_OPTION_DEFAULT_PARAMS): New.
(spu_option_optimization): Move some code to (spu_option_optimization): Move some code to spu_option_default_params.
spu_option_default_params.
(spu_option_override): Use maybe_set_param_value. (spu_option_override): Use maybe_set_param_value.
* doc/tm.texi.in (TARGET_OPTION_DEFAULT_PARAMS): New @hook. * doc/tm.texi.in (TARGET_OPTION_DEFAULT_PARAMS): New @hook.
* doc/tm.texi: Regenerate. * doc/tm.texi: Regenerate.
...@@ -202,8 +222,7 @@ ...@@ -202,8 +222,7 @@
(default_options_optimization): Use maybe_set_param_value. (default_options_optimization): Use maybe_set_param_value.
(finish_options): Use maybe_set_param_value. (finish_options): Use maybe_set_param_value.
* target.def (target_option.default_params): New hook. * target.def (target_option.default_params): New hook.
* toplev.c (general_init): Call * toplev.c (general_init): Call targetm.target_option.default_params.
targetm.target_option.default_params.
2010-10-11 Ira Rosen <irar@il.ibm.com> 2010-10-11 Ira Rosen <irar@il.ibm.com>
gcc/config/i386/i386.md
...@@ -15189,11 +15189,11 @@ ...@@ -15189,11 +15189,11 @@
(set_attr "length_immediate" "0") (set_attr "length_immediate" "0")
(set_attr "modrm" "0")]) (set_attr "modrm" "0")])
(define_expand "movmemsi" (define_expand "movmem<mode>"
[(use (match_operand:BLK 0 "memory_operand" "")) [(use (match_operand:BLK 0 "memory_operand" ""))
(use (match_operand:BLK 1 "memory_operand" "")) (use (match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:SI 2 "nonmemory_operand" "")) (use (match_operand:SWI48 2 "nonmemory_operand" ""))
(use (match_operand:SI 3 "const_int_operand" "")) (use (match_operand:SWI48 3 "const_int_operand" ""))
(use (match_operand:SI 4 "const_int_operand" "")) (use (match_operand:SI 4 "const_int_operand" ""))
(use (match_operand:SI 5 "const_int_operand" ""))] (use (match_operand:SI 5 "const_int_operand" ""))]
"" ""
...@@ -15205,22 +15205,6 @@ ...@@ -15205,22 +15205,6 @@
FAIL; FAIL;
}) })
(define_expand "movmemdi"
[(use (match_operand:BLK 0 "memory_operand" ""))
(use (match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:DI 2 "nonmemory_operand" ""))
(use (match_operand:DI 3 "const_int_operand" ""))
(use (match_operand:SI 4 "const_int_operand" ""))
(use (match_operand:SI 5 "const_int_operand" ""))]
"TARGET_64BIT"
{
if (ix86_expand_movmem (operands[0], operands[1], operands[2], operands[3],
operands[4], operands[5]))
DONE;
else
FAIL;
})
;; Most CPUs don't like single string operations ;; Most CPUs don't like single string operations
;; Handle this case here to simplify previous expander. ;; Handle this case here to simplify previous expander.
...@@ -15275,98 +15259,57 @@ ...@@ -15275,98 +15259,57 @@
"TARGET_64BIT" "TARGET_64BIT"
"movsq" "movsq"
[(set_attr "type" "str") [(set_attr "type" "str")
(set_attr "mode" "DI") (set_attr "memory" "both")
(set_attr "memory" "both")]) (set_attr "mode" "DI")])
(define_insn "*strmovsi_1" (define_insn "*strmovsi_1"
[(set (mem:SI (match_operand:SI 2 "register_operand" "0")) [(set (mem:SI (match_operand:P 2 "register_operand" "0"))
(mem:SI (match_operand:SI 3 "register_operand" "1"))) (mem:SI (match_operand:P 3 "register_operand" "1")))
(set (match_operand:SI 0 "register_operand" "=D") (set (match_operand:P 0 "register_operand" "=D")
(plus:SI (match_dup 2) (plus:P (match_dup 2)
(const_int 4))) (const_int 4)))
(set (match_operand:SI 1 "register_operand" "=S") (set (match_operand:P 1 "register_operand" "=S")
(plus:SI (match_dup 3) (plus:P (match_dup 3)
(const_int 4)))] (const_int 4)))]
"!TARGET_64BIT" ""
"movs{l|d}"
[(set_attr "type" "str")
(set_attr "mode" "SI")
(set_attr "memory" "both")])
(define_insn "*strmovsi_rex_1"
[(set (mem:SI (match_operand:DI 2 "register_operand" "0"))
(mem:SI (match_operand:DI 3 "register_operand" "1")))
(set (match_operand:DI 0 "register_operand" "=D")
(plus:DI (match_dup 2)
(const_int 4)))
(set (match_operand:DI 1 "register_operand" "=S")
(plus:DI (match_dup 3)
(const_int 4)))]
"TARGET_64BIT"
"movs{l|d}" "movs{l|d}"
[(set_attr "type" "str") [(set_attr "type" "str")
(set_attr "mode" "SI")
(set_attr "memory" "both")])
(define_insn "*strmovhi_1"
[(set (mem:HI (match_operand:SI 2 "register_operand" "0"))
(mem:HI (match_operand:SI 3 "register_operand" "1")))
(set (match_operand:SI 0 "register_operand" "=D")
(plus:SI (match_dup 2)
(const_int 2)))
(set (match_operand:SI 1 "register_operand" "=S")
(plus:SI (match_dup 3)
(const_int 2)))]
"!TARGET_64BIT"
"movsw"
[(set_attr "type" "str")
(set_attr "memory" "both") (set_attr "memory" "both")
(set_attr "mode" "HI")]) (set_attr "mode" "SI")])
(define_insn "*strmovhi_rex_1" (define_insn "*strmovhi_1"
[(set (mem:HI (match_operand:DI 2 "register_operand" "0")) [(set (mem:HI (match_operand:P 2 "register_operand" "0"))
(mem:HI (match_operand:DI 3 "register_operand" "1"))) (mem:HI (match_operand:P 3 "register_operand" "1")))
(set (match_operand:DI 0 "register_operand" "=D") (set (match_operand:P 0 "register_operand" "=D")
(plus:DI (match_dup 2) (plus:P (match_dup 2)
(const_int 2))) (const_int 2)))
(set (match_operand:DI 1 "register_operand" "=S") (set (match_operand:P 1 "register_operand" "=S")
(plus:DI (match_dup 3) (plus:P (match_dup 3)
(const_int 2)))] (const_int 2)))]
"TARGET_64BIT" ""
"movsw" "movsw"
[(set_attr "type" "str") [(set_attr "type" "str")
(set_attr "memory" "both") (set_attr "memory" "both")
(set_attr "mode" "HI")]) (set_attr "mode" "HI")])
(define_insn "*strmovqi_1" (define_insn "*strmovqi_1"
[(set (mem:QI (match_operand:SI 2 "register_operand" "0")) [(set (mem:QI (match_operand:P 2 "register_operand" "0"))
(mem:QI (match_operand:SI 3 "register_operand" "1"))) (mem:QI (match_operand:P 3 "register_operand" "1")))
(set (match_operand:SI 0 "register_operand" "=D") (set (match_operand:P 0 "register_operand" "=D")
(plus:SI (match_dup 2) (plus:P (match_dup 2)
(const_int 1))) (const_int 1)))
(set (match_operand:SI 1 "register_operand" "=S") (set (match_operand:P 1 "register_operand" "=S")
(plus:SI (match_dup 3) (plus:P (match_dup 3)
(const_int 1)))] (const_int 1)))]
"!TARGET_64BIT" ""
"movsb"
[(set_attr "type" "str")
(set_attr "memory" "both")
(set_attr "mode" "QI")])
(define_insn "*strmovqi_rex_1"
[(set (mem:QI (match_operand:DI 2 "register_operand" "0"))
(mem:QI (match_operand:DI 3 "register_operand" "1")))
(set (match_operand:DI 0 "register_operand" "=D")
(plus:DI (match_dup 2)
(const_int 1)))
(set (match_operand:DI 1 "register_operand" "=S")
(plus:DI (match_dup 3)
(const_int 1)))]
"TARGET_64BIT"
"movsb" "movsb"
[(set_attr "type" "str") [(set_attr "type" "str")
(set_attr "memory" "both") (set_attr "memory" "both")
(set_attr "prefix_rex" "0") (set (attr "prefix_rex")
(if_then_else
(ne (symbol_ref "<P:MODE>mode == DImode") (const_int 0))
(const_string "0")
(const_string "*")))
(set_attr "mode" "QI")]) (set_attr "mode" "QI")])
(define_expand "rep_mov" (define_expand "rep_mov"
...@@ -15401,37 +15344,18 @@ ...@@ -15401,37 +15344,18 @@
(set_attr "mode" "DI")]) (set_attr "mode" "DI")])
(define_insn "*rep_movsi" (define_insn "*rep_movsi"
[(set (match_operand:SI 2 "register_operand" "=c") (const_int 0)) [(set (match_operand:P 2 "register_operand" "=c") (const_int 0))
(set (match_operand:SI 0 "register_operand" "=D") (set (match_operand:P 0 "register_operand" "=D")
(plus:SI (ashift:SI (match_operand:SI 5 "register_operand" "2") (plus:P (ashift:P (match_operand:P 5 "register_operand" "2")
(const_int 2)) (const_int 2))
(match_operand:SI 3 "register_operand" "0"))) (match_operand:P 3 "register_operand" "0")))
(set (match_operand:SI 1 "register_operand" "=S") (set (match_operand:P 1 "register_operand" "=S")
(plus:SI (ashift:SI (match_dup 5) (const_int 2)) (plus:P (ashift:P (match_dup 5) (const_int 2))
(match_operand:SI 4 "register_operand" "1"))) (match_operand:P 4 "register_operand" "1")))
(set (mem:BLK (match_dup 3)) (set (mem:BLK (match_dup 3))
(mem:BLK (match_dup 4))) (mem:BLK (match_dup 4)))
(use (match_dup 5))] (use (match_dup 5))]
"!TARGET_64BIT" ""
"rep{%;} movs{l|d}"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "both")
(set_attr "mode" "SI")])
(define_insn "*rep_movsi_rex64"
[(set (match_operand:DI 2 "register_operand" "=c") (const_int 0))
(set (match_operand:DI 0 "register_operand" "=D")
(plus:DI (ashift:DI (match_operand:DI 5 "register_operand" "2")
(const_int 2))
(match_operand:DI 3 "register_operand" "0")))
(set (match_operand:DI 1 "register_operand" "=S")
(plus:DI (ashift:DI (match_dup 5) (const_int 2))
(match_operand:DI 4 "register_operand" "1")))
(set (mem:BLK (match_dup 3))
(mem:BLK (match_dup 4)))
(use (match_dup 5))]
"TARGET_64BIT"
"rep{%;} movs{l|d}" "rep{%;} movs{l|d}"
[(set_attr "type" "str") [(set_attr "type" "str")
(set_attr "prefix_rep" "1") (set_attr "prefix_rep" "1")
...@@ -15439,42 +15363,25 @@ ...@@ -15439,42 +15363,25 @@
(set_attr "mode" "SI")]) (set_attr "mode" "SI")])
(define_insn "*rep_movqi" (define_insn "*rep_movqi"
[(set (match_operand:SI 2 "register_operand" "=c") (const_int 0)) [(set (match_operand:P 2 "register_operand" "=c") (const_int 0))
(set (match_operand:SI 0 "register_operand" "=D") (set (match_operand:P 0 "register_operand" "=D")
(plus:SI (match_operand:SI 3 "register_operand" "0") (plus:P (match_operand:P 3 "register_operand" "0")
(match_operand:SI 5 "register_operand" "2"))) (match_operand:P 5 "register_operand" "2")))
(set (match_operand:SI 1 "register_operand" "=S") (set (match_operand:P 1 "register_operand" "=S")
(plus:SI (match_operand:SI 4 "register_operand" "1") (match_dup 5))) (plus:P (match_operand:P 4 "register_operand" "1") (match_dup 5)))
(set (mem:BLK (match_dup 3))
(mem:BLK (match_dup 4)))
(use (match_dup 5))]
"!TARGET_64BIT"
"rep{%;} movsb"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "both")
(set_attr "mode" "SI")])
(define_insn "*rep_movqi_rex64"
[(set (match_operand:DI 2 "register_operand" "=c") (const_int 0))
(set (match_operand:DI 0 "register_operand" "=D")
(plus:DI (match_operand:DI 3 "register_operand" "0")
(match_operand:DI 5 "register_operand" "2")))
(set (match_operand:DI 1 "register_operand" "=S")
(plus:DI (match_operand:DI 4 "register_operand" "1") (match_dup 5)))
(set (mem:BLK (match_dup 3)) (set (mem:BLK (match_dup 3))
(mem:BLK (match_dup 4))) (mem:BLK (match_dup 4)))
(use (match_dup 5))] (use (match_dup 5))]
"TARGET_64BIT" ""
"rep{%;} movsb" "rep{%;} movsb"
[(set_attr "type" "str") [(set_attr "type" "str")
(set_attr "prefix_rep" "1") (set_attr "prefix_rep" "1")
(set_attr "memory" "both") (set_attr "memory" "both")
(set_attr "mode" "SI")]) (set_attr "mode" "QI")])
(define_expand "setmemsi" (define_expand "setmem<mode>"
[(use (match_operand:BLK 0 "memory_operand" "")) [(use (match_operand:BLK 0 "memory_operand" ""))
(use (match_operand:SI 1 "nonmemory_operand" "")) (use (match_operand:SWI48 1 "nonmemory_operand" ""))
(use (match_operand 2 "const_int_operand" "")) (use (match_operand 2 "const_int_operand" ""))
(use (match_operand 3 "const_int_operand" "")) (use (match_operand 3 "const_int_operand" ""))
(use (match_operand:SI 4 "const_int_operand" "")) (use (match_operand:SI 4 "const_int_operand" ""))
...@@ -15489,23 +15396,6 @@ ...@@ -15489,23 +15396,6 @@
FAIL; FAIL;
}) })
(define_expand "setmemdi"
[(use (match_operand:BLK 0 "memory_operand" ""))
(use (match_operand:DI 1 "nonmemory_operand" ""))
(use (match_operand 2 "const_int_operand" ""))
(use (match_operand 3 "const_int_operand" ""))
(use (match_operand 4 "const_int_operand" ""))
(use (match_operand 5 "const_int_operand" ""))]
"TARGET_64BIT"
{
if (ix86_expand_setmem (operands[0], operands[1],
operands[2], operands[3],
operands[4], operands[5]))
DONE;
else
FAIL;
})
;; Most CPUs don't like single string operations ;; Most CPUs don't like single string operations
;; Handle this case here to simplify previous expander. ;; Handle this case here to simplify previous expander.
...@@ -15554,76 +15444,44 @@ ...@@ -15554,76 +15444,44 @@
(set_attr "mode" "DI")]) (set_attr "mode" "DI")])
(define_insn "*strsetsi_1" (define_insn "*strsetsi_1"
[(set (mem:SI (match_operand:SI 1 "register_operand" "0")) [(set (mem:SI (match_operand:P 1 "register_operand" "0"))
(match_operand:SI 2 "register_operand" "a")) (match_operand:SI 2 "register_operand" "a"))
(set (match_operand:SI 0 "register_operand" "=D") (set (match_operand:P 0 "register_operand" "=D")
(plus:SI (match_dup 1) (plus:P (match_dup 1)
(const_int 4)))] (const_int 4)))]
"!TARGET_64BIT" ""
"stos{l|d}"
[(set_attr "type" "str")
(set_attr "memory" "store")
(set_attr "mode" "SI")])
(define_insn "*strsetsi_rex_1"
[(set (mem:SI (match_operand:DI 1 "register_operand" "0"))
(match_operand:SI 2 "register_operand" "a"))
(set (match_operand:DI 0 "register_operand" "=D")
(plus:DI (match_dup 1)
(const_int 4)))]
"TARGET_64BIT"
"stos{l|d}" "stos{l|d}"
[(set_attr "type" "str") [(set_attr "type" "str")
(set_attr "memory" "store") (set_attr "memory" "store")
(set_attr "mode" "SI")]) (set_attr "mode" "SI")])
(define_insn "*strsethi_1" (define_insn "*strsethi_1"
[(set (mem:HI (match_operand:SI 1 "register_operand" "0")) [(set (mem:HI (match_operand:P 1 "register_operand" "0"))
(match_operand:HI 2 "register_operand" "a")) (match_operand:HI 2 "register_operand" "a"))
(set (match_operand:SI 0 "register_operand" "=D") (set (match_operand:P 0 "register_operand" "=D")
(plus:SI (match_dup 1) (plus:P (match_dup 1)
(const_int 2)))] (const_int 2)))]
"!TARGET_64BIT" ""
"stosw"
[(set_attr "type" "str")
(set_attr "memory" "store")
(set_attr "mode" "HI")])
(define_insn "*strsethi_rex_1"
[(set (mem:HI (match_operand:DI 1 "register_operand" "0"))
(match_operand:HI 2 "register_operand" "a"))
(set (match_operand:DI 0 "register_operand" "=D")
(plus:DI (match_dup 1)
(const_int 2)))]
"TARGET_64BIT"
"stosw" "stosw"
[(set_attr "type" "str") [(set_attr "type" "str")
(set_attr "memory" "store") (set_attr "memory" "store")
(set_attr "mode" "HI")]) (set_attr "mode" "HI")])
(define_insn "*strsetqi_1" (define_insn "*strsetqi_1"
[(set (mem:QI (match_operand:SI 1 "register_operand" "0")) [(set (mem:QI (match_operand:P 1 "register_operand" "0"))
(match_operand:QI 2 "register_operand" "a")) (match_operand:QI 2 "register_operand" "a"))
(set (match_operand:SI 0 "register_operand" "=D") (set (match_operand:P 0 "register_operand" "=D")
(plus:SI (match_dup 1) (plus:P (match_dup 1)
(const_int 1)))] (const_int 1)))]
"!TARGET_64BIT" ""
"stosb"
[(set_attr "type" "str")
(set_attr "memory" "store")
(set_attr "mode" "QI")])
(define_insn "*strsetqi_rex_1"
[(set (mem:QI (match_operand:DI 1 "register_operand" "0"))
(match_operand:QI 2 "register_operand" "a"))
(set (match_operand:DI 0 "register_operand" "=D")
(plus:DI (match_dup 1)
(const_int 1)))]
"TARGET_64BIT"
"stosb" "stosb"
[(set_attr "type" "str") [(set_attr "type" "str")
(set_attr "memory" "store") (set_attr "memory" "store")
(set_attr "prefix_rex" "0") (set (attr "prefix_rex")
(if_then_else
(ne (symbol_ref "<P:MODE>mode == DImode") (const_int 0))
(const_string "0")
(const_string "*")))
(set_attr "mode" "QI")]) (set_attr "mode" "QI")])
(define_expand "rep_stos" (define_expand "rep_stos"
...@@ -15654,33 +15512,16 @@ ...@@ -15654,33 +15512,16 @@
(set_attr "mode" "DI")]) (set_attr "mode" "DI")])
(define_insn "*rep_stossi" (define_insn "*rep_stossi"
[(set (match_operand:SI 1 "register_operand" "=c") (const_int 0)) [(set (match_operand:P 1 "register_operand" "=c") (const_int 0))
(set (match_operand:SI 0 "register_operand" "=D") (set (match_operand:P 0 "register_operand" "=D")
(plus:SI (ashift:SI (match_operand:SI 4 "register_operand" "1") (plus:P (ashift:P (match_operand:P 4 "register_operand" "1")
(const_int 2))
(match_operand:SI 3 "register_operand" "0")))
(set (mem:BLK (match_dup 3))
(const_int 0))
(use (match_operand:SI 2 "register_operand" "a"))
(use (match_dup 4))]
"!TARGET_64BIT"
"rep{%;} stos{l|d}"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "store")
(set_attr "mode" "SI")])
(define_insn "*rep_stossi_rex64"
[(set (match_operand:DI 1 "register_operand" "=c") (const_int 0))
(set (match_operand:DI 0 "register_operand" "=D")
(plus:DI (ashift:DI (match_operand:DI 4 "register_operand" "1")
(const_int 2)) (const_int 2))
(match_operand:DI 3 "register_operand" "0"))) (match_operand:P 3 "register_operand" "0")))
(set (mem:BLK (match_dup 3)) (set (mem:BLK (match_dup 3))
(const_int 0)) (const_int 0))
(use (match_operand:SI 2 "register_operand" "a")) (use (match_operand:SI 2 "register_operand" "a"))
(use (match_dup 4))] (use (match_dup 4))]
"TARGET_64BIT" ""
"rep{%;} stos{l|d}" "rep{%;} stos{l|d}"
[(set_attr "type" "str") [(set_attr "type" "str")
(set_attr "prefix_rep" "1") (set_attr "prefix_rep" "1")
...@@ -15688,36 +15529,24 @@ ...@@ -15688,36 +15529,24 @@
(set_attr "mode" "SI")]) (set_attr "mode" "SI")])
(define_insn "*rep_stosqi" (define_insn "*rep_stosqi"
[(set (match_operand:SI 1 "register_operand" "=c") (const_int 0)) [(set (match_operand:P 1 "register_operand" "=c") (const_int 0))
(set (match_operand:SI 0 "register_operand" "=D") (set (match_operand:P 0 "register_operand" "=D")
(plus:SI (match_operand:SI 3 "register_operand" "0") (plus:P (match_operand:P 3 "register_operand" "0")
(match_operand:SI 4 "register_operand" "1"))) (match_operand:P 4 "register_operand" "1")))
(set (mem:BLK (match_dup 3)) (set (mem:BLK (match_dup 3))
(const_int 0)) (const_int 0))
(use (match_operand:QI 2 "register_operand" "a")) (use (match_operand:QI 2 "register_operand" "a"))
(use (match_dup 4))] (use (match_dup 4))]
"!TARGET_64BIT" ""
"rep{%;} stosb"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "store")
(set_attr "mode" "QI")])
(define_insn "*rep_stosqi_rex64"
[(set (match_operand:DI 1 "register_operand" "=c") (const_int 0))
(set (match_operand:DI 0 "register_operand" "=D")
(plus:DI (match_operand:DI 3 "register_operand" "0")
(match_operand:DI 4 "register_operand" "1")))
(set (mem:BLK (match_dup 3))
(const_int 0))
(use (match_operand:QI 2 "register_operand" "a"))
(use (match_dup 4))]
"TARGET_64BIT"
"rep{%;} stosb" "rep{%;} stosb"
[(set_attr "type" "str") [(set_attr "type" "str")
(set_attr "prefix_rep" "1") (set_attr "prefix_rep" "1")
(set_attr "memory" "store") (set_attr "memory" "store")
(set_attr "prefix_rex" "0") (set (attr "prefix_rex")
(if_then_else
(ne (symbol_ref "<P:MODE>mode == DImode") (const_int 0))
(const_string "0")
(const_string "*")))
(set_attr "mode" "QI")]) (set_attr "mode" "QI")])
(define_expand "cmpstrnsi" (define_expand "cmpstrnsi"
...@@ -15800,8 +15629,10 @@ ...@@ -15800,8 +15629,10 @@
(match_dup 2))) (match_dup 2)))
(clobber (reg:CC FLAGS_REG))])] (clobber (reg:CC FLAGS_REG))])]
"" ""
"operands[1] = gen_reg_rtx (QImode); {
operands[2] = gen_reg_rtx (QImode);") operands[1] = gen_reg_rtx (QImode);
operands[2] = gen_reg_rtx (QImode);
})
;; memcmp recognizers. The `cmpsb' opcode does nothing if the count is ;; memcmp recognizers. The `cmpsb' opcode does nothing if the count is
;; zero. Emit extra code to make sure that a zero-length compare is EQ. ;; zero. Emit extra code to make sure that a zero-length compare is EQ.
...@@ -15820,33 +15651,22 @@ ...@@ -15820,33 +15651,22 @@
(define_insn "*cmpstrnqi_nz_1" (define_insn "*cmpstrnqi_nz_1"
[(set (reg:CC FLAGS_REG) [(set (reg:CC FLAGS_REG)
(compare:CC (mem:BLK (match_operand:SI 4 "register_operand" "0")) (compare:CC (mem:BLK (match_operand:P 4 "register_operand" "0"))
(mem:BLK (match_operand:SI 5 "register_operand" "1")))) (mem:BLK (match_operand:P 5 "register_operand" "1"))))
(use (match_operand:SI 6 "register_operand" "2")) (use (match_operand:P 6 "register_operand" "2"))
(use (match_operand:SI 3 "immediate_operand" "i"))
(clobber (match_operand:SI 0 "register_operand" "=S"))
(clobber (match_operand:SI 1 "register_operand" "=D"))
(clobber (match_operand:SI 2 "register_operand" "=c"))]
"!TARGET_64BIT"
"repz{%;} cmpsb"
[(set_attr "type" "str")
(set_attr "mode" "QI")
(set_attr "prefix_rep" "1")])
(define_insn "*cmpstrnqi_nz_rex_1"
[(set (reg:CC FLAGS_REG)
(compare:CC (mem:BLK (match_operand:DI 4 "register_operand" "0"))
(mem:BLK (match_operand:DI 5 "register_operand" "1"))))
(use (match_operand:DI 6 "register_operand" "2"))
(use (match_operand:SI 3 "immediate_operand" "i")) (use (match_operand:SI 3 "immediate_operand" "i"))
(clobber (match_operand:DI 0 "register_operand" "=S")) (clobber (match_operand:P 0 "register_operand" "=S"))
(clobber (match_operand:DI 1 "register_operand" "=D")) (clobber (match_operand:P 1 "register_operand" "=D"))
(clobber (match_operand:DI 2 "register_operand" "=c"))] (clobber (match_operand:P 2 "register_operand" "=c"))]
"TARGET_64BIT" ""
"repz{%;} cmpsb" "repz{%;} cmpsb"
[(set_attr "type" "str") [(set_attr "type" "str")
(set_attr "mode" "QI") (set_attr "mode" "QI")
(set_attr "prefix_rex" "0") (set (attr "prefix_rex")
(if_then_else
(ne (symbol_ref "<P:MODE>mode == DImode") (const_int 0))
(const_string "0")
(const_string "*")))
(set_attr "prefix_rep" "1")]) (set_attr "prefix_rep" "1")])
;; The same, but the count is not known to not be zero. ;; The same, but the count is not known to not be zero.
...@@ -15868,59 +15688,33 @@ ...@@ -15868,59 +15688,33 @@
(define_insn "*cmpstrnqi_1" (define_insn "*cmpstrnqi_1"
[(set (reg:CC FLAGS_REG) [(set (reg:CC FLAGS_REG)
(if_then_else:CC (ne (match_operand:SI 6 "register_operand" "2") (if_then_else:CC (ne (match_operand:P 6 "register_operand" "2")
(const_int 0))
(compare:CC (mem:BLK (match_operand:SI 4 "register_operand" "0"))
(mem:BLK (match_operand:SI 5 "register_operand" "1")))
(const_int 0)))
(use (match_operand:SI 3 "immediate_operand" "i"))
(use (reg:CC FLAGS_REG))
(clobber (match_operand:SI 0 "register_operand" "=S"))
(clobber (match_operand:SI 1 "register_operand" "=D"))
(clobber (match_operand:SI 2 "register_operand" "=c"))]
"!TARGET_64BIT"
"repz{%;} cmpsb"
[(set_attr "type" "str")
(set_attr "mode" "QI")
(set_attr "prefix_rep" "1")])
(define_insn "*cmpstrnqi_rex_1"
[(set (reg:CC FLAGS_REG)
(if_then_else:CC (ne (match_operand:DI 6 "register_operand" "2")
(const_int 0)) (const_int 0))
(compare:CC (mem:BLK (match_operand:DI 4 "register_operand" "0")) (compare:CC (mem:BLK (match_operand:P 4 "register_operand" "0"))
(mem:BLK (match_operand:DI 5 "register_operand" "1"))) (mem:BLK (match_operand:P 5 "register_operand" "1")))
(const_int 0))) (const_int 0)))
(use (match_operand:SI 3 "immediate_operand" "i")) (use (match_operand:SI 3 "immediate_operand" "i"))
(use (reg:CC FLAGS_REG)) (use (reg:CC FLAGS_REG))
(clobber (match_operand:DI 0 "register_operand" "=S")) (clobber (match_operand:P 0 "register_operand" "=S"))
(clobber (match_operand:DI 1 "register_operand" "=D")) (clobber (match_operand:P 1 "register_operand" "=D"))
(clobber (match_operand:DI 2 "register_operand" "=c"))] (clobber (match_operand:P 2 "register_operand" "=c"))]
"TARGET_64BIT" ""
"repz{%;} cmpsb" "repz{%;} cmpsb"
[(set_attr "type" "str") [(set_attr "type" "str")
(set_attr "mode" "QI") (set_attr "mode" "QI")
(set_attr "prefix_rex" "0") (set (attr "prefix_rex")
(if_then_else
(ne (symbol_ref "<P:MODE>mode == DImode") (const_int 0))
(const_string "0")
(const_string "*")))
(set_attr "prefix_rep" "1")]) (set_attr "prefix_rep" "1")])
(define_expand "strlensi" (define_expand "strlen<mode>"
[(set (match_operand:SI 0 "register_operand" "") [(set (match_operand:SWI48x 0 "register_operand" "")
(unspec:SI [(match_operand:BLK 1 "general_operand" "") (unspec:SWI48x [(match_operand:BLK 1 "general_operand" "")
(match_operand:QI 2 "immediate_operand" "") (match_operand:QI 2 "immediate_operand" "")
(match_operand 3 "immediate_operand" "")] UNSPEC_SCAS))] (match_operand 3 "immediate_operand" "")]
"" UNSPEC_SCAS))]
{
if (ix86_expand_strlen (operands[0], operands[1], operands[2], operands[3]))
DONE;
else
FAIL;
})
(define_expand "strlendi"
[(set (match_operand:DI 0 "register_operand" "")
(unspec:DI [(match_operand:BLK 1 "general_operand" "")
(match_operand:QI 2 "immediate_operand" "")
(match_operand 3 "immediate_operand" "")] UNSPEC_SCAS))]
"" ""
{ {
if (ix86_expand_strlen (operands[0], operands[1], operands[2], operands[3])) if (ix86_expand_strlen (operands[0], operands[1], operands[2], operands[3]))
...@@ -15930,39 +15724,30 @@ ...@@ -15930,39 +15724,30 @@
}) })
(define_expand "strlenqi_1" (define_expand "strlenqi_1"
[(parallel [(set (match_operand 0 "register_operand" "") (match_operand 2 "" "")) [(parallel [(set (match_operand 0 "register_operand" "")
(match_operand 2 "" ""))
(clobber (match_operand 1 "register_operand" "")) (clobber (match_operand 1 "register_operand" ""))
(clobber (reg:CC FLAGS_REG))])] (clobber (reg:CC FLAGS_REG))])]
"" ""
"ix86_current_function_needs_cld = 1;") "ix86_current_function_needs_cld = 1;")
(define_insn "*strlenqi_1" (define_insn "*strlenqi_1"
[(set (match_operand:SI 0 "register_operand" "=&c") [(set (match_operand:P 0 "register_operand" "=&c")
(unspec:SI [(mem:BLK (match_operand:SI 5 "register_operand" "1")) (unspec:P [(mem:BLK (match_operand:P 5 "register_operand" "1"))
(match_operand:QI 2 "register_operand" "a") (match_operand:QI 2 "register_operand" "a")
(match_operand:SI 3 "immediate_operand" "i") (match_operand:P 3 "immediate_operand" "i")
(match_operand:SI 4 "register_operand" "0")] UNSPEC_SCAS)) (match_operand:P 4 "register_operand" "0")] UNSPEC_SCAS))
(clobber (match_operand:SI 1 "register_operand" "=D")) (clobber (match_operand:P 1 "register_operand" "=D"))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"!TARGET_64BIT" ""
"repnz{%;} scasb"
[(set_attr "type" "str")
(set_attr "mode" "QI")
(set_attr "prefix_rep" "1")])
(define_insn "*strlenqi_rex_1"
[(set (match_operand:DI 0 "register_operand" "=&c")
(unspec:DI [(mem:BLK (match_operand:DI 5 "register_operand" "1"))
(match_operand:QI 2 "register_operand" "a")
(match_operand:DI 3 "immediate_operand" "i")
(match_operand:DI 4 "register_operand" "0")] UNSPEC_SCAS))
(clobber (match_operand:DI 1 "register_operand" "=D"))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT"
"repnz{%;} scasb" "repnz{%;} scasb"
[(set_attr "type" "str") [(set_attr "type" "str")
(set_attr "mode" "QI") (set_attr "mode" "QI")
(set_attr "prefix_rex" "0") (set (attr "prefix_rex")
(if_then_else
(ne (symbol_ref "<P:MODE>mode == DImode") (const_int 0))
(const_string "0")
(const_string "*")))
(set_attr "prefix_rep" "1")]) (set_attr "prefix_rep" "1")])
;; Peephole optimizations to clean up after cmpstrn*. This should be ;; Peephole optimizations to clean up after cmpstrn*. This should be
......
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