rs6000: Enforce quad_address_p in TImode atomic_load/store (PR80382)

Whatever expand expands to should be valid instructions.  The defined
instructions here have a quad_memory_operand predicate, which boils
down to quad_address_p on the address, so let's test for that instead
of only disallowing indexed addresses.


	* config/rs6000/sync.md (atomic_load<mode>, atomic_store<mode): Test
	for quad_address_p for TImode, instead of just not indexed_address.

From-SVN: r246867

gcc/ChangeLog

+2017-04-12  Segher Boessenkool  <segher@kernel.crashing.org>
+
+	* config/rs6000/sync.md (atomic_load<mode>, atomic_store<mode): Test
+	for quad_address_p for TImode, instead of just not indexed_address.
+
 2017-04-12  Richard Biener  <rguenther@suse.de>
 	Bernd Edlinger  <bernd.edlinger@hotmail.de>
 

gcc/config/rs6000/sync.md

@@ -157,8 +157,7 @@
       rtx op1 = operands[1];
       rtx pti_reg = gen_reg_rtx (PTImode);
 
-      // Can't have indexed address for 'lq'
-      if (indexed_address (XEXP (op1, 0), TImode))
+      if (!quad_address_p (XEXP (op1, 0), TImode, false))
 	{
 	  rtx old_addr = XEXP (op1, 0);
 	  rtx new_addr = force_reg (Pmode, old_addr);
@@ -231,8 +230,7 @@
       rtx op1 = operands[1];
       rtx pti_reg = gen_reg_rtx (PTImode);
 
-      // Can't have indexed address for 'stq'
-      if (indexed_address (XEXP (op0, 0), TImode))
+      if (!quad_address_p (XEXP (op0, 0), TImode, false))
 	{
 	  rtx old_addr = XEXP (op0, 0);
 	  rtx new_addr = force_reg (Pmode, old_addr);