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Commit ba45a613 by Segher Boessenkool Committed by Segher Boessenkool
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re PR target/51274 (Starting with GCC 4.5, powerpc generated different code for x != 0.) 

gcc/
	PR target/51274
	PR target/53087
	* config/rs6000/rs6000.md (ne0si): Remove unnecessary
	earlyclobber.  Merge with...
	(ne0di): ... to...
	(ne0_<mode>): New.
	(plus_ne0si): Merge with...
	(plus_ne0di): ... to...
	(plus_ne0_<mode>): New.
	(compare_plus_ne0si): Merge with...
	(compare_plus_ne0di)... to...
	(compare_plus_ne0_<mode>): New.
	(compare_plus_ne0_<mode>_1): New.
	(plus_ne0si_compare): Merge with...
	(plus_ne0di_compare)... to...
	(plus_ne0_<mode>_compare): New.

gcc/testsuite/
	PR target/51274
	PR target/53087
	* gcc.target/powerpc/ppc-ne0-1.c: New.

From-SVN: r191752
parent eecd0850
Showing with 126 additions and 141 deletions
gcc/ChangeLog
2012-09-25 Segher Boessenkool <segher@kernel.crashing.org>
PR target/51274
PR target/53087
* config/rs6000/rs6000.md (ne0si): Remove unnecessary
earlyclobber. Merge with...
(ne0di): ... to...
(ne0_<mode>): New.
(plus_ne0si): Merge with...
(plus_ne0di): ... to...
(plus_ne0_<mode>): New.
(compare_plus_ne0si): Merge with...
(compare_plus_ne0di)... to...
(compare_plus_ne0_<mode>): New.
(compare_plus_ne0_<mode>_1): New.
(plus_ne0si_compare): Merge with...
(plus_ne0di_compare)... to...
(plus_ne0_<mode>_compare): New.
2012-09-25 Oleg Endo <olegendo@gcc.gnu.org> 2012-09-25 Oleg Endo <olegendo@gcc.gnu.org>
PR target/54089 PR target/54089
......
gcc/config/rs6000/rs6000.md
...@@ -11970,64 +11970,36 @@ ...@@ -11970,64 +11970,36 @@
operands[3] = operands[1]; operands[3] = operands[1];
}) })
;; Simplify (ne X (const_int 0)) on the PowerPC. No need to on the Power, (define_insn "*ne0_<mode>"
;; since it nabs/sr is just as fast. [(set (match_operand:P 0 "gpc_reg_operand" "=r")
(define_insn "*ne0si" (ne:P (match_operand:P 1 "gpc_reg_operand" "r")
[(set (match_operand:SI 0 "gpc_reg_operand" "=&r") (const_int 0)))
(lshiftrt:SI (neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r"))) (clobber (match_scratch:P 2 "=&r"))]
(const_int 31))) "!(TARGET_32BIT && TARGET_ISEL)"
(clobber (match_scratch:SI 2 "=&r"))]
"TARGET_32BIT && !TARGET_ISEL"
"addic %2,%1,-1\;subfe %0,%2,%1"
[(set_attr "type" "two")
(set_attr "length" "8")])
(define_insn "*ne0di"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
(lshiftrt:DI (neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r")))
(const_int 63)))
(clobber (match_scratch:DI 2 "=&r"))]
"TARGET_64BIT"
"addic %2,%1,-1\;subfe %0,%2,%1" "addic %2,%1,-1\;subfe %0,%2,%1"
[(set_attr "type" "two") [(set_attr "type" "two")
(set_attr "length" "8")]) (set_attr "length" "8")])
;; This is what (plus (ne X (const_int 0)) Y) looks like. (define_insn "*plus_ne0_<mode>"
(define_insn "*plus_ne0si" [(set (match_operand:P 0 "gpc_reg_operand" "=r")
[(set (match_operand:SI 0 "gpc_reg_operand" "=r") (plus:P (ne:P (match_operand:P 1 "gpc_reg_operand" "r")
(plus:SI (lshiftrt:SI (const_int 0))
(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r"))) (match_operand:P 2 "gpc_reg_operand" "r")))
(const_int 31)) (clobber (match_scratch:P 3 "=&r"))]
(match_operand:SI 2 "gpc_reg_operand" "r"))) ""
(clobber (match_scratch:SI 3 "=&r"))]
"TARGET_32BIT"
"addic %3,%1,-1\;addze %0,%2"
[(set_attr "type" "two")
(set_attr "length" "8")])
(define_insn "*plus_ne0di"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
(plus:DI (lshiftrt:DI
(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r")))
(const_int 63))
(match_operand:DI 2 "gpc_reg_operand" "r")))
(clobber (match_scratch:DI 3 "=&r"))]
"TARGET_64BIT"
"addic %3,%1,-1\;addze %0,%2" "addic %3,%1,-1\;addze %0,%2"
[(set_attr "type" "two") [(set_attr "type" "two")
(set_attr "length" "8")]) (set_attr "length" "8")])
(define_insn "*compare_plus_ne0si" (define_insn "*compare_plus_ne0_<mode>"
[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y") [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
(compare:CC (compare:CC (plus:P (ne:P (match_operand:P 1 "gpc_reg_operand" "r,r")
(plus:SI (lshiftrt:SI (const_int 0))
(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r,r"))) (match_operand:P 2 "gpc_reg_operand" "r,r"))
(const_int 31))
(match_operand:SI 2 "gpc_reg_operand" "r,r"))
(const_int 0))) (const_int 0)))
(clobber (match_scratch:SI 3 "=&r,&r")) (clobber (match_scratch:P 3 "=&r,&r"))
(clobber (match_scratch:SI 4 "=X,&r"))] (clobber (match_scratch:P 4 "=X,&r"))]
"TARGET_32BIT" ""
"@ "@
addic %3,%1,-1\;addze. %3,%2 addic %3,%1,-1\;addze. %3,%2
#" #"
...@@ -12035,19 +12007,16 @@ ...@@ -12035,19 +12007,16 @@
(set_attr "length" "8,12")]) (set_attr "length" "8,12")])
(define_split (define_split
[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "") [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")
(compare:CC (compare:CC (ne:P (match_operand:SI 1 "gpc_reg_operand" "r,r")
(plus:SI (lshiftrt:SI (const_int 0))
(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" ""))) (neg:P (match_operand:P 2 "gpc_reg_operand" "r,r"))))
(const_int 31)) (clobber (match_scratch:P 3 ""))
(match_operand:SI 2 "gpc_reg_operand" "")) (clobber (match_scratch:P 4 ""))]
(const_int 0))) "reload_completed"
(clobber (match_scratch:SI 3 ""))
(clobber (match_scratch:SI 4 ""))]
"TARGET_32BIT && reload_completed"
[(parallel [(set (match_dup 3) [(parallel [(set (match_dup 3)
(plus:SI (lshiftrt:SI (neg:SI (abs:SI (match_dup 1))) (plus:P (ne:P (match_dup 1)
(const_int 31)) (const_int 0))
(match_dup 2))) (match_dup 2)))
(clobber (match_dup 4))]) (clobber (match_dup 4))])
(set (match_dup 0) (set (match_dup 0)
...@@ -12055,16 +12024,15 @@ ...@@ -12055,16 +12024,15 @@
(const_int 0)))] (const_int 0)))]
"") "")
(define_insn "*compare_plus_ne0di" ; For combine.
[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y") (define_insn "*compare_plus_ne0_<mode>_1"
(compare:CC [(set (match_operand:CCEQ 0 "cc_reg_operand" "=x,?y")
(plus:DI (lshiftrt:DI (compare:CCEQ (ne:P (match_operand:P 1 "gpc_reg_operand" "r,r")
(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,r"))) (const_int 0))
(const_int 63)) (neg:P (match_operand:P 2 "gpc_reg_operand" "r,r"))))
(match_operand:DI 2 "gpc_reg_operand" "r,r")) (clobber (match_scratch:P 3 "=&r,&r"))
(const_int 0))) (clobber (match_scratch:P 4 "=X,&r"))]
(clobber (match_scratch:DI 3 "=&r,&r"))] ""
"TARGET_64BIT"
"@ "@
addic %3,%1,-1\;addze. %3,%2 addic %3,%1,-1\;addze. %3,%2
#" #"
...@@ -12072,78 +12040,36 @@ ...@@ -12072,78 +12040,36 @@
(set_attr "length" "8,12")]) (set_attr "length" "8,12")])
(define_split (define_split
[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "") [(set (match_operand:CCEQ 0 "cc_reg_not_micro_cr0_operand" "")
(compare:CC (compare:CCEQ (ne:P (match_operand:SI 1 "gpc_reg_operand" "r,r")
(plus:DI (lshiftrt:DI (const_int 0))
(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" ""))) (neg:P (match_operand:P 2 "gpc_reg_operand" "r,r"))))
(const_int 63)) (clobber (match_scratch:P 3 ""))
(match_operand:DI 2 "gpc_reg_operand" "")) (clobber (match_scratch:P 4 ""))]
(const_int 0))) "reload_completed"
(clobber (match_scratch:DI 3 ""))] [(parallel [(set (match_dup 3)
"TARGET_64BIT && reload_completed" (plus:P (ne:P (match_dup 1)
[(set (match_dup 3) (const_int 0))
(plus:DI (lshiftrt:DI (neg:DI (abs:DI (match_dup 1)))
(const_int 63))
(match_dup 2))) (match_dup 2)))
(clobber (match_dup 4))])
(set (match_dup 0) (set (match_dup 0)
(compare:CC (match_dup 3) (compare:CC (match_dup 3)
(const_int 0)))] (const_int 0)))]
"") "")
(define_insn "*plus_ne0si_compare" (define_insn "*plus_ne0_<mode>_compare"
[(set (match_operand:CC 4 "cc_reg_operand" "=x,?y")
(compare:CC
(plus:SI (lshiftrt:SI
(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r,r")))
(const_int 31))
(match_operand:SI 2 "gpc_reg_operand" "r,r"))
(const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
(plus:SI (lshiftrt:SI (neg:SI (abs:SI (match_dup 1))) (const_int 31))
(match_dup 2)))
(clobber (match_scratch:SI 3 "=&r,&r"))]
"TARGET_32BIT"
"@
addic %3,%1,-1\;addze. %0,%2
#"
[(set_attr "type" "compare")
(set_attr "length" "8,12")])
(define_split
[(set (match_operand:CC 4 "cc_reg_not_cr0_operand" "")
(compare:CC
(plus:SI (lshiftrt:SI
(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "")))
(const_int 31))
(match_operand:SI 2 "gpc_reg_operand" ""))
(const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "")
(plus:SI (lshiftrt:SI (neg:SI (abs:SI (match_dup 1))) (const_int 31))
(match_dup 2)))
(clobber (match_scratch:SI 3 ""))]
"TARGET_32BIT && reload_completed"
[(parallel [(set (match_dup 0)
(plus:SI (lshiftrt:SI (neg:SI (abs:SI (match_dup 1))) (const_int 31))
(match_dup 2)))
(clobber (match_dup 3))])
(set (match_dup 4)
(compare:CC (match_dup 0)
(const_int 0)))]
"")
(define_insn "*plus_ne0di_compare"
[(set (match_operand:CC 4 "cc_reg_operand" "=x,?y") [(set (match_operand:CC 4 "cc_reg_operand" "=x,?y")
(compare:CC (compare:CC
(plus:DI (lshiftrt:DI (plus:P (ne:P (match_operand:P 1 "gpc_reg_operand" "r,r")
(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,r"))) (const_int 0))
(const_int 63)) (match_operand:P 2 "gpc_reg_operand" "r,r"))
(match_operand:DI 2 "gpc_reg_operand" "r,r"))
(const_int 0))) (const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "=r,r") (set (match_operand:P 0 "gpc_reg_operand" "=r,r")
(plus:DI (lshiftrt:DI (neg:DI (abs:DI (match_dup 1))) (const_int 63)) (plus:P (ne:P (match_dup 1)
(const_int 0))
(match_dup 2))) (match_dup 2)))
(clobber (match_scratch:DI 3 "=&r,&r"))] (clobber (match_scratch:P 3 "=&r,&r"))]
"TARGET_64BIT" ""
"@ "@
addic %3,%1,-1\;addze. %0,%2 addic %3,%1,-1\;addze. %0,%2
#" #"
...@@ -12153,18 +12079,19 @@ ...@@ -12153,18 +12079,19 @@
(define_split (define_split
[(set (match_operand:CC 4 "cc_reg_not_micro_cr0_operand" "") [(set (match_operand:CC 4 "cc_reg_not_micro_cr0_operand" "")
(compare:CC (compare:CC
(plus:DI (lshiftrt:DI (plus:P (ne:P (match_operand:P 1 "gpc_reg_operand" "")
(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" ""))) (const_int 0))
(const_int 63)) (match_operand:P 2 "gpc_reg_operand" ""))
(match_operand:DI 2 "gpc_reg_operand" ""))
(const_int 0))) (const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "") (set (match_operand:P 0 "gpc_reg_operand" "")
(plus:DI (lshiftrt:DI (neg:DI (abs:DI (match_dup 1))) (const_int 63)) (plus:P (ne:P (match_dup 1)
(const_int 0))
(match_dup 2))) (match_dup 2)))
(clobber (match_scratch:DI 3 ""))] (clobber (match_scratch:P 3 ""))]
"TARGET_64BIT && reload_completed" "reload_completed"
[(parallel [(set (match_dup 0) [(parallel [(set (match_dup 0)
(plus:DI (lshiftrt:DI (neg:DI (abs:DI (match_dup 1))) (const_int 63)) (plus:P (ne:P (match_dup 1)
(const_int 0))
(match_dup 2))) (match_dup 2)))
(clobber (match_dup 3))]) (clobber (match_dup 3))])
(set (match_dup 4) (set (match_dup 4)
......
gcc/testsuite/ChangeLog
2012-09-25 Segher Boessenkool <segher@kernel.crashing.org>
PR target/51274
PR target/53087
* gcc.target/powerpc/ppc-ne0-1.c: New.
2012-09-25 Oleg Endo <olegendo@gcc.gnu.org> 2012-09-25 Oleg Endo <olegendo@gcc.gnu.org>
PR target/54089 PR target/54089
......
gcc/testsuite/gcc.target/powerpc/ppc-ne0-1.c 0 → 100644
/* PR target/51274 */
/* { dg-do compile } */
/* { dg-options "-O2 -mno-isel" } */
/* { dg-final { scan-assembler-times "addic" 4 } } */
/* { dg-final { scan-assembler-times "subfe" 1 } } */
/* { dg-final { scan-assembler-times "addze" 3 } } */
long ne0(long a)
{
return a != 0;
}
long plus_ne0(long a, long b)
{
return (a != 0) + b;
}
void dummy(void);
void cmp_plus_ne0(long a, long b)
{
if ((a != 0) + b)
dummy();
}
long plus_ne0_cmp(long a, long b)
{
a = (a != 0) + b;
if (a)
dummy();
return a;
}
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