[ARM] Remove duplicated enum type for CPU identifiers

	* arm.h (target_cpus): Delete.
	* arm-opts.h (enum processor_type): Prefix entires with TARGET_CPU_.
	* arm.c (all_cores): Prefix IDENT with TARGET_CPU_.
	(all_architectures): Likewise.
	(arm_option_override): Adjust use of CPU enums.
	(arm_sched_reorder): Likewise.
	* vfp.md (movdi_vfp, movdi_vfp_cortexa8): Likewise.
	* arm.opt (mcpu, mtune): Adjust use of CPU enums.
	* arm/genopt.sh (processor_type): Prefix enumeration entries with
	TARGET_CPU_.
	* arm-tables.opt: Regenerated.

From-SVN: r242034

gcc/ChangeLog

+2016-11-10  Richard Earnshaw  <rearnsha@arm.com>
+
+	* arm.h (target_cpus): Delete.
+	* arm-opts.h (enum processor_type): Prefix entires with TARGET_CPU_.
+	* arm.c (all_cores): Prefix IDENT with TARGET_CPU_.
+	(all_architectures): Likewise.
+	(arm_option_override): Adjust use of CPU enums.
+	(arm_sched_reorder): Likewise.
+	* vfp.md (movdi_vfp, movdi_vfp_cortexa8): Likewise.
+	* arm.opt (mcpu, mtune): Adjust use of CPU enums.
+	* arm/genopt.sh (processor_type): Prefix enumeration entries with
+	TARGET_CPU_.
+	* arm-tables.opt: Regenerated.
+
 2016-11-10  Siddhesh Poyarekar  <siddhesh.poyarekar@linaro.org>
 
 	* config/aarch64/aarch64-cores.def (qdf24xx): Update part

gcc/config/arm/arm-opts.h

@@ -30,11 +30,11 @@ enum processor_type
 {
 #undef ARM_CORE
 #define ARM_CORE(NAME, INTERNAL_IDENT, IDENT, ARCH, FLAGS, COSTS) \
-  INTERNAL_IDENT,
+  TARGET_CPU_##INTERNAL_IDENT,
 #include "arm-cores.def"
 #undef ARM_CORE
   /* Used to indicate that no processor has been specified.  */
-  arm_none
+  TARGET_CPU_arm_none
 };
 
 /* Which __fp16 format to use.

gcc/config/arm/arm.c

@@ -754,7 +754,7 @@ extern FILE * asm_out_file;
 int making_const_table;
 
 /* The processor for which instructions should be scheduled.  */
-enum processor_type arm_tune = arm_none;
+enum processor_type arm_tune = TARGET_CPU_arm_none;
 
 /* The current tuning set.  */
 const struct tune_params *current_tune;
@@ -2272,11 +2272,11 @@ static const struct processors all_cores[] =
 {
   /* ARM Cores */
 #define ARM_CORE(NAME, X, IDENT, ARCH, FLAGS, COSTS) \
-  {NAME, IDENT, #ARCH, BASE_ARCH_##ARCH,	  \
+  {NAME, TARGET_CPU_##IDENT, #ARCH, BASE_ARCH_##ARCH,	  \
    FLAGS, &arm_##COSTS##_tune},
 #include "arm-cores.def"
 #undef ARM_CORE
-  {NULL, arm_none, NULL, BASE_ARCH_0, ARM_FSET_EMPTY, NULL}
+  {NULL, TARGET_CPU_arm_none, NULL, BASE_ARCH_0, ARM_FSET_EMPTY, NULL}
 };
 
 static const struct processors all_architectures[] =
@@ -2286,10 +2286,10 @@ static const struct processors all_architectures[] =
      from the core.  */
 
 #define ARM_ARCH(NAME, CORE, ARCH, FLAGS) \
-  {NAME, CORE, #ARCH, BASE_ARCH_##ARCH, FLAGS, NULL},
+  {NAME, TARGET_CPU_##CORE, #ARCH, BASE_ARCH_##ARCH, FLAGS, NULL},
 #include "arm-arches.def"
 #undef ARM_ARCH
-  {NULL, arm_none, NULL, BASE_ARCH_0, ARM_FSET_EMPTY, NULL}
+  {NULL, TARGET_CPU_arm_none, NULL, BASE_ARCH_0, ARM_FSET_EMPTY, NULL}
 };
 
 
@@ -3219,7 +3219,7 @@ arm_option_override (void)
   arm_arch_thumb_hwdiv = ARM_FSET_HAS_CPU1 (insn_flags, FL_THUMB_DIV);
   arm_arch_arm_hwdiv = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARM_DIV);
   arm_arch_no_volatile_ce = ARM_FSET_HAS_CPU1 (insn_flags, FL_NO_VOLATILE_CE);
-  arm_tune_cortex_a9 = (arm_tune == cortexa9) != 0;
+  arm_tune_cortex_a9 = (arm_tune == TARGET_CPU_cortexa9) != 0;
   arm_arch_crc = ARM_FSET_HAS_CPU1 (insn_flags, FL_CRC32);
   arm_m_profile_small_mul = ARM_FSET_HAS_CPU1 (insn_flags, FL_SMALLMUL);
   arm_fp16_inst = ARM_FSET_HAS_CPU2 (insn_flags, FL2_FP16INST);
@@ -3387,7 +3387,7 @@ arm_option_override (void)
   /* Enable -mfix-cortex-m3-ldrd by default for Cortex-M3 cores.  */
   if (fix_cm3_ldrd == 2)
     {
-      if (arm_selected_cpu->core == cortexm3)
+      if (arm_selected_cpu->core == TARGET_CPU_cortexm3)
 	fix_cm3_ldrd = 1;
       else
 	fix_cm3_ldrd = 0;
@@ -10948,7 +10948,7 @@ arm_sched_reorder (FILE *file, int verbose, rtx_insn **ready, int *n_readyp,
 {
   switch (arm_tune)
     {
-    case cortexa7:
+    case TARGET_CPU_cortexa7:
       cortexa7_sched_reorder (file, verbose, ready, n_readyp, clock);
       break;
     default:

gcc/config/arm/arm.h

@@ -49,16 +49,6 @@ extern char arm_arch_name[];
 
 #include "config/arm/arm-opts.h"
 
-enum target_cpus
-{
-#define ARM_CORE(NAME, INTERNAL_IDENT, IDENT, ARCH, FLAGS, COSTS) \
-  TARGET_CPU_##INTERNAL_IDENT,
-#include "arm-cores.def"
-#undef ARM_CORE
-  /* Total number of CPUs we handle.  */
-  TARGET_CPU_num_cores
-};
-
 /* The processor for which instructions should be scheduled.  */
 extern enum processor_type arm_tune;
 

gcc/config/arm/arm.opt

@@ -102,7 +102,7 @@ Target Report Mask(CALLER_INTERWORKING)
 Thumb: Assume function pointers may go to non-Thumb aware code.
 
 mcpu=
-Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_cpu_option) Init(arm_none)
+Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_cpu_option) Init(TARGET_CPU_arm_none)
 Specify the name of the target CPU.
 
 mfloat-abi=
@@ -223,7 +223,7 @@ Target Report Mask(TPCS_LEAF_FRAME)
 Thumb: Generate (leaf) stack frames even if not needed.
 
 mtune=
-Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_tune_option) Init(arm_none)
+Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_tune_option) Init(TARGET_CPU_arm_none)
 Tune code for the given processor.
 
 mprint-tune-info

gcc/config/arm/genopt.sh

@@ -52,7 +52,7 @@ awk -F'[(, 	]+' '/^ARM_CORE/ {
     enum = $3
     gsub("\"", "", name)
     print "EnumValue"
-    print "Enum(processor_type) String(" name ") Value(" enum ")"
+    print "Enum(processor_type) String(" name ") Value( TARGET_CPU_" enum ")"
     print ""
 }' $1/arm-cores.def
 

gcc/config/arm/vfp.md

@@ -306,7 +306,7 @@
 (define_insn "*movdi_vfp"
   [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,q,q,m,w,r,w,w, Uv")
        (match_operand:DI 1 "di_operand"              "r,rDa,Db,Dc,mi,mi,q,r,w,w,Uvi,w"))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && arm_tune != cortexa8
+  "TARGET_32BIT && TARGET_HARD_FLOAT && arm_tune != TARGET_CPU_cortexa8
    && (   register_operand (operands[0], DImode)
        || register_operand (operands[1], DImode))
    && !(TARGET_NEON && CONST_INT_P (operands[1])
@@ -357,7 +357,7 @@
 (define_insn "*movdi_vfp_cortexa8"
   [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,r,r,m,w,!r,w,w, Uv")
        (match_operand:DI 1 "di_operand"              "r,rDa,Db,Dc,mi,mi,r,r,w,w,Uvi,w"))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && arm_tune == cortexa8
+  "TARGET_32BIT && TARGET_HARD_FLOAT && arm_tune == TARGET_CPU_cortexa8
     && (   register_operand (operands[0], DImode)
         || register_operand (operands[1], DImode))
     && !(TARGET_NEON && CONST_INT_P (operands[1])