target.def (compute_pressure_classes): New target hook.

	* target.def (compute_pressure_classes): New target hook.
	* doc/tm.texi.in: Document it.
	* doc/tm.texi: Regenerate.
	* ira.c (setup_pressure_classes): Call target hook if defined.

From-SVN: r241911

gcc/ChangeLog

+2016-11-07  Pat Haugen  <pthaugen@us.ibm.com>
+
+	* target.def (compute_pressure_classes): New target hook.
+	* doc/tm.texi.in: Document it.
+	* doc/tm.texi: Regenerate.
+	* ira.c (setup_pressure_classes): Call target hook if defined.
+
 2016-11-07  David Malcolm  <dmalcolm@redhat.com>
 
 	* print-rtl.c (rtx_writer::operand_has_default_value_p): New

gcc/doc/tm.texi

@@ -2903,6 +2903,10 @@ This hook defines a class of registers which could be used for spilling  pseudos
 This hook defines the machine mode to use for the boolean result of  conditional store patterns.  The ICODE argument is the instruction code  for the cstore being performed.  Not definiting this hook is the same  as accepting the mode encoded into operand 0 of the cstore expander  patterns.
 @end deftypefn
 
+@deftypefn {Target Hook} int TARGET_COMPUTE_PRESSURE_CLASSES (enum reg_class *@var{pressure_classes})
+A target hook which lets a backend compute the set of pressure classes to  be used by those optimization passes which take register pressure into  account, as opposed to letting IRA compute them.  It returns the number of  register classes stored in the array @var{pressure_classes}.
+@end deftypefn
+
 @node Stack and Calling
 @section Stack Layout and Calling Conventions
 @cindex calling conventions

gcc/doc/tm.texi.in

@@ -2509,6 +2509,8 @@ value that the middle-end intended.
 
 @hook TARGET_CSTORE_MODE
 
+@hook TARGET_COMPUTE_PRESSURE_CLASSES
+
 @node Stack and Calling
 @section Stack Layout and Calling Conventions
 @cindex calling conventions

gcc/ira.c

@@ -792,6 +792,10 @@ setup_pressure_classes (void)
   HARD_REG_SET temp_hard_regset2;
   bool insert_p;
 
+  if (targetm.compute_pressure_classes)
+    n = targetm.compute_pressure_classes (pressure_classes);
+  else
+    { 
       n = 0;
       for (cl = 0; cl < N_REG_CLASSES; cl++)
 	{
@@ -843,7 +847,8 @@ setup_pressure_classes (void)
 	      COPY_HARD_REG_SET (temp_hard_regset2, reg_class_contents[cl2]);
 	      AND_COMPL_HARD_REG_SET (temp_hard_regset2, no_unit_alloc_regs);
 	      if (hard_reg_set_subset_p (temp_hard_regset, temp_hard_regset2)
-	      && (! hard_reg_set_equal_p (temp_hard_regset, temp_hard_regset2)
+		  && (! hard_reg_set_equal_p (temp_hard_regset,
+					      temp_hard_regset2)
 		      || cl2 == (int) GENERAL_REGS))
 		{
 		  pressure_classes[curr++] = (enum reg_class) cl2;
@@ -851,7 +856,8 @@ setup_pressure_classes (void)
 		  continue;
 		}
 	      if (hard_reg_set_subset_p (temp_hard_regset2, temp_hard_regset)
-	      && (! hard_reg_set_equal_p (temp_hard_regset2, temp_hard_regset)
+		  && (! hard_reg_set_equal_p (temp_hard_regset2,
+					      temp_hard_regset)
 		      || cl == (int) GENERAL_REGS))
 		continue;
 	      if (hard_reg_set_equal_p (temp_hard_regset2, temp_hard_regset))
@@ -865,6 +871,7 @@ setup_pressure_classes (void)
 	    pressure_classes[curr++] = (enum reg_class) cl;
 	  n = curr;
 	}
+    }
 #ifdef ENABLE_IRA_CHECKING
   {
     HARD_REG_SET ignore_hard_regs;

gcc/target.def

@@ -5039,6 +5039,16 @@ DEFHOOK
   machine_mode, (enum insn_code icode),
   default_cstore_mode)
 
+/* This target hook allows the backend to compute the register pressure
+   classes to use.  */
+DEFHOOK
+(compute_pressure_classes,
+ "A target hook which lets a backend compute the set of pressure classes to\
+  be used by those optimization passes which take register pressure into\
+  account, as opposed to letting IRA compute them.  It returns the number of\
+  register classes stored in the array @var{pressure_classes}.",
+ int, (enum reg_class *pressure_classes), NULL)
+
 /* True if a structure, union or array with MODE containing FIELD should
    be accessed using BLKmode.  */
 DEFHOOK