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riscv-gcc-1
Commit b10ed555 by Doug Evans
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(movsicc, case NE): Don't generate unrecognizable insn. 

(movdicc, case NE): Likewise.

From-SVN: r9685
parent ba68fc32
Showing with 16 additions and 6 deletions
gcc/config/alpha/alpha.md
...@@ -2234,13 +2234,18 @@ ...@@ -2234,13 +2234,18 @@
" "
{ {
rtx op0,op1; rtx op0,op1;
enum rtx_code code = GET_CODE (operands[1]); enum rtx_code code = GET_CODE (operands[1]), code2 = NE;
if (alpha_compare_fp_p) if (alpha_compare_fp_p)
FAIL; FAIL;
switch (code) switch (code)
{ {
case EQ: case NE: case LE: case LT: case EQ: case LE: case LT:
op0 = alpha_compare_op0;
op1 = alpha_compare_op1;
break;
case NE:
code = code2 = EQ;
op0 = alpha_compare_op0; op0 = alpha_compare_op0;
op1 = alpha_compare_op1; op1 = alpha_compare_op1;
break; break;
...@@ -2259,7 +2264,7 @@ ...@@ -2259,7 +2264,7 @@
} }
operands[1] = gen_rtx (code, DImode, op0, op1); operands[1] = gen_rtx (code, DImode, op0, op1);
operands[4] = gen_reg_rtx (DImode); operands[4] = gen_reg_rtx (DImode);
operands[5] = gen_rtx (NE, VOIDmode, operands[4], CONST0_RTX (DImode)); operands[5] = gen_rtx (code2, VOIDmode, operands[4], CONST0_RTX (DImode));
}") }")
(define_expand "movdicc" (define_expand "movdicc"
...@@ -2272,13 +2277,18 @@ ...@@ -2272,13 +2277,18 @@
" "
{ {
rtx op0,op1; rtx op0,op1;
enum rtx_code code = GET_CODE (operands[1]); enum rtx_code code = GET_CODE (operands[1]), code2 = NE;
if (alpha_compare_fp_p) if (alpha_compare_fp_p)
FAIL; FAIL;
switch (code) switch (code)
{ {
case EQ: case NE: case LE: case LT: case EQ: case LE: case LT:
op0 = alpha_compare_op0;
op1 = alpha_compare_op1;
break;
case NE:
code = code2 = EQ;
op0 = alpha_compare_op0; op0 = alpha_compare_op0;
op1 = alpha_compare_op1; op1 = alpha_compare_op1;
break; break;
...@@ -2297,7 +2307,7 @@ ...@@ -2297,7 +2307,7 @@
} }
operands[1] = gen_rtx (code, DImode, op0, op1); operands[1] = gen_rtx (code, DImode, op0, op1);
operands[4] = gen_reg_rtx (DImode); operands[4] = gen_reg_rtx (DImode);
operands[5] = gen_rtx (NE, VOIDmode, operands[4], CONST0_RTX (DImode)); operands[5] = gen_rtx (code2, VOIDmode, operands[4], CONST0_RTX (DImode));
}") }")
(define_expand "movsfcc" (define_expand "movsfcc"
......
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