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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
b07aafb1
Commit
b07aafb1
authored
Nov 04, 2016
by
Michael Meissner
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Fix wrong patch committed
From-SVN: r241840
parent
5fb80387
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gcc/config/rs6000/rs6000.h
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gcc/config/rs6000/rs6000.h
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b07aafb1
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@@ -450,7 +450,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#define FLOAT128_IBM_P(MODE) \
((!TARGET_IEEEQUAD && ((MODE) == TFmode || (MODE) == TCmode)) \
|| (TARGET_HARD_FLOAT && TARGET_FPRS \
&& ((MODE) == IFmode
) || (
(MODE) == ICmode)))
&& ((MODE) == IFmode
||
(MODE) == ICmode)))
/* Helper macros to say whether a 128-bit floating point type can go in a
single vector register, or whether it needs paired scalar values. */
...
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