Skip to content

R
riscv-gcc-1
Commit af55143f by Jeff Law
Options

m68k.md (adddi_dilshr32): One of the operands must be a register. 

(
        * m68k.md (adddi_dilshr32): One of the operands must be a register.
        (adddi_dishl32): Similarly.

From-SVN: r21739
parent 0af444cc
Showing with 6 additions and 6 deletions
gcc/config/m68k/m68k.md
......@@ -2095,13 +2095,13 @@
} ")
(define_insn "adddi_dilshr32"
[(set (match_operand:DI 0 "general_operand" "=do")
[(set (match_operand:DI 0 "general_operand" "=d,o")
;; (plus:DI (match_operand:DI 2 "general_operand" "%0")
;; (lshiftrt:DI (match_operand:DI 1 "general_operand" "ro")
;; (const_int 32))))]
(plus:DI (lshiftrt:DI (match_operand:DI 1 "general_operand" "ro")
(plus:DI (lshiftrt:DI (match_operand:DI 1 "general_operand" "o,r")
(const_int 32))
(match_operand:DI 2 "general_operand" "0")))]
(match_operand:DI 2 "general_operand" "0,0")))]
""
"*
{
......@@ -2114,13 +2114,13 @@
} ")
(define_insn "adddi_dishl32"
[(set (match_operand:DI 0 "general_operand" "=ro")
[(set (match_operand:DI 0 "general_operand" "=r,o")
;; (plus:DI (match_operand:DI 2 "general_operand" "%0")
;; (ashift:DI (match_operand:DI 1 "general_operand" "ro")
;; (const_int 32))))]
(plus:DI (ashift:DI (match_operand:DI 1 "general_operand" "ro")
(plus:DI (ashift:DI (match_operand:DI 1 "general_operand" "o,r")
(const_int 32))
(match_operand:DI 2 "general_operand" "0")))]
(match_operand:DI 2 "general_operand" "0,0")))]
""
"*
{
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment