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riscv-gcc-1
Commit af530bb4 by Richard Henderson Committed by Richard Henderson
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rx: Remove rx_compare_redundant. 

To be replaced by the generic compare_elim pass, but we need to disable
this before fiddling with the arrangement of the arithmetic instructions,
as required by the generic pass.

From-SVN: r168916
parent 27bf36f3
Showing with 5 additions and 156 deletions
gcc/ChangeLog
2011-01-17 Richard Henderson <rth@redhat.com>
* config/rx/rx.c (rx_compare_redundant): Remove.
* config/rx/rx.md (cmpsi): Don't use it.
* config/rx/rx-protos.h: Update.
* config/rx/rx-modes.def (CC_F): New mode.
* config/rx/rx.c (rx_select_cc_mode): New.
* config/rx/rx.h (SELECT_CC_MODE): Use it.
......
gcc/config/rx/rx-protos.h
......@@ -30,7 +30,6 @@ extern void rx_expand_prologue (void);
extern int rx_initial_elimination_offset (int, int);
#ifdef RTX_CODE
extern bool rx_compare_redundant (rtx);
extern void rx_emit_stack_popm (rtx *, bool);
extern void rx_emit_stack_pushm (rtx *);
extern void rx_expand_epilogue (bool);
......
gcc/config/rx/rx.c
......@@ -2602,155 +2602,6 @@ flags_from_mode (enum machine_mode mode)
}
}
/* Returns true if a compare insn is redundant because it
would only set flags that are already set correctly. */
bool
rx_compare_redundant (rtx cmp)
{
unsigned int flags_needed;
unsigned int flags_set;
rtx next;
rtx prev;
rtx source;
rtx dest;
static rtx cc_reg = NULL_RTX;
if (cc_reg == NULL_RTX)
cc_reg = gen_rtx_REG (CCmode, CC_REGNUM);
/* We can only eliminate compares against 0. */
if (GET_CODE (XEXP (SET_SRC (PATTERN (cmp)), 1)) != CONST_INT
|| INTVAL (XEXP (SET_SRC (PATTERN (cmp)), 1)) != 0)
return false;
/* Locate the branch insn that follows the
compare and which tests the bits in the PSW. */
next = cmp;
do
{
/* If we have found an insn that sets or clobbers the CC
register and it was not the IF_THEN_ELSE insn that we
are looking for, then the comparison is redundant. */
if (next != cmp && reg_mentioned_p (cc_reg, PATTERN (next)))
return true;
next = next_nonnote_insn (next);
/* If we run out of insns without finding the
user then the comparison is unnecessary. */
if (next == NULL_RTX)
return true;
/* If we have found another comparison
insn then the first one is redundant. */
if (INSN_P (next)
&& GET_CODE (PATTERN (next)) == SET
&& REG_P (SET_DEST (PATTERN (next)))
&& REGNO (SET_DEST (PATTERN (next))) == CC_REGNUM)
return true;
/* If we have found another arithmetic/logic insn that
sets the PSW flags then the comparison is redundant. */
if (INSN_P (next)
&& GET_CODE (PATTERN (next)) == PARALLEL
&& GET_CODE (XVECEXP (PATTERN (next), 0, 1)) == SET
&& REG_P (SET_DEST (XVECEXP (PATTERN (next), 0, 1)))
&& REGNO (SET_DEST (XVECEXP (PATTERN (next), 0, 1))) == CC_REGNUM)
return true;
/* If we have found an unconditional branch then the
PSW flags might be carried along with the jump, so
the comparison is necessary. */
if (INSN_P (next) && JUMP_P (next))
{
if (GET_CODE (PATTERN (next)) != SET)
/* If the jump does not involve setting the PC
then it is a return of some kind, and we know
that the comparison is not used. */
return true;
if (GET_CODE (SET_SRC (PATTERN (next))) != IF_THEN_ELSE)
return false;
}
}
while (! INSN_P (next)
|| DEBUG_INSN_P (next)
|| GET_CODE (PATTERN (next)) != SET
|| GET_CODE (SET_SRC (PATTERN (next))) != IF_THEN_ELSE);
flags_needed = flags_needed_for_conditional (XEXP (SET_SRC (PATTERN (next)), 0));
/* Now look to see if there was a previous
instruction which set the PSW bits. */
source = XEXP (SET_SRC (PATTERN (cmp)), 0);
prev = cmp;
do
{
/* If this insn uses/sets/clobbers the CC register
and it is not the insn that we are looking for
below, then we must need the comparison. */
if (prev != cmp && reg_mentioned_p (cc_reg, PATTERN (prev)))
return false;
prev = prev_nonnote_insn (prev);
if (prev == NULL_RTX)
return false;
/* If we encounter an insn which changes the contents of
the register which is the source of the comparison then
we will definitely need the comparison. */
if (INSN_P (prev)
&& GET_CODE (PATTERN (prev)) == SET
&& rtx_equal_p (SET_DEST (PATTERN (prev)), source))
{
/* Unless this instruction is a simple register move
instruction. In which case we can continue our
scan backwards, but now using the *source* of this
set instruction. */
if (REG_P (SET_SRC (PATTERN (prev))))
source = SET_SRC (PATTERN (prev));
/* We can also survive a sign-extension if the test is
for EQ/NE. Note the same does not apply to zero-
extension as this can turn a non-zero bit-pattern
into zero. */
else if (flags_needed == CC_FLAG_Z
&& GET_CODE (SET_SRC (PATTERN (prev))) == SIGN_EXTEND)
source = XEXP (SET_SRC (PATTERN (prev)), 0);
else
return false;
}
/* A label means a possible branch into the
code here, so we have to stop scanning. */
if (LABEL_P (prev))
return false;
}
while (! INSN_P (prev)
|| DEBUG_INSN_P (prev)
|| GET_CODE (PATTERN (prev)) != PARALLEL
|| GET_CODE (XVECEXP (PATTERN (prev), 0, 1)) != SET
|| ! REG_P (SET_DEST (XVECEXP (PATTERN (prev), 0, 1)))
|| REGNO (SET_DEST (XVECEXP (PATTERN (prev), 0, 1))) != CC_REGNUM);
flags_set = flags_from_mode (GET_MODE (SET_DEST (XVECEXP (PATTERN (prev), 0, 1))));
dest = SET_DEST (XVECEXP (PATTERN (prev), 0, 0));
/* The destination of the previous arithmetic/logic instruction
must match the source in the comparison operation. For registers
we ignore the mode as there may have been a sign-extension involved. */
if (! rtx_equal_p (source, dest))
{
if (REG_P (source) && REG_P (dest) && REGNO (dest) == REGNO (source))
;
else
return false;
}
return ((flags_set & flags_needed) == flags_needed);
}
static int
rx_memory_move_cost (enum machine_mode mode, reg_class_t regclass, bool in)
{
......
gcc/config/rx/rx.md
......@@ -340,12 +340,7 @@
(compare:CC (match_operand:SI 0 "register_operand" "r,r,r,r,r,r,r")
(match_operand:SI 1 "rx_source_operand" "r,Uint04,Int08,Sint16,Sint24,i,Q")))]
""
{
rx_float_compare_mode = false;
if (rx_compare_redundant (insn))
return "; Compare Eliminated: cmp %Q1, %0";
return "cmp\t%Q1, %0";
}
"cmp\t%Q1, %0"
[(set_attr "timings" "11,11,11,11,11,11,33")
(set_attr "length" "2,2,3,4,5,6,5")]
)
......
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