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Commit ae9d61ab by John David Anglin Committed by John David Anglin
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re PR target/50617 (ICE: RTL flag check: INSN_ANNULLED_BRANCH_P used with… 

re PR target/50617 (ICE: RTL flag check: INSN_ANNULLED_BRANCH_P used with unexpected rtx code 'simplify_immed_subreg' in output_bb, at config/pa/pa.c:6631)

	PR target/50617
	* config/pa/protos.h (attr_length_save_restore_dltp): Delete.
	(cmpib_comparison_operator): Likewise.
	(following_cal, output_and, output_ior, output_move_double,
	output_fp_move_double, output_block_move, output_block_clear,
	output_cbranch, output_lbranch, output_bb, output_bvb, output_dbra,
	output_movb, output_parallel_movb, output_parallel_addb, output_call,
	output_indirect_call, output_millicode_call, output_mul_insn,
	output_div_insn, output_mod_insn, singlemove_string,
	output_arg_descriptor, output_global_address, print_operand,
	legitimize_pic_address, hppa_encode_label, symbolic_expression_p,
	fmpyaddoperands, fmpysuboperands, emit_bcond_fp, emit_move_sequence,
	emit_hpdiv_const, is_function_label_plus_const, jump_in_call_delay,
	hppa_fpstore_bypass_p, attr_length_millicode_call, attr_length_call,
	attr_length_indirect_call, return_addr_rtx, function_arg_padding,
	insn_refs_are_delayed, get_deferred_plabel, ldil_cint_p, zdepi_cint_p,
	output_ascii, compute_frame_size, and_mask_p, cint_ok_for_move,
	hppa_expand_prologue, hppa_expand_epilogue, ior_mask_p,
	compute_zdepdi_operands, output_64bit_and, output_64bit_ior,
	reloc_needed, magic_milli, shadd_constant_p): Consistently prefix
	exported functions and variables with "pa_".
	* config/pa/predicates.md: Likewise.
	* config/pa/pa64-hpux.h: likewise.
	* config/pa/som.h: Likewise.
	* config/pa/elf.h: Likewise.
	* config/pa/pa64-linux.h: Likewise.
	* config/pa/pa.md: Likewise.
	* config/pa/pa.c: Likewise.
	* config/pa/pa-linux.h: Likewise.
	* config/pa/pa.h: Likewise.
	* config/pa/constraints.md: Likewise.

From-SVN: r180660
parent b99f906a
Showing with 427 additions and 411 deletions
gcc/ChangeLog
2011-10-29 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
PR target/50617
* config/pa/protos.h (attr_length_save_restore_dltp): Delete.
(cmpib_comparison_operator): Likewise.
(following_cal, output_and, output_ior, output_move_double,
output_fp_move_double, output_block_move, output_block_clear,
output_cbranch, output_lbranch, output_bb, output_bvb, output_dbra,
output_movb, output_parallel_movb, output_parallel_addb, output_call,
output_indirect_call, output_millicode_call, output_mul_insn,
output_div_insn, output_mod_insn, singlemove_string,
output_arg_descriptor, output_global_address, print_operand,
legitimize_pic_address, hppa_encode_label, symbolic_expression_p,
fmpyaddoperands, fmpysuboperands, emit_bcond_fp, emit_move_sequence,
emit_hpdiv_const, is_function_label_plus_const, jump_in_call_delay,
hppa_fpstore_bypass_p, attr_length_millicode_call, attr_length_call,
attr_length_indirect_call, return_addr_rtx, function_arg_padding,
insn_refs_are_delayed, get_deferred_plabel, ldil_cint_p, zdepi_cint_p,
output_ascii, compute_frame_size, and_mask_p, cint_ok_for_move,
hppa_expand_prologue, hppa_expand_epilogue, ior_mask_p,
compute_zdepdi_operands, output_64bit_and, output_64bit_ior,
reloc_needed, magic_milli, shadd_constant_p): Consistently prefix
exported functions and variables with "pa_".
* config/pa/predicates.md: Likewise.
* config/pa/pa64-hpux.h: likewise.
* config/pa/som.h: Likewise.
* config/pa/elf.h: Likewise.
* config/pa/pa64-linux.h: Likewise.
* config/pa/pa.md: Likewise.
* config/pa/pa.c: Likewise.
* config/pa/pa-linux.h: Likewise.
* config/pa/pa.h: Likewise.
* config/pa/constraints.md: Likewise.
2011-10-29 Uros Bizjak <ubizjak@gmail.com> 2011-10-29 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (xop_sha<mode>3): Rename from xop_ashl<mode>3. * config/i386/i386.md (xop_sha<mode>3): Rename from xop_ashl<mode>3.
gcc/config/pa/constraints.md
...@@ -55,7 +55,7 @@ ...@@ -55,7 +55,7 @@
(define_constraint "K" (define_constraint "K"
"Integer constant that can be deposited with a zdepi instruction." "Integer constant that can be deposited with a zdepi instruction."
(and (match_code "const_int") (and (match_code "const_int")
(match_test "zdepi_cint_p (ival)"))) (match_test "pa_zdepi_cint_p (ival)")))
(define_constraint "L" (define_constraint "L"
"Signed 5-bit integer constant." "Signed 5-bit integer constant."
...@@ -70,7 +70,7 @@ ...@@ -70,7 +70,7 @@
(define_constraint "N" (define_constraint "N"
"Integer constant that can be loaded with a ldil instruction." "Integer constant that can be loaded with a ldil instruction."
(and (match_code "const_int") (and (match_code "const_int")
(match_test "ldil_cint_p (ival)"))) (match_test "pa_ldil_cint_p (ival)")))
(define_constraint "O" (define_constraint "O"
"Integer constant such that ival+1 is a power of 2." "Integer constant such that ival+1 is a power of 2."
...@@ -81,7 +81,7 @@ ...@@ -81,7 +81,7 @@
"Integer constant that can be used as an and mask in depi and "Integer constant that can be used as an and mask in depi and
extru instructions." extru instructions."
(and (match_code "const_int") (and (match_code "const_int")
(match_test "and_mask_p (ival)"))) (match_test "pa_and_mask_p (ival)")))
(define_constraint "S" (define_constraint "S"
"Integer constant 31." "Integer constant 31."
......
gcc/config/pa/elf.h
...@@ -80,7 +80,7 @@ do { \ ...@@ -80,7 +80,7 @@ do { \
#define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \ #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
do { fputs ("\t.IMPORT ", FILE); \ do { fputs ("\t.IMPORT ", FILE); \
if (!function_label_operand (RTL, VOIDmode)) \ if (!function_label_operand (RTL, VOIDmode)) \
hppa_encode_label (RTL); \ pa_encode_label (RTL); \
assemble_name (FILE, XSTR ((RTL), 0)); \ assemble_name (FILE, XSTR ((RTL), 0)); \
fputs (",ENTRY\n", FILE); \ fputs (",ENTRY\n", FILE); \
} while (0) } while (0)
......
gcc/config/pa/pa-linux.h
...@@ -128,7 +128,7 @@ along with GCC; see the file COPYING3. If not see ...@@ -128,7 +128,7 @@ along with GCC; see the file COPYING3. If not see
do \ do \
{ \ { \
if (!FUNCTION_NAME_P (XSTR (FUN, 0))) \ if (!FUNCTION_NAME_P (XSTR (FUN, 0))) \
hppa_encode_label (FUN); \ pa_encode_label (FUN); \
(*targetm.asm_out.globalize_label) (FILE, XSTR (FUN, 0)); \ (*targetm.asm_out.globalize_label) (FILE, XSTR (FUN, 0)); \
} \ } \
while (0) while (0)
......
gcc/config/pa/pa-protos.h
...@@ -24,89 +24,82 @@ along with GCC; see the file COPYING3. If not see ...@@ -24,89 +24,82 @@ along with GCC; see the file COPYING3. If not see
extern rtx pa_eh_return_handler_rtx (void); extern rtx pa_eh_return_handler_rtx (void);
/* Used in insn-*.c. */ /* Used in insn-*.c. */
extern int following_call (rtx); extern int pa_following_call (rtx);
/* Define functions in pa.c and used in insn-output.c. */ /* Define functions in pa.c and used in insn-output.c. */
extern const char *output_and (rtx *); extern const char *pa_output_and (rtx *);
extern const char *output_ior (rtx *); extern const char *pa_output_64bit_and (rtx *);
extern const char *output_move_double (rtx *); extern const char *pa_output_ior (rtx *);
extern const char *output_fp_move_double (rtx *); extern const char *pa_output_64bit_ior (rtx *);
extern const char *output_block_move (rtx *, int); extern const char *pa_output_move_double (rtx *);
extern const char *output_block_clear (rtx *, int); extern const char *pa_output_fp_move_double (rtx *);
extern const char *output_cbranch (rtx *, int, rtx); extern const char *pa_output_block_move (rtx *, int);
extern const char *output_lbranch (rtx, rtx, int); extern const char *pa_output_block_clear (rtx *, int);
extern const char *output_bb (rtx *, int, rtx, int); extern const char *pa_output_cbranch (rtx *, int, rtx);
extern const char *output_bvb (rtx *, int, rtx, int); extern const char *pa_output_lbranch (rtx, rtx, int);
extern const char *output_dbra (rtx *, rtx, int); extern const char *pa_output_bb (rtx *, int, rtx, int);
extern const char *output_movb (rtx *, rtx, int, int); extern const char *pa_output_bvb (rtx *, int, rtx, int);
extern const char *output_parallel_movb (rtx *, rtx); extern const char *pa_output_dbra (rtx *, rtx, int);
extern const char *output_parallel_addb (rtx *, rtx); extern const char *pa_output_movb (rtx *, rtx, int, int);
extern const char *output_call (rtx, rtx, int); extern const char *pa_output_parallel_movb (rtx *, rtx);
extern const char *output_indirect_call (rtx, rtx); extern const char *pa_output_parallel_addb (rtx *, rtx);
extern const char *output_millicode_call (rtx, rtx); extern const char *pa_output_call (rtx, rtx, int);
extern const char *output_mul_insn (int, rtx); extern const char *pa_output_indirect_call (rtx, rtx);
extern const char *output_div_insn (rtx *, int, rtx); extern const char *pa_output_millicode_call (rtx, rtx);
extern const char *output_mod_insn (int, rtx); extern const char *pa_output_mul_insn (int, rtx);
extern const char *singlemove_string (rtx *); extern const char *pa_output_div_insn (rtx *, int, rtx);
extern void output_arg_descriptor (rtx); extern const char *pa_output_mod_insn (int, rtx);
extern void output_global_address (FILE *, rtx, int); extern const char *pa_singlemove_string (rtx *);
extern void print_operand (FILE *, rtx, int); extern void pa_output_arg_descriptor (rtx);
extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx); extern void pa_output_global_address (FILE *, rtx, int);
extern void hppa_encode_label (rtx); extern void pa_print_operand (FILE *, rtx, int);
extern int symbolic_expression_p (rtx); extern void pa_encode_label (rtx);
extern int pa_symbolic_expression_p (rtx);
extern bool pa_tls_referenced_p (rtx); extern bool pa_tls_referenced_p (rtx);
extern int pa_adjust_insn_length (rtx, int); extern int pa_adjust_insn_length (rtx, int);
extern int fmpyaddoperands (rtx *); extern int pa_fmpyaddoperands (rtx *);
extern int fmpysuboperands (rtx *); extern int pa_fmpysuboperands (rtx *);
extern void emit_bcond_fp (rtx[]); extern void pa_emit_bcond_fp (rtx[]);
extern int emit_move_sequence (rtx *, enum machine_mode, rtx); extern int pa_emit_move_sequence (rtx *, enum machine_mode, rtx);
extern int emit_hpdiv_const (rtx *, int); extern int pa_emit_hpdiv_const (rtx *, int);
extern int is_function_label_plus_const (rtx); extern int pa_is_function_label_plus_const (rtx);
extern int jump_in_call_delay (rtx); extern int pa_jump_in_call_delay (rtx);
extern int hppa_fpstore_bypass_p (rtx, rtx); extern int pa_fpstore_bypass_p (rtx, rtx);
extern int attr_length_millicode_call (rtx); extern int pa_attr_length_millicode_call (rtx);
extern int attr_length_call (rtx, int); extern int pa_attr_length_call (rtx, int);
extern int attr_length_indirect_call (rtx); extern int pa_attr_length_indirect_call (rtx);
extern int attr_length_save_restore_dltp (rtx);
/* Declare functions defined in pa.c and used in templates. */ /* Declare functions defined in pa.c and used in templates. */
extern rtx return_addr_rtx (int, rtx); extern rtx pa_return_addr_rtx (int, rtx);
#ifdef ARGS_SIZE_RTX #ifdef ARGS_SIZE_RTX
/* expr.h defines ARGS_SIZE_RTX and `enum direction' */ /* expr.h defines ARGS_SIZE_RTX and `enum direction' */
#ifdef TREE_CODE #ifdef TREE_CODE
extern enum direction function_arg_padding (enum machine_mode, const_tree); extern enum direction pa_function_arg_padding (enum machine_mode, const_tree);
#endif #endif
#endif /* ARGS_SIZE_RTX */ #endif /* ARGS_SIZE_RTX */
extern int insn_refs_are_delayed (rtx); extern int pa_insn_refs_are_delayed (rtx);
extern rtx get_deferred_plabel (rtx); extern rtx pa_get_deferred_plabel (rtx);
#endif /* RTX_CODE */ #endif /* RTX_CODE */
extern int ldil_cint_p (HOST_WIDE_INT); extern int pa_and_mask_p (unsigned HOST_WIDE_INT);
extern int zdepi_cint_p (unsigned HOST_WIDE_INT); extern int pa_cint_ok_for_move (HOST_WIDE_INT);
extern int pa_ior_mask_p (unsigned HOST_WIDE_INT);
extern void output_ascii (FILE *, const char *, int); extern int pa_ldil_cint_p (HOST_WIDE_INT);
extern HOST_WIDE_INT compute_frame_size (HOST_WIDE_INT, int *); extern int pa_shadd_constant_p (int);
extern int and_mask_p (unsigned HOST_WIDE_INT); extern int pa_zdepi_cint_p (unsigned HOST_WIDE_INT);
extern int cint_ok_for_move (HOST_WIDE_INT);
extern void hppa_expand_prologue (void); extern void pa_output_ascii (FILE *, const char *, int);
extern void hppa_expand_epilogue (void); extern HOST_WIDE_INT pa_compute_frame_size (HOST_WIDE_INT, int *);
extern void pa_expand_prologue (void);
extern void pa_expand_epilogue (void);
extern bool pa_can_use_return_insn (void); extern bool pa_can_use_return_insn (void);
extern int ior_mask_p (unsigned HOST_WIDE_INT);
extern void compute_zdepdi_operands (unsigned HOST_WIDE_INT,
unsigned *);
#ifdef RTX_CODE
extern const char * output_64bit_and (rtx *);
extern const char * output_64bit_ior (rtx *);
extern int cmpib_comparison_operator (rtx, enum machine_mode);
#endif
/* Miscellaneous functions in pa.c. */ /* Miscellaneous functions in pa.c. */
#ifdef TREE_CODE #ifdef TREE_CODE
extern int reloc_needed (tree); extern int pa_reloc_needed (tree);
extern bool pa_return_in_memory (const_tree, const_tree); extern bool pa_return_in_memory (const_tree, const_tree);
#endif /* TREE_CODE */ #endif /* TREE_CODE */
...@@ -125,5 +118,4 @@ extern bool pa_cannot_change_mode_class (enum machine_mode, enum machine_mode, ...@@ -125,5 +118,4 @@ extern bool pa_cannot_change_mode_class (enum machine_mode, enum machine_mode,
extern bool pa_modes_tieable_p (enum machine_mode, enum machine_mode); extern bool pa_modes_tieable_p (enum machine_mode, enum machine_mode);
extern HOST_WIDE_INT pa_initial_elimination_offset (int, int); extern HOST_WIDE_INT pa_initial_elimination_offset (int, int);
extern const int magic_milli[]; extern const int pa_magic_milli[];
extern int shadd_constant_p (int);
gcc/config/pa/pa.c
...@@ -54,7 +54,7 @@ along with GCC; see the file COPYING3. If not see ...@@ -54,7 +54,7 @@ along with GCC; see the file COPYING3. If not see
/* Return nonzero if there is a bypass for the output of /* Return nonzero if there is a bypass for the output of
OUT_INSN and the fp store IN_INSN. */ OUT_INSN and the fp store IN_INSN. */
int int
hppa_fpstore_bypass_p (rtx out_insn, rtx in_insn) pa_fpstore_bypass_p (rtx out_insn, rtx in_insn)
{ {
enum machine_mode store_mode; enum machine_mode store_mode;
enum machine_mode other_mode; enum machine_mode other_mode;
...@@ -99,6 +99,7 @@ static void pa_combine_instructions (void); ...@@ -99,6 +99,7 @@ static void pa_combine_instructions (void);
static int pa_can_combine_p (rtx, rtx, rtx, int, rtx, rtx, rtx); static int pa_can_combine_p (rtx, rtx, rtx, int, rtx, rtx, rtx);
static bool forward_branch_p (rtx); static bool forward_branch_p (rtx);
static void compute_zdepwi_operands (unsigned HOST_WIDE_INT, unsigned *); static void compute_zdepwi_operands (unsigned HOST_WIDE_INT, unsigned *);
static void compute_zdepdi_operands (unsigned HOST_WIDE_INT, unsigned *);
static int compute_movmem_length (rtx); static int compute_movmem_length (rtx);
static int compute_clrmem_length (rtx); static int compute_clrmem_length (rtx);
static bool pa_assemble_integer (rtx, unsigned int, int); static bool pa_assemble_integer (rtx, unsigned int, int);
...@@ -677,7 +678,7 @@ copy_reg_pointer (rtx to, rtx from) ...@@ -677,7 +678,7 @@ copy_reg_pointer (rtx to, rtx from)
expressions will have one of a few well defined forms, so expressions will have one of a few well defined forms, so
we need only check those forms. */ we need only check those forms. */
int int
symbolic_expression_p (rtx x) pa_symbolic_expression_p (rtx x)
{ {
/* Strip off any HIGH. */ /* Strip off any HIGH. */
...@@ -690,19 +691,19 @@ symbolic_expression_p (rtx x) ...@@ -690,19 +691,19 @@ symbolic_expression_p (rtx x)
/* Accept any constant that can be moved in one instruction into a /* Accept any constant that can be moved in one instruction into a
general register. */ general register. */
int int
cint_ok_for_move (HOST_WIDE_INT ival) pa_cint_ok_for_move (HOST_WIDE_INT ival)
{ {
/* OK if ldo, ldil, or zdepi, can be used. */ /* OK if ldo, ldil, or zdepi, can be used. */
return (VAL_14_BITS_P (ival) return (VAL_14_BITS_P (ival)
|| ldil_cint_p (ival) || pa_ldil_cint_p (ival)
|| zdepi_cint_p (ival)); || pa_zdepi_cint_p (ival));
} }
/* True iff ldil can be used to load this CONST_INT. The least /* True iff ldil can be used to load this CONST_INT. The least
significant 11 bits of the value must be zero and the value must significant 11 bits of the value must be zero and the value must
not change sign when extended from 32 to 64 bits. */ not change sign when extended from 32 to 64 bits. */
int int
ldil_cint_p (HOST_WIDE_INT ival) pa_ldil_cint_p (HOST_WIDE_INT ival)
{ {
HOST_WIDE_INT x = ival & (((HOST_WIDE_INT) -1 << 31) | 0x7ff); HOST_WIDE_INT x = ival & (((HOST_WIDE_INT) -1 << 31) | 0x7ff);
...@@ -713,7 +714,7 @@ ldil_cint_p (HOST_WIDE_INT ival) ...@@ -713,7 +714,7 @@ ldil_cint_p (HOST_WIDE_INT ival)
zdepi first sign extends a 5-bit signed number to a given field zdepi first sign extends a 5-bit signed number to a given field
length, then places this field anywhere in a zero. */ length, then places this field anywhere in a zero. */
int int
zdepi_cint_p (unsigned HOST_WIDE_INT x) pa_zdepi_cint_p (unsigned HOST_WIDE_INT x)
{ {
unsigned HOST_WIDE_INT lsb_mask, t; unsigned HOST_WIDE_INT lsb_mask, t;
...@@ -731,7 +732,7 @@ zdepi_cint_p (unsigned HOST_WIDE_INT x) ...@@ -731,7 +732,7 @@ zdepi_cint_p (unsigned HOST_WIDE_INT x)
1....10....0 1....10....0
1..10..01..1 */ 1..10..01..1 */
int int
and_mask_p (unsigned HOST_WIDE_INT mask) pa_and_mask_p (unsigned HOST_WIDE_INT mask)
{ {
mask = ~mask; mask = ~mask;
mask += mask & -mask; mask += mask & -mask;
...@@ -740,7 +741,7 @@ and_mask_p (unsigned HOST_WIDE_INT mask) ...@@ -740,7 +741,7 @@ and_mask_p (unsigned HOST_WIDE_INT mask)
/* True iff depi can be used to compute (reg | MASK). */ /* True iff depi can be used to compute (reg | MASK). */
int int
ior_mask_p (unsigned HOST_WIDE_INT mask) pa_ior_mask_p (unsigned HOST_WIDE_INT mask)
{ {
mask += mask & -mask; mask += mask & -mask;
return (mask & (mask - 1)) == 0; return (mask & (mask - 1)) == 0;
...@@ -751,7 +752,7 @@ ior_mask_p (unsigned HOST_WIDE_INT mask) ...@@ -751,7 +752,7 @@ ior_mask_p (unsigned HOST_WIDE_INT mask)
position-independent addresses go to REG. If we need more position-independent addresses go to REG. If we need more
than one register, we lose. */ than one register, we lose. */
rtx static rtx
legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg) legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg)
{ {
rtx pic_ref = orig; rtx pic_ref = orig;
...@@ -1102,7 +1103,7 @@ hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, ...@@ -1102,7 +1103,7 @@ hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED,
if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 0)) == MULT if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 0)) == MULT
&& GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
&& shadd_constant_p (INTVAL (XEXP (XEXP (x, 0), 1))) && pa_shadd_constant_p (INTVAL (XEXP (XEXP (x, 0), 1)))
&& (OBJECT_P (XEXP (x, 1)) && (OBJECT_P (XEXP (x, 1))
|| GET_CODE (XEXP (x, 1)) == SUBREG) || GET_CODE (XEXP (x, 1)) == SUBREG)
&& GET_CODE (XEXP (x, 1)) != CONST) && GET_CODE (XEXP (x, 1)) != CONST)
...@@ -1133,7 +1134,7 @@ hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, ...@@ -1133,7 +1134,7 @@ hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED,
&& GET_CODE (XEXP (x, 0)) == PLUS && GET_CODE (XEXP (x, 0)) == PLUS
&& GET_CODE (XEXP (XEXP (x, 0), 0)) == MULT && GET_CODE (XEXP (XEXP (x, 0), 0)) == MULT
&& GET_CODE (XEXP (XEXP (XEXP (x, 0), 0), 1)) == CONST_INT && GET_CODE (XEXP (XEXP (XEXP (x, 0), 0), 1)) == CONST_INT
&& shadd_constant_p (INTVAL (XEXP (XEXP (XEXP (x, 0), 0), 1))) && pa_shadd_constant_p (INTVAL (XEXP (XEXP (XEXP (x, 0), 0), 1)))
&& (mode == SFmode || mode == DFmode)) && (mode == SFmode || mode == DFmode))
{ {
...@@ -1146,7 +1147,7 @@ hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, ...@@ -1146,7 +1147,7 @@ hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED,
idx = NULL_RTX; idx = NULL_RTX;
/* Make sure they're both regs. If one was a SYMBOL_REF [+ const], /* Make sure they're both regs. If one was a SYMBOL_REF [+ const],
then emit_move_sequence will turn on REG_POINTER so we'll know then pa_emit_move_sequence will turn on REG_POINTER so we'll know
it's a base register below. */ it's a base register below. */
if (GET_CODE (reg1) != REG) if (GET_CODE (reg1) != REG)
reg1 = force_reg (Pmode, force_operand (reg1, 0)); reg1 = force_reg (Pmode, force_operand (reg1, 0));
...@@ -1259,7 +1260,7 @@ hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, ...@@ -1259,7 +1260,7 @@ hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED,
do the optimization for floatint point modes. */ do the optimization for floatint point modes. */
if (GET_CODE (x) == PLUS if (GET_CODE (x) == PLUS
&& symbolic_expression_p (XEXP (x, 1))) && pa_symbolic_expression_p (XEXP (x, 1)))
{ {
/* Ugly. We modify things here so that the address offset specified /* Ugly. We modify things here so that the address offset specified
by the index expression is computed first, then added to x to form by the index expression is computed first, then added to x to form
...@@ -1289,7 +1290,7 @@ hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, ...@@ -1289,7 +1290,7 @@ hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED,
&& INTVAL (XEXP (y, 1)) >= -4096 && INTVAL (XEXP (y, 1)) >= -4096
&& INTVAL (XEXP (y, 1)) <= 4095 && INTVAL (XEXP (y, 1)) <= 4095
&& GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
&& shadd_constant_p (INTVAL (XEXP (XEXP (x, 0), 1)))) && pa_shadd_constant_p (INTVAL (XEXP (XEXP (x, 0), 1))))
{ {
int val = INTVAL (XEXP (XEXP (x, 0), 1)); int val = INTVAL (XEXP (XEXP (x, 0), 1));
rtx reg1, reg2; rtx reg1, reg2;
...@@ -1315,7 +1316,7 @@ hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, ...@@ -1315,7 +1316,7 @@ hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED,
&& GET_CODE (XEXP (y, 1)) == CONST_INT && GET_CODE (XEXP (y, 1)) == CONST_INT
&& INTVAL (XEXP (y, 1)) % INTVAL (XEXP (XEXP (x, 0), 1)) == 0 && INTVAL (XEXP (y, 1)) % INTVAL (XEXP (XEXP (x, 0), 1)) == 0
&& GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
&& shadd_constant_p (INTVAL (XEXP (XEXP (x, 0), 1)))) && pa_shadd_constant_p (INTVAL (XEXP (XEXP (x, 0), 1))))
{ {
regx1 regx1
= force_reg (Pmode, GEN_INT (INTVAL (XEXP (y, 1)) = force_reg (Pmode, GEN_INT (INTVAL (XEXP (y, 1))
...@@ -1541,7 +1542,7 @@ pa_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) ...@@ -1541,7 +1542,7 @@ pa_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x)
of SCRATCH_REG in the proper mode. */ of SCRATCH_REG in the proper mode. */
int int
emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg) pa_emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg)
{ {
register rtx operand0 = operands[0]; register rtx operand0 = operands[0];
register rtx operand1 = operands[1]; register rtx operand1 = operands[1];
...@@ -1722,7 +1723,7 @@ emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg) ...@@ -1722,7 +1723,7 @@ emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg)
const_mem = force_const_mem (mode, operand1); const_mem = force_const_mem (mode, operand1);
xoperands[0] = scratch_reg; xoperands[0] = scratch_reg;
xoperands[1] = XEXP (const_mem, 0); xoperands[1] = XEXP (const_mem, 0);
emit_move_sequence (xoperands, Pmode, 0); pa_emit_move_sequence (xoperands, Pmode, 0);
/* Now load the destination register. */ /* Now load the destination register. */
emit_insn (gen_rtx_SET (mode, operand0, emit_insn (gen_rtx_SET (mode, operand0,
...@@ -1788,7 +1789,7 @@ emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg) ...@@ -1788,7 +1789,7 @@ emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg)
if (register_operand (operand1, mode) if (register_operand (operand1, mode)
|| (GET_CODE (operand1) == CONST_INT || (GET_CODE (operand1) == CONST_INT
&& cint_ok_for_move (INTVAL (operand1))) && pa_cint_ok_for_move (INTVAL (operand1)))
|| (operand1 == CONST0_RTX (mode)) || (operand1 == CONST0_RTX (mode))
|| (GET_CODE (operand1) == HIGH || (GET_CODE (operand1) == HIGH
&& !symbolic_operand (XEXP (operand1, 0), VOIDmode)) && !symbolic_operand (XEXP (operand1, 0), VOIDmode))
...@@ -1946,12 +1947,12 @@ emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg) ...@@ -1946,12 +1947,12 @@ emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg)
/* Put the address of the memory location into our destination /* Put the address of the memory location into our destination
register. */ register. */
operands[1] = temp; operands[1] = temp;
emit_move_sequence (operands, mode, scratch_reg); pa_emit_move_sequence (operands, mode, scratch_reg);
/* Now load from the memory location into our destination /* Now load from the memory location into our destination
register. */ register. */
operands[1] = gen_rtx_MEM (Pmode, operands[0]); operands[1] = gen_rtx_MEM (Pmode, operands[0]);
emit_move_sequence (operands, mode, scratch_reg); pa_emit_move_sequence (operands, mode, scratch_reg);
/* And add back in the constant part. */ /* And add back in the constant part. */
if (const_part != NULL_RTX) if (const_part != NULL_RTX)
...@@ -1989,7 +1990,7 @@ emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg) ...@@ -1989,7 +1990,7 @@ emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg)
operands[1] = legitimize_pic_address (XEXP (const_mem, 0), operands[1] = legitimize_pic_address (XEXP (const_mem, 0),
mode, temp); mode, temp);
operands[1] = replace_equiv_address (const_mem, operands[1]); operands[1] = replace_equiv_address (const_mem, operands[1]);
emit_move_sequence (operands, mode, temp); pa_emit_move_sequence (operands, mode, temp);
} }
else else
{ {
...@@ -2063,7 +2064,7 @@ emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg) ...@@ -2063,7 +2064,7 @@ emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg)
operands[1] = tmp; operands[1] = tmp;
} }
else if (GET_CODE (operand1) != CONST_INT else if (GET_CODE (operand1) != CONST_INT
|| !cint_ok_for_move (INTVAL (operand1))) || !pa_cint_ok_for_move (INTVAL (operand1)))
{ {
rtx insn, temp; rtx insn, temp;
rtx op1 = operand1; rtx op1 = operand1;
...@@ -2206,7 +2207,7 @@ emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg) ...@@ -2206,7 +2207,7 @@ emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg)
it will need a link/runtime reloc). */ it will need a link/runtime reloc). */
int int
reloc_needed (tree exp) pa_reloc_needed (tree exp)
{ {
int reloc = 0; int reloc = 0;
...@@ -2218,13 +2219,13 @@ reloc_needed (tree exp) ...@@ -2218,13 +2219,13 @@ reloc_needed (tree exp)
case POINTER_PLUS_EXPR: case POINTER_PLUS_EXPR:
case PLUS_EXPR: case PLUS_EXPR:
case MINUS_EXPR: case MINUS_EXPR:
reloc = reloc_needed (TREE_OPERAND (exp, 0)); reloc = pa_reloc_needed (TREE_OPERAND (exp, 0));
reloc |= reloc_needed (TREE_OPERAND (exp, 1)); reloc |= pa_reloc_needed (TREE_OPERAND (exp, 1));
break; break;
CASE_CONVERT: CASE_CONVERT:
case NON_LVALUE_EXPR: case NON_LVALUE_EXPR:
reloc = reloc_needed (TREE_OPERAND (exp, 0)); reloc = pa_reloc_needed (TREE_OPERAND (exp, 0));
break; break;
case CONSTRUCTOR: case CONSTRUCTOR:
...@@ -2234,7 +2235,7 @@ reloc_needed (tree exp) ...@@ -2234,7 +2235,7 @@ reloc_needed (tree exp)
FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), ix, value) FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), ix, value)
if (value) if (value)
reloc |= reloc_needed (value); reloc |= pa_reloc_needed (value);
} }
break; break;
...@@ -2251,7 +2252,7 @@ reloc_needed (tree exp) ...@@ -2251,7 +2252,7 @@ reloc_needed (tree exp)
/* Return the best assembler insn template /* Return the best assembler insn template
for moving operands[1] into operands[0] as a fullword. */ for moving operands[1] into operands[0] as a fullword. */
const char * const char *
singlemove_string (rtx *operands) pa_singlemove_string (rtx *operands)
{ {
HOST_WIDE_INT intval; HOST_WIDE_INT intval;
...@@ -2282,7 +2283,7 @@ singlemove_string (rtx *operands) ...@@ -2282,7 +2283,7 @@ singlemove_string (rtx *operands)
return "ldi %1,%0"; return "ldi %1,%0";
else if ((intval & 0x7ff) == 0) else if ((intval & 0x7ff) == 0)
return "ldil L'%1,%0"; return "ldil L'%1,%0";
else if (zdepi_cint_p (intval)) else if (pa_zdepi_cint_p (intval))
return "{zdepi %Z1,%0|depwi,z %Z1,%0}"; return "{zdepi %Z1,%0|depwi,z %Z1,%0}";
else else
return "ldil L'%1,%0\n\tldo R'%1(%0),%0"; return "ldil L'%1,%0\n\tldo R'%1(%0),%0";
...@@ -2331,7 +2332,8 @@ compute_zdepwi_operands (unsigned HOST_WIDE_INT imm, unsigned *op) ...@@ -2331,7 +2332,8 @@ compute_zdepwi_operands (unsigned HOST_WIDE_INT imm, unsigned *op)
/* Compute position (in OP[1]) and width (in OP[2]) /* Compute position (in OP[1]) and width (in OP[2])
useful for copying IMM to a register using the depdi,z useful for copying IMM to a register using the depdi,z
instructions. Store the immediate value to insert in OP[0]. */ instructions. Store the immediate value to insert in OP[0]. */
void
static void
compute_zdepdi_operands (unsigned HOST_WIDE_INT imm, unsigned *op) compute_zdepdi_operands (unsigned HOST_WIDE_INT imm, unsigned *op)
{ {
int lsb, len, maxlen; int lsb, len, maxlen;
...@@ -2375,7 +2377,7 @@ compute_zdepdi_operands (unsigned HOST_WIDE_INT imm, unsigned *op) ...@@ -2375,7 +2377,7 @@ compute_zdepdi_operands (unsigned HOST_WIDE_INT imm, unsigned *op)
with operands OPERANDS. */ with operands OPERANDS. */
const char * const char *
output_move_double (rtx *operands) pa_output_move_double (rtx *operands)
{ {
enum { REGOP, OFFSOP, MEMOP, CNSTOP, RNDOP } optype0, optype1; enum { REGOP, OFFSOP, MEMOP, CNSTOP, RNDOP } optype0, optype1;
rtx latehalf[2]; rtx latehalf[2];
...@@ -2617,25 +2619,25 @@ output_move_double (rtx *operands) ...@@ -2617,25 +2619,25 @@ output_move_double (rtx *operands)
/* Do the late half first. */ /* Do the late half first. */
if (addreg1) if (addreg1)
output_asm_insn ("ldo 4(%0),%0", &addreg1); output_asm_insn ("ldo 4(%0),%0", &addreg1);
output_asm_insn (singlemove_string (latehalf), latehalf); output_asm_insn (pa_singlemove_string (latehalf), latehalf);
/* Then clobber. */ /* Then clobber. */
if (addreg1) if (addreg1)
output_asm_insn ("ldo -4(%0),%0", &addreg1); output_asm_insn ("ldo -4(%0),%0", &addreg1);
return singlemove_string (operands); return pa_singlemove_string (operands);
} }
/* Now handle register -> register case. */ /* Now handle register -> register case. */
if (optype0 == REGOP && optype1 == REGOP if (optype0 == REGOP && optype1 == REGOP
&& REGNO (operands[0]) == REGNO (operands[1]) + 1) && REGNO (operands[0]) == REGNO (operands[1]) + 1)
{ {
output_asm_insn (singlemove_string (latehalf), latehalf); output_asm_insn (pa_singlemove_string (latehalf), latehalf);
return singlemove_string (operands); return pa_singlemove_string (operands);
} }
/* Normal case: do the two words, low-numbered first. */ /* Normal case: do the two words, low-numbered first. */
output_asm_insn (singlemove_string (operands), operands); output_asm_insn (pa_singlemove_string (operands), operands);
/* Make any unoffsettable addresses point at high-numbered word. */ /* Make any unoffsettable addresses point at high-numbered word. */
if (addreg0) if (addreg0)
...@@ -2644,7 +2646,7 @@ output_move_double (rtx *operands) ...@@ -2644,7 +2646,7 @@ output_move_double (rtx *operands)
output_asm_insn ("ldo 4(%0),%0", &addreg1); output_asm_insn ("ldo 4(%0),%0", &addreg1);
/* Do that word. */ /* Do that word. */
output_asm_insn (singlemove_string (latehalf), latehalf); output_asm_insn (pa_singlemove_string (latehalf), latehalf);
/* Undo the adds we just did. */ /* Undo the adds we just did. */
if (addreg0) if (addreg0)
...@@ -2656,7 +2658,7 @@ output_move_double (rtx *operands) ...@@ -2656,7 +2658,7 @@ output_move_double (rtx *operands)
} }
const char * const char *
output_fp_move_double (rtx *operands) pa_output_fp_move_double (rtx *operands)
{ {
if (FP_REG_P (operands[0])) if (FP_REG_P (operands[0]))
{ {
...@@ -2723,7 +2725,7 @@ find_addr_reg (rtx addr) ...@@ -2723,7 +2725,7 @@ find_addr_reg (rtx addr)
OPERANDS[6] is another temporary register. */ OPERANDS[6] is another temporary register. */
const char * const char *
output_block_move (rtx *operands, int size_is_constant ATTRIBUTE_UNUSED) pa_output_block_move (rtx *operands, int size_is_constant ATTRIBUTE_UNUSED)
{ {
int align = INTVAL (operands[5]); int align = INTVAL (operands[5]);
unsigned long n_bytes = INTVAL (operands[4]); unsigned long n_bytes = INTVAL (operands[4]);
...@@ -2887,7 +2889,7 @@ compute_movmem_length (rtx insn) ...@@ -2887,7 +2889,7 @@ compute_movmem_length (rtx insn)
OPERANDS[3] is the alignment safe to use, as a CONST_INT. */ OPERANDS[3] is the alignment safe to use, as a CONST_INT. */
const char * const char *
output_block_clear (rtx *operands, int size_is_constant ATTRIBUTE_UNUSED) pa_output_block_clear (rtx *operands, int size_is_constant ATTRIBUTE_UNUSED)
{ {
int align = INTVAL (operands[3]); int align = INTVAL (operands[3]);
unsigned long n_bytes = INTVAL (operands[2]); unsigned long n_bytes = INTVAL (operands[2]);
...@@ -3023,7 +3025,7 @@ compute_clrmem_length (rtx insn) ...@@ -3023,7 +3025,7 @@ compute_clrmem_length (rtx insn)
const char * const char *
output_and (rtx *operands) pa_output_and (rtx *operands)
{ {
if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) != 0) if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) != 0)
{ {
...@@ -3073,7 +3075,7 @@ output_and (rtx *operands) ...@@ -3073,7 +3075,7 @@ output_and (rtx *operands)
/* Return a string to perform a bitwise-and of operands[1] with operands[2] /* Return a string to perform a bitwise-and of operands[1] with operands[2]
storing the result in operands[0]. */ storing the result in operands[0]. */
const char * const char *
output_64bit_and (rtx *operands) pa_output_64bit_and (rtx *operands)
{ {
if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) != 0) if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) != 0)
{ {
...@@ -3121,7 +3123,7 @@ output_64bit_and (rtx *operands) ...@@ -3121,7 +3123,7 @@ output_64bit_and (rtx *operands)
} }
const char * const char *
output_ior (rtx *operands) pa_output_ior (rtx *operands)
{ {
unsigned HOST_WIDE_INT mask = INTVAL (operands[2]); unsigned HOST_WIDE_INT mask = INTVAL (operands[2]);
int bs0, bs1, p, len; int bs0, bs1, p, len;
...@@ -3150,7 +3152,7 @@ output_ior (rtx *operands) ...@@ -3150,7 +3152,7 @@ output_ior (rtx *operands)
/* Return a string to perform a bitwise-and of operands[1] with operands[2] /* Return a string to perform a bitwise-and of operands[1] with operands[2]
storing the result in operands[0]. */ storing the result in operands[0]. */
const char * const char *
output_64bit_ior (rtx *operands) pa_output_64bit_ior (rtx *operands)
{ {
unsigned HOST_WIDE_INT mask = INTVAL (operands[2]); unsigned HOST_WIDE_INT mask = INTVAL (operands[2]);
int bs0, bs1, p, len; int bs0, bs1, p, len;
...@@ -3198,7 +3200,7 @@ pa_assemble_integer (rtx x, unsigned int size, int aligned_p) ...@@ -3198,7 +3200,7 @@ pa_assemble_integer (rtx x, unsigned int size, int aligned_p)
/* Output an ascii string. */ /* Output an ascii string. */
void void
output_ascii (FILE *file, const char *p, int size) pa_output_ascii (FILE *file, const char *p, int size)
{ {
int i; int i;
int chars_output; int chars_output;
...@@ -3602,12 +3604,12 @@ set_reg_plus_d (int reg, int base, HOST_WIDE_INT disp, int note) ...@@ -3602,12 +3604,12 @@ set_reg_plus_d (int reg, int base, HOST_WIDE_INT disp, int note)
} }
HOST_WIDE_INT HOST_WIDE_INT
compute_frame_size (HOST_WIDE_INT size, int *fregs_live) pa_compute_frame_size (HOST_WIDE_INT size, int *fregs_live)
{ {
int freg_saved = 0; int freg_saved = 0;
int i, j; int i, j;
/* The code in hppa_expand_prologue and hppa_expand_epilogue must /* The code in pa_expand_prologue and pa_expand_epilogue must
be consistent with the rounding and size calculation done here. be consistent with the rounding and size calculation done here.
Change them at the same time. */ Change them at the same time. */
...@@ -3703,7 +3705,7 @@ pa_output_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED) ...@@ -3703,7 +3705,7 @@ pa_output_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
ASM_OUTPUT_LABEL (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); ASM_OUTPUT_LABEL (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
fputs ("\t.PROC\n", file); fputs ("\t.PROC\n", file);
/* hppa_expand_prologue does the dirty work now. We just need /* pa_expand_prologue does the dirty work now. We just need
to output the assembler directives which denote the start to output the assembler directives which denote the start
of a function. */ of a function. */
fprintf (file, "\t.CALLINFO FRAME=" HOST_WIDE_INT_PRINT_DEC, actual_fsize); fprintf (file, "\t.CALLINFO FRAME=" HOST_WIDE_INT_PRINT_DEC, actual_fsize);
...@@ -3746,7 +3748,7 @@ pa_output_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED) ...@@ -3746,7 +3748,7 @@ pa_output_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
} }
void void
hppa_expand_prologue (void) pa_expand_prologue (void)
{ {
int merge_sp_adjust_with_store = 0; int merge_sp_adjust_with_store = 0;
HOST_WIDE_INT size = get_frame_size (); HOST_WIDE_INT size = get_frame_size ();
...@@ -3759,13 +3761,13 @@ hppa_expand_prologue (void) ...@@ -3759,13 +3761,13 @@ hppa_expand_prologue (void)
save_fregs = 0; save_fregs = 0;
/* Compute total size for frame pointer, filler, locals and rounding to /* Compute total size for frame pointer, filler, locals and rounding to
the next word boundary. Similar code appears in compute_frame_size the next word boundary. Similar code appears in pa_compute_frame_size
and must be changed in tandem with this code. */ and must be changed in tandem with this code. */
local_fsize = (size + UNITS_PER_WORD - 1) & ~(UNITS_PER_WORD - 1); local_fsize = (size + UNITS_PER_WORD - 1) & ~(UNITS_PER_WORD - 1);
if (local_fsize || frame_pointer_needed) if (local_fsize || frame_pointer_needed)
local_fsize += STARTING_FRAME_OFFSET; local_fsize += STARTING_FRAME_OFFSET;
actual_fsize = compute_frame_size (size, &save_fregs); actual_fsize = pa_compute_frame_size (size, &save_fregs);
if (flag_stack_usage_info) if (flag_stack_usage_info)
current_function_static_stack_size = actual_fsize; current_function_static_stack_size = actual_fsize;
...@@ -4109,7 +4111,7 @@ pa_output_function_epilogue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED) ...@@ -4109,7 +4111,7 @@ pa_output_function_epilogue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
last_address = 0; last_address = 0;
/* hppa_expand_epilogue does the dirty work now. We just need /* pa_expand_epilogue does the dirty work now. We just need
to output the assembler directives which denote the end to output the assembler directives which denote the end
of a function. of a function.
...@@ -4162,7 +4164,7 @@ pa_output_function_epilogue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED) ...@@ -4162,7 +4164,7 @@ pa_output_function_epilogue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
} }
void void
hppa_expand_epilogue (void) pa_expand_epilogue (void)
{ {
rtx tmpreg; rtx tmpreg;
HOST_WIDE_INT offset; HOST_WIDE_INT offset;
...@@ -4354,7 +4356,7 @@ pa_can_use_return_insn (void) ...@@ -4354,7 +4356,7 @@ pa_can_use_return_insn (void)
if (crtl->profile) if (crtl->profile)
return false; return false;
return compute_frame_size (get_frame_size (), 0) == 0; return pa_compute_frame_size (get_frame_size (), 0) == 0;
} }
rtx rtx
...@@ -4494,7 +4496,7 @@ hppa_profile_hook (int label_no) ...@@ -4494,7 +4496,7 @@ hppa_profile_hook (int label_no)
return location is in a shared library. */ return location is in a shared library. */
rtx rtx
return_addr_rtx (int count, rtx frameaddr) pa_return_addr_rtx (int count, rtx frameaddr)
{ {
rtx label; rtx label;
rtx rp; rtx rp;
...@@ -4563,7 +4565,7 @@ return_addr_rtx (int count, rtx frameaddr) ...@@ -4563,7 +4565,7 @@ return_addr_rtx (int count, rtx frameaddr)
} }
void void
emit_bcond_fp (rtx operands[]) pa_emit_bcond_fp (rtx operands[])
{ {
enum rtx_code code = GET_CODE (operands[0]); enum rtx_code code = GET_CODE (operands[0]);
rtx operand0 = operands[1]; rtx operand0 = operands[1];
...@@ -4919,7 +4921,7 @@ pa_print_operand_punct_valid_p (unsigned char code) ...@@ -4919,7 +4921,7 @@ pa_print_operand_punct_valid_p (unsigned char code)
For `%' followed by punctuation, CODE is the punctuation and X is null. */ For `%' followed by punctuation, CODE is the punctuation and X is null. */
void void
print_operand (FILE *file, rtx x, int code) pa_print_operand (FILE *file, rtx x, int code)
{ {
switch (code) switch (code)
{ {
...@@ -4969,7 +4971,7 @@ print_operand (FILE *file, rtx x, int code) ...@@ -4969,7 +4971,7 @@ print_operand (FILE *file, rtx x, int code)
xoperands[0] = XEXP (XEXP (x, 0), 0); xoperands[0] = XEXP (XEXP (x, 0), 0);
xoperands[1] = XVECEXP (XEXP (XEXP (x, 0), 1), 0, 0); xoperands[1] = XVECEXP (XEXP (XEXP (x, 0), 1), 0, 0);
output_global_address (file, xoperands[1], 0); pa_output_global_address (file, xoperands[1], 0);
fprintf (file, "(%s)", reg_names [REGNO (xoperands[0])]); fprintf (file, "(%s)", reg_names [REGNO (xoperands[0])]);
return; return;
} }
...@@ -5194,10 +5196,10 @@ print_operand (FILE *file, rtx x, int code) ...@@ -5194,10 +5196,10 @@ print_operand (FILE *file, rtx x, int code)
} }
return; return;
case 'G': case 'G':
output_global_address (file, x, 0); pa_output_global_address (file, x, 0);
return; return;
case 'H': case 'H':
output_global_address (file, x, 1); pa_output_global_address (file, x, 1);
return; return;
case 0: /* Don't do anything special */ case 0: /* Don't do anything special */
break; break;
...@@ -5288,7 +5290,7 @@ print_operand (FILE *file, rtx x, int code) ...@@ -5288,7 +5290,7 @@ print_operand (FILE *file, rtx x, int code)
/* output a SYMBOL_REF or a CONST expression involving a SYMBOL_REF. */ /* output a SYMBOL_REF or a CONST expression involving a SYMBOL_REF. */
void void
output_global_address (FILE *file, rtx x, int round_constant) pa_output_global_address (FILE *file, rtx x, int round_constant)
{ {
/* Imagine (high (const (plus ...))). */ /* Imagine (high (const (plus ...))). */
...@@ -5477,7 +5479,7 @@ pa_hpux64_hpas_file_start (void) ...@@ -5477,7 +5479,7 @@ pa_hpux64_hpas_file_start (void)
label. If an entry for SYMBOL is not found, a new entry is created. */ label. If an entry for SYMBOL is not found, a new entry is created. */
rtx rtx
get_deferred_plabel (rtx symbol) pa_get_deferred_plabel (rtx symbol)
{ {
const char *fname = XSTR (symbol, 0); const char *fname = XSTR (symbol, 0);
size_t i; size_t i;
...@@ -5610,16 +5612,16 @@ import_milli (enum millicodes code) ...@@ -5610,16 +5612,16 @@ import_milli (enum millicodes code)
the proper registers. */ the proper registers. */
const char * const char *
output_mul_insn (int unsignedp ATTRIBUTE_UNUSED, rtx insn) pa_output_mul_insn (int unsignedp ATTRIBUTE_UNUSED, rtx insn)
{ {
import_milli (mulI); import_milli (mulI);
return output_millicode_call (insn, gen_rtx_SYMBOL_REF (Pmode, "$$mulI")); return pa_output_millicode_call (insn, gen_rtx_SYMBOL_REF (Pmode, "$$mulI"));
} }
/* Emit the rtl for doing a division by a constant. */ /* Emit the rtl for doing a division by a constant. */
/* Do magic division millicodes exist for this value? */ /* Do magic division millicodes exist for this value? */
const int magic_milli[]= {0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 1, 0, 1, 0, 1, 1}; const int pa_magic_milli[]= {0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 1, 0, 1, 0, 1, 1};
/* We'll use an array to keep track of the magic millicodes and /* We'll use an array to keep track of the magic millicodes and
whether or not we've used them already. [n][0] is signed, [n][1] is whether or not we've used them already. [n][0] is signed, [n][1] is
...@@ -5628,12 +5630,12 @@ const int magic_milli[]= {0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 1, 0, 1, 0, 1, 1}; ...@@ -5628,12 +5630,12 @@ const int magic_milli[]= {0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 1, 0, 1, 0, 1, 1};
static int div_milli[16][2]; static int div_milli[16][2];
int int
emit_hpdiv_const (rtx *operands, int unsignedp) pa_emit_hpdiv_const (rtx *operands, int unsignedp)
{ {
if (GET_CODE (operands[2]) == CONST_INT if (GET_CODE (operands[2]) == CONST_INT
&& INTVAL (operands[2]) > 0 && INTVAL (operands[2]) > 0
&& INTVAL (operands[2]) < 16 && INTVAL (operands[2]) < 16
&& magic_milli[INTVAL (operands[2])]) && pa_magic_milli[INTVAL (operands[2])])
{ {
rtx ret = gen_rtx_REG (SImode, TARGET_64BIT ? 2 : 31); rtx ret = gen_rtx_REG (SImode, TARGET_64BIT ? 2 : 31);
...@@ -5658,7 +5660,7 @@ emit_hpdiv_const (rtx *operands, int unsignedp) ...@@ -5658,7 +5660,7 @@ emit_hpdiv_const (rtx *operands, int unsignedp)
} }
const char * const char *
output_div_insn (rtx *operands, int unsignedp, rtx insn) pa_output_div_insn (rtx *operands, int unsignedp, rtx insn)
{ {
int divisor; int divisor;
...@@ -5680,14 +5682,14 @@ output_div_insn (rtx *operands, int unsignedp, rtx insn) ...@@ -5680,14 +5682,14 @@ output_div_insn (rtx *operands, int unsignedp, rtx insn)
{ {
sprintf (buf, "$$divU_" HOST_WIDE_INT_PRINT_DEC, sprintf (buf, "$$divU_" HOST_WIDE_INT_PRINT_DEC,
INTVAL (operands[0])); INTVAL (operands[0]));
return output_millicode_call (insn, return pa_output_millicode_call (insn,
gen_rtx_SYMBOL_REF (SImode, buf)); gen_rtx_SYMBOL_REF (SImode, buf));
} }
else else
{ {
sprintf (buf, "$$divI_" HOST_WIDE_INT_PRINT_DEC, sprintf (buf, "$$divI_" HOST_WIDE_INT_PRINT_DEC,
INTVAL (operands[0])); INTVAL (operands[0]));
return output_millicode_call (insn, return pa_output_millicode_call (insn,
gen_rtx_SYMBOL_REF (SImode, buf)); gen_rtx_SYMBOL_REF (SImode, buf));
} }
} }
...@@ -5697,13 +5699,13 @@ output_div_insn (rtx *operands, int unsignedp, rtx insn) ...@@ -5697,13 +5699,13 @@ output_div_insn (rtx *operands, int unsignedp, rtx insn)
if (unsignedp) if (unsignedp)
{ {
import_milli (divU); import_milli (divU);
return output_millicode_call (insn, return pa_output_millicode_call (insn,
gen_rtx_SYMBOL_REF (SImode, "$$divU")); gen_rtx_SYMBOL_REF (SImode, "$$divU"));
} }
else else
{ {
import_milli (divI); import_milli (divI);
return output_millicode_call (insn, return pa_output_millicode_call (insn,
gen_rtx_SYMBOL_REF (SImode, "$$divI")); gen_rtx_SYMBOL_REF (SImode, "$$divI"));
} }
} }
...@@ -5712,24 +5714,24 @@ output_div_insn (rtx *operands, int unsignedp, rtx insn) ...@@ -5712,24 +5714,24 @@ output_div_insn (rtx *operands, int unsignedp, rtx insn)
/* Output a $$rem millicode to do mod. */ /* Output a $$rem millicode to do mod. */
const char * const char *
output_mod_insn (int unsignedp, rtx insn) pa_output_mod_insn (int unsignedp, rtx insn)
{ {
if (unsignedp) if (unsignedp)
{ {
import_milli (remU); import_milli (remU);
return output_millicode_call (insn, return pa_output_millicode_call (insn,
gen_rtx_SYMBOL_REF (SImode, "$$remU")); gen_rtx_SYMBOL_REF (SImode, "$$remU"));
} }
else else
{ {
import_milli (remI); import_milli (remI);
return output_millicode_call (insn, return pa_output_millicode_call (insn,
gen_rtx_SYMBOL_REF (SImode, "$$remI")); gen_rtx_SYMBOL_REF (SImode, "$$remI"));
} }
} }
void void
output_arg_descriptor (rtx call_insn) pa_output_arg_descriptor (rtx call_insn)
{ {
const char *arg_regs[4]; const char *arg_regs[4];
enum machine_mode arg_mode; enum machine_mode arg_mode;
...@@ -5847,7 +5849,7 @@ pa_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i, ...@@ -5847,7 +5849,7 @@ pa_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i,
/* Secondary reloads of symbolic operands require %r1 as a scratch /* Secondary reloads of symbolic operands require %r1 as a scratch
register when we're generating PIC code and when the operand isn't register when we're generating PIC code and when the operand isn't
readonly. */ readonly. */
if (symbolic_expression_p (x)) if (pa_symbolic_expression_p (x))
{ {
if (GET_CODE (x) == HIGH) if (GET_CODE (x) == HIGH)
x = XEXP (x, 0); x = XEXP (x, 0);
...@@ -5869,7 +5871,7 @@ pa_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i, ...@@ -5869,7 +5871,7 @@ pa_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i,
/* In order to allow 14-bit displacements in integer loads and stores, /* In order to allow 14-bit displacements in integer loads and stores,
we need to prevent reload from generating out of range integer mode we need to prevent reload from generating out of range integer mode
loads and stores to the floating point registers. Previously, we loads and stores to the floating point registers. Previously, we
used to call for a secondary reload and have emit_move_sequence() used to call for a secondary reload and have pa_emit_move_sequence()
fix the instruction sequence. However, reload occasionally wouldn't fix the instruction sequence. However, reload occasionally wouldn't
generate the reload and we would end up with an invalid REG+D memory generate the reload and we would end up with an invalid REG+D memory
address. So, now we use an intermediate general register for most address. So, now we use an intermediate general register for most
...@@ -5994,7 +5996,7 @@ pa_pass_by_reference (cumulative_args_t ca ATTRIBUTE_UNUSED, ...@@ -5994,7 +5996,7 @@ pa_pass_by_reference (cumulative_args_t ca ATTRIBUTE_UNUSED,
} }
enum direction enum direction
function_arg_padding (enum machine_mode mode, const_tree type) pa_function_arg_padding (enum machine_mode mode, const_tree type)
{ {
if (mode == BLKmode if (mode == BLKmode
|| (TARGET_64BIT || (TARGET_64BIT
...@@ -6308,7 +6310,7 @@ use_skip_p (rtx insn) ...@@ -6308,7 +6310,7 @@ use_skip_p (rtx insn)
parameters. */ parameters. */
const char * const char *
output_cbranch (rtx *operands, int negated, rtx insn) pa_output_cbranch (rtx *operands, int negated, rtx insn)
{ {
static char buf[100]; static char buf[100];
bool useskip; bool useskip;
...@@ -6434,7 +6436,7 @@ output_cbranch (rtx *operands, int negated, rtx insn) ...@@ -6434,7 +6436,7 @@ output_cbranch (rtx *operands, int negated, rtx insn)
default: default:
/* The reversed conditional branch must branch over one additional /* The reversed conditional branch must branch over one additional
instruction if the delay slot is filled and needs to be extracted instruction if the delay slot is filled and needs to be extracted
by output_lbranch. If the delay slot is empty or this is a by pa_output_lbranch. If the delay slot is empty or this is a
nullified forward branch, the instruction after the reversed nullified forward branch, the instruction after the reversed
condition branch must be nullified. */ condition branch must be nullified. */
if (dbr_sequence_length () == 0 if (dbr_sequence_length () == 0
...@@ -6496,7 +6498,7 @@ output_cbranch (rtx *operands, int negated, rtx insn) ...@@ -6496,7 +6498,7 @@ output_cbranch (rtx *operands, int negated, rtx insn)
} }
output_asm_insn (buf, operands); output_asm_insn (buf, operands);
return output_lbranch (operands[0], insn, xdelay); return pa_output_lbranch (operands[0], insn, xdelay);
} }
return buf; return buf;
} }
...@@ -6519,7 +6521,7 @@ output_cbranch (rtx *operands, int negated, rtx insn) ...@@ -6519,7 +6521,7 @@ output_cbranch (rtx *operands, int negated, rtx insn)
bytes for the portable runtime, non-PIC and PIC cases, respectively. */ bytes for the portable runtime, non-PIC and PIC cases, respectively. */
const char * const char *
output_lbranch (rtx dest, rtx insn, int xdelay) pa_output_lbranch (rtx dest, rtx insn, int xdelay)
{ {
rtx xoperands[2]; rtx xoperands[2];
...@@ -6634,7 +6636,7 @@ output_lbranch (rtx dest, rtx insn, int xdelay) ...@@ -6634,7 +6636,7 @@ output_lbranch (rtx dest, rtx insn, int xdelay)
above. it returns the appropriate output template to emit the branch. */ above. it returns the appropriate output template to emit the branch. */
const char * const char *
output_bb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which) pa_output_bb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which)
{ {
static char buf[100]; static char buf[100];
bool useskip; bool useskip;
...@@ -6776,7 +6778,7 @@ output_bb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which) ...@@ -6776,7 +6778,7 @@ output_bb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which)
default: default:
/* The reversed conditional branch must branch over one additional /* The reversed conditional branch must branch over one additional
instruction if the delay slot is filled and needs to be extracted instruction if the delay slot is filled and needs to be extracted
by output_lbranch. If the delay slot is empty or this is a by pa_output_lbranch. If the delay slot is empty or this is a
nullified forward branch, the instruction after the reversed nullified forward branch, the instruction after the reversed
condition branch must be nullified. */ condition branch must be nullified. */
if (dbr_sequence_length () == 0 if (dbr_sequence_length () == 0
...@@ -6806,7 +6808,7 @@ output_bb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which) ...@@ -6806,7 +6808,7 @@ output_bb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which)
else else
strcat (buf, " %0,%1,.+%4"); strcat (buf, " %0,%1,.+%4");
output_asm_insn (buf, operands); output_asm_insn (buf, operands);
return output_lbranch (negated ? operands[3] : operands[2], return pa_output_lbranch (negated ? operands[3] : operands[2],
insn, xdelay); insn, xdelay);
} }
return buf; return buf;
...@@ -6819,7 +6821,8 @@ output_bb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which) ...@@ -6819,7 +6821,8 @@ output_bb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which)
branch. */ branch. */
const char * const char *
output_bvb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which) pa_output_bvb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn,
int which)
{ {
static char buf[100]; static char buf[100];
bool useskip; bool useskip;
...@@ -6960,7 +6963,7 @@ output_bvb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which) ...@@ -6960,7 +6963,7 @@ output_bvb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which)
default: default:
/* The reversed conditional branch must branch over one additional /* The reversed conditional branch must branch over one additional
instruction if the delay slot is filled and needs to be extracted instruction if the delay slot is filled and needs to be extracted
by output_lbranch. If the delay slot is empty or this is a by pa_output_lbranch. If the delay slot is empty or this is a
nullified forward branch, the instruction after the reversed nullified forward branch, the instruction after the reversed
condition branch must be nullified. */ condition branch must be nullified. */
if (dbr_sequence_length () == 0 if (dbr_sequence_length () == 0
...@@ -6990,7 +6993,7 @@ output_bvb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which) ...@@ -6990,7 +6993,7 @@ output_bvb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which)
else else
strcat (buf, " {%0,.+%4|%0,%%sar,.+%4}"); strcat (buf, " {%0,.+%4|%0,%%sar,.+%4}");
output_asm_insn (buf, operands); output_asm_insn (buf, operands);
return output_lbranch (negated ? operands[3] : operands[2], return pa_output_lbranch (negated ? operands[3] : operands[2],
insn, xdelay); insn, xdelay);
} }
return buf; return buf;
...@@ -7001,7 +7004,7 @@ output_bvb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which) ...@@ -7001,7 +7004,7 @@ output_bvb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which)
Note it may perform some output operations on its own before Note it may perform some output operations on its own before
returning the final output string. */ returning the final output string. */
const char * const char *
output_dbra (rtx *operands, rtx insn, int which_alternative) pa_output_dbra (rtx *operands, rtx insn, int which_alternative)
{ {
int length = get_attr_length (insn); int length = get_attr_length (insn);
...@@ -7080,7 +7083,7 @@ output_dbra (rtx *operands, rtx insn, int which_alternative) ...@@ -7080,7 +7083,7 @@ output_dbra (rtx *operands, rtx insn, int which_alternative)
default: default:
/* The reversed conditional branch must branch over one additional /* The reversed conditional branch must branch over one additional
instruction if the delay slot is filled and needs to be extracted instruction if the delay slot is filled and needs to be extracted
by output_lbranch. If the delay slot is empty or this is a by pa_output_lbranch. If the delay slot is empty or this is a
nullified forward branch, the instruction after the reversed nullified forward branch, the instruction after the reversed
condition branch must be nullified. */ condition branch must be nullified. */
if (dbr_sequence_length () == 0 if (dbr_sequence_length () == 0
...@@ -7101,7 +7104,7 @@ output_dbra (rtx *operands, rtx insn, int which_alternative) ...@@ -7101,7 +7104,7 @@ output_dbra (rtx *operands, rtx insn, int which_alternative)
else else
output_asm_insn ("addib,%N2 %1,%0,.+%4", operands); output_asm_insn ("addib,%N2 %1,%0,.+%4", operands);
return output_lbranch (operands[3], insn, xdelay); return pa_output_lbranch (operands[3], insn, xdelay);
} }
} }
...@@ -7123,7 +7126,7 @@ output_dbra (rtx *operands, rtx insn, int which_alternative) ...@@ -7123,7 +7126,7 @@ output_dbra (rtx *operands, rtx insn, int which_alternative)
operands[5] = GEN_INT (length - 16); operands[5] = GEN_INT (length - 16);
output_asm_insn ("{comb|cmpb},%B2 %%r0,%4,.+%5", operands); output_asm_insn ("{comb|cmpb},%B2 %%r0,%4,.+%5", operands);
output_asm_insn ("{fldws|fldw} -16(%%r30),%0", operands); output_asm_insn ("{fldws|fldw} -16(%%r30),%0", operands);
return output_lbranch (operands[3], insn, 0); return pa_output_lbranch (operands[3], insn, 0);
} }
} }
/* Deal with gross reload from memory case. */ /* Deal with gross reload from memory case. */
...@@ -7140,7 +7143,7 @@ output_dbra (rtx *operands, rtx insn, int which_alternative) ...@@ -7140,7 +7143,7 @@ output_dbra (rtx *operands, rtx insn, int which_alternative)
{ {
operands[5] = GEN_INT (length - 4); operands[5] = GEN_INT (length - 4);
output_asm_insn ("addib,%N2 %1,%4,.+%5\n\tstw %4,%0", operands); output_asm_insn ("addib,%N2 %1,%4,.+%5\n\tstw %4,%0", operands);
return output_lbranch (operands[3], insn, 0); return pa_output_lbranch (operands[3], insn, 0);
} }
} }
} }
...@@ -7150,7 +7153,7 @@ output_dbra (rtx *operands, rtx insn, int which_alternative) ...@@ -7150,7 +7153,7 @@ output_dbra (rtx *operands, rtx insn, int which_alternative)
Note it may perform some output operations on its own before Note it may perform some output operations on its own before
returning the final output string. */ returning the final output string. */
const char * const char *
output_movb (rtx *operands, rtx insn, int which_alternative, pa_output_movb (rtx *operands, rtx insn, int which_alternative,
int reverse_comparison) int reverse_comparison)
{ {
int length = get_attr_length (insn); int length = get_attr_length (insn);
...@@ -7231,7 +7234,7 @@ output_movb (rtx *operands, rtx insn, int which_alternative, ...@@ -7231,7 +7234,7 @@ output_movb (rtx *operands, rtx insn, int which_alternative,
default: default:
/* The reversed conditional branch must branch over one additional /* The reversed conditional branch must branch over one additional
instruction if the delay slot is filled and needs to be extracted instruction if the delay slot is filled and needs to be extracted
by output_lbranch. If the delay slot is empty or this is a by pa_output_lbranch. If the delay slot is empty or this is a
nullified forward branch, the instruction after the reversed nullified forward branch, the instruction after the reversed
condition branch must be nullified. */ condition branch must be nullified. */
if (dbr_sequence_length () == 0 if (dbr_sequence_length () == 0
...@@ -7252,7 +7255,7 @@ output_movb (rtx *operands, rtx insn, int which_alternative, ...@@ -7252,7 +7255,7 @@ output_movb (rtx *operands, rtx insn, int which_alternative,
else else
output_asm_insn ("movb,%N2 %1,%0,.+%4", operands); output_asm_insn ("movb,%N2 %1,%0,.+%4", operands);
return output_lbranch (operands[3], insn, xdelay); return pa_output_lbranch (operands[3], insn, xdelay);
} }
} }
/* Deal with gross reload for FP destination register case. */ /* Deal with gross reload for FP destination register case. */
...@@ -7271,7 +7274,7 @@ output_movb (rtx *operands, rtx insn, int which_alternative, ...@@ -7271,7 +7274,7 @@ output_movb (rtx *operands, rtx insn, int which_alternative,
operands[4] = GEN_INT (length - 4); operands[4] = GEN_INT (length - 4);
output_asm_insn ("{comb|cmpb},%B2 %%r0,%1,.+%4", operands); output_asm_insn ("{comb|cmpb},%B2 %%r0,%1,.+%4", operands);
output_asm_insn ("{fldws|fldw} -16(%%r30),%0", operands); output_asm_insn ("{fldws|fldw} -16(%%r30),%0", operands);
return output_lbranch (operands[3], insn, 0); return pa_output_lbranch (operands[3], insn, 0);
} }
} }
/* Deal with gross reload from memory case. */ /* Deal with gross reload from memory case. */
...@@ -7288,7 +7291,7 @@ output_movb (rtx *operands, rtx insn, int which_alternative, ...@@ -7288,7 +7291,7 @@ output_movb (rtx *operands, rtx insn, int which_alternative,
operands[4] = GEN_INT (length); operands[4] = GEN_INT (length);
output_asm_insn ("{comb|cmpb},%B2 %%r0,%1,.+%4\n\tstw %1,%0", output_asm_insn ("{comb|cmpb},%B2 %%r0,%1,.+%4\n\tstw %1,%0",
operands); operands);
return output_lbranch (operands[3], insn, 0); return pa_output_lbranch (operands[3], insn, 0);
} }
} }
/* Handle SAR as a destination. */ /* Handle SAR as a destination. */
...@@ -7303,7 +7306,7 @@ output_movb (rtx *operands, rtx insn, int which_alternative, ...@@ -7303,7 +7306,7 @@ output_movb (rtx *operands, rtx insn, int which_alternative,
operands[4] = GEN_INT (length); operands[4] = GEN_INT (length);
output_asm_insn ("{comb|cmpb},%B2 %%r0,%1,.+%4\n\tmtsar %r1", output_asm_insn ("{comb|cmpb},%B2 %%r0,%1,.+%4\n\tmtsar %r1",
operands); operands);
return output_lbranch (operands[3], insn, 0); return pa_output_lbranch (operands[3], insn, 0);
} }
} }
} }
...@@ -7385,12 +7388,12 @@ length_fp_args (rtx insn) ...@@ -7385,12 +7388,12 @@ length_fp_args (rtx insn)
} }
/* Return the attribute length for the millicode call instruction INSN. /* Return the attribute length for the millicode call instruction INSN.
The length must match the code generated by output_millicode_call. The length must match the code generated by pa_output_millicode_call.
We include the delay slot in the returned length as it is better to We include the delay slot in the returned length as it is better to
over estimate the length than to under estimate it. */ over estimate the length than to under estimate it. */
int int
attr_length_millicode_call (rtx insn) pa_attr_length_millicode_call (rtx insn)
{ {
unsigned long distance = -1; unsigned long distance = -1;
unsigned long total = IN_NAMED_SECTION_P (cfun->decl) ? 0 : total_code_bytes; unsigned long total = IN_NAMED_SECTION_P (cfun->decl) ? 0 : total_code_bytes;
...@@ -7429,7 +7432,7 @@ attr_length_millicode_call (rtx insn) ...@@ -7429,7 +7432,7 @@ attr_length_millicode_call (rtx insn)
CALL_DEST is the routine we are calling. */ CALL_DEST is the routine we are calling. */
const char * const char *
output_millicode_call (rtx insn, rtx call_dest) pa_output_millicode_call (rtx insn, rtx call_dest)
{ {
int attr_length = get_attr_length (insn); int attr_length = get_attr_length (insn);
int seq_length = dbr_sequence_length (); int seq_length = dbr_sequence_length ();
...@@ -7577,7 +7580,7 @@ output_millicode_call (rtx insn, rtx call_dest) ...@@ -7577,7 +7580,7 @@ output_millicode_call (rtx insn, rtx call_dest)
/* Return the attribute length of the call instruction INSN. The SIBCALL /* Return the attribute length of the call instruction INSN. The SIBCALL
flag indicates whether INSN is a regular call or a sibling call. The flag indicates whether INSN is a regular call or a sibling call. The
length returned must be longer than the code actually generated by length returned must be longer than the code actually generated by
output_call. Since branch shortening is done before delay branch pa_output_call. Since branch shortening is done before delay branch
sequencing, there is no way to determine whether or not the delay sequencing, there is no way to determine whether or not the delay
slot will be filled during branch shortening. Even when the delay slot will be filled during branch shortening. Even when the delay
slot is filled, we may have to add a nop if the delay slot contains slot is filled, we may have to add a nop if the delay slot contains
...@@ -7588,7 +7591,7 @@ output_millicode_call (rtx insn, rtx call_dest) ...@@ -7588,7 +7591,7 @@ output_millicode_call (rtx insn, rtx call_dest)
these sequences. */ these sequences. */
int int
attr_length_call (rtx insn, int sibcall) pa_attr_length_call (rtx insn, int sibcall)
{ {
int local_call; int local_call;
rtx call, call_dest; rtx call, call_dest;
...@@ -7678,7 +7681,7 @@ attr_length_call (rtx insn, int sibcall) ...@@ -7678,7 +7681,7 @@ attr_length_call (rtx insn, int sibcall)
CALL_DEST is the routine we are calling. */ CALL_DEST is the routine we are calling. */
const char * const char *
output_call (rtx insn, rtx call_dest, int sibcall) pa_output_call (rtx insn, rtx call_dest, int sibcall)
{ {
int delay_insn_deleted = 0; int delay_insn_deleted = 0;
int delay_slot_filled = 0; int delay_slot_filled = 0;
...@@ -7692,7 +7695,7 @@ output_call (rtx insn, rtx call_dest, int sibcall) ...@@ -7692,7 +7695,7 @@ output_call (rtx insn, rtx call_dest, int sibcall)
/* Handle the common case where we're sure that the branch will reach /* Handle the common case where we're sure that the branch will reach
the beginning of the "$CODE$" subspace. This is the beginning of the beginning of the "$CODE$" subspace. This is the beginning of
the current function if we are in a named section. */ the current function if we are in a named section. */
if (!TARGET_LONG_CALLS && attr_length_call (insn, sibcall) == 8) if (!TARGET_LONG_CALLS && pa_attr_length_call (insn, sibcall) == 8)
{ {
xoperands[1] = gen_rtx_REG (word_mode, sibcall ? 0 : 2); xoperands[1] = gen_rtx_REG (word_mode, sibcall ? 0 : 2);
output_asm_insn ("{bl|b,l} %0,%1", xoperands); output_asm_insn ("{bl|b,l} %0,%1", xoperands);
...@@ -7704,7 +7707,7 @@ output_call (rtx insn, rtx call_dest, int sibcall) ...@@ -7704,7 +7707,7 @@ output_call (rtx insn, rtx call_dest, int sibcall)
/* ??? As far as I can tell, the HP linker doesn't support the /* ??? As far as I can tell, the HP linker doesn't support the
long pc-relative sequence described in the 64-bit runtime long pc-relative sequence described in the 64-bit runtime
architecture. So, we use a slightly longer indirect call. */ architecture. So, we use a slightly longer indirect call. */
xoperands[0] = get_deferred_plabel (call_dest); xoperands[0] = pa_get_deferred_plabel (call_dest);
xoperands[1] = gen_label_rtx (); xoperands[1] = gen_label_rtx ();
/* If this isn't a sibcall, we put the load of %r27 into the /* If this isn't a sibcall, we put the load of %r27 into the
...@@ -7830,7 +7833,7 @@ output_call (rtx insn, rtx call_dest, int sibcall) ...@@ -7830,7 +7833,7 @@ output_call (rtx insn, rtx call_dest, int sibcall)
essentially an inline implementation of $$dyncall. essentially an inline implementation of $$dyncall.
We don't actually try to call $$dyncall as this is We don't actually try to call $$dyncall as this is
as difficult as calling the function itself. */ as difficult as calling the function itself. */
xoperands[0] = get_deferred_plabel (call_dest); xoperands[0] = pa_get_deferred_plabel (call_dest);
xoperands[1] = gen_label_rtx (); xoperands[1] = gen_label_rtx ();
/* Since the call is indirect, FP arguments in registers /* Since the call is indirect, FP arguments in registers
...@@ -7967,7 +7970,7 @@ output_call (rtx insn, rtx call_dest, int sibcall) ...@@ -7967,7 +7970,7 @@ output_call (rtx insn, rtx call_dest, int sibcall)
the sequence itself. */ the sequence itself. */
int int
attr_length_indirect_call (rtx insn) pa_attr_length_indirect_call (rtx insn)
{ {
unsigned long distance = -1; unsigned long distance = -1;
unsigned long total = IN_NAMED_SECTION_P (cfun->decl) ? 0 : total_code_bytes; unsigned long total = IN_NAMED_SECTION_P (cfun->decl) ? 0 : total_code_bytes;
...@@ -7999,7 +8002,7 @@ attr_length_indirect_call (rtx insn) ...@@ -7999,7 +8002,7 @@ attr_length_indirect_call (rtx insn)
} }
const char * const char *
output_indirect_call (rtx insn, rtx call_dest) pa_output_indirect_call (rtx insn, rtx call_dest)
{ {
rtx xoperands[1]; rtx xoperands[1];
...@@ -8020,7 +8023,7 @@ output_indirect_call (rtx insn, rtx call_dest) ...@@ -8020,7 +8023,7 @@ output_indirect_call (rtx insn, rtx call_dest)
No need to check target flags as the length uniquely identifies No need to check target flags as the length uniquely identifies
the remaining cases. */ the remaining cases. */
if (attr_length_indirect_call (insn) == 8) if (pa_attr_length_indirect_call (insn) == 8)
{ {
/* The HP linker sometimes substitutes a BLE for BL/B,L calls to /* The HP linker sometimes substitutes a BLE for BL/B,L calls to
$$dyncall. Since BLE uses %r31 as the link register, the 22-bit $$dyncall. Since BLE uses %r31 as the link register, the 22-bit
...@@ -8033,11 +8036,11 @@ output_indirect_call (rtx insn, rtx call_dest) ...@@ -8033,11 +8036,11 @@ output_indirect_call (rtx insn, rtx call_dest)
/* Long millicode call, but we are not generating PIC or portable runtime /* Long millicode call, but we are not generating PIC or portable runtime
code. */ code. */
if (attr_length_indirect_call (insn) == 12) if (pa_attr_length_indirect_call (insn) == 12)
return ".CALL\tARGW0=GR\n\tldil L'$$dyncall,%%r2\n\tble R'$$dyncall(%%sr4,%%r2)\n\tcopy %%r31,%%r2"; return ".CALL\tARGW0=GR\n\tldil L'$$dyncall,%%r2\n\tble R'$$dyncall(%%sr4,%%r2)\n\tcopy %%r31,%%r2";
/* Long millicode call for portable runtime. */ /* Long millicode call for portable runtime. */
if (attr_length_indirect_call (insn) == 20) if (pa_attr_length_indirect_call (insn) == 20)
return "ldil L'$$dyncall,%%r31\n\tldo R'$$dyncall(%%r31),%%r31\n\tblr %%r0,%%r2\n\tbv,n %%r0(%%r31)\n\tnop"; return "ldil L'$$dyncall,%%r31\n\tldo R'$$dyncall(%%r31),%%r31\n\tblr %%r0,%%r2\n\tbv,n %%r0(%%r31)\n\tnop";
/* We need a long PIC call to $$dyncall. */ /* We need a long PIC call to $$dyncall. */
...@@ -8062,28 +8065,13 @@ output_indirect_call (rtx insn, rtx call_dest) ...@@ -8062,28 +8065,13 @@ output_indirect_call (rtx insn, rtx call_dest)
return ""; return "";
} }
/* Return the total length of the save and restore instructions needed for
the data linkage table pointer (i.e., the PIC register) across the call
instruction INSN. No-return calls do not require a save and restore.
In addition, we may be able to avoid the save and restore for calls
within the same translation unit. */
int
attr_length_save_restore_dltp (rtx insn)
{
if (find_reg_note (insn, REG_NORETURN, NULL_RTX))
return 0;
return 8;
}
/* In HPUX 8.0's shared library scheme, special relocations are needed /* In HPUX 8.0's shared library scheme, special relocations are needed
for function labels if they might be passed to a function for function labels if they might be passed to a function
in a shared library (because shared libraries don't live in code in a shared library (because shared libraries don't live in code
space), and special magic is needed to construct their address. */ space), and special magic is needed to construct their address. */
void void
hppa_encode_label (rtx sym) pa_encode_label (rtx sym)
{ {
const char *str = XSTR (sym, 0); const char *str = XSTR (sym, 0);
int len = strlen (str) + 1; int len = strlen (str) + 1;
...@@ -8111,7 +8099,7 @@ pa_encode_section_info (tree decl, rtx rtl, int first) ...@@ -8111,7 +8099,7 @@ pa_encode_section_info (tree decl, rtx rtl, int first)
{ {
SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1; SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1;
if (TREE_CODE (decl) == FUNCTION_DECL) if (TREE_CODE (decl) == FUNCTION_DECL)
hppa_encode_label (XEXP (rtl, 0)); pa_encode_label (XEXP (rtl, 0));
} }
else if (old_referenced) else if (old_referenced)
SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= old_referenced; SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= old_referenced;
...@@ -8131,7 +8119,7 @@ pa_strip_name_encoding (const char *str) ...@@ -8131,7 +8119,7 @@ pa_strip_name_encoding (const char *str)
with a constant. Used to keep certain patterns from matching with a constant. Used to keep certain patterns from matching
during instruction combination. */ during instruction combination. */
int int
is_function_label_plus_const (rtx op) pa_is_function_label_plus_const (rtx op)
{ {
/* Strip off any CONST. */ /* Strip off any CONST. */
if (GET_CODE (op) == CONST) if (GET_CODE (op) == CONST)
...@@ -8427,7 +8415,7 @@ pa_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED) ...@@ -8427,7 +8415,7 @@ pa_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED)
single subspace mode and the call is not indirect. As far as I know, single subspace mode and the call is not indirect. As far as I know,
there is no operating system support for the multiple subspace mode. there is no operating system support for the multiple subspace mode.
It might be possible to support indirect calls if we didn't use It might be possible to support indirect calls if we didn't use
$$dyncall (see the indirect sequence generated in output_call). */ $$dyncall (see the indirect sequence generated in pa_output_call). */
if (TARGET_ELF32) if (TARGET_ELF32)
return (decl != NULL_TREE); return (decl != NULL_TREE);
...@@ -8459,7 +8447,7 @@ pa_commutative_p (const_rtx x, int outer_code) ...@@ -8459,7 +8447,7 @@ pa_commutative_p (const_rtx x, int outer_code)
/* Returns 1 if the 6 operands specified in OPERANDS are suitable for /* Returns 1 if the 6 operands specified in OPERANDS are suitable for
use in fmpyadd instructions. */ use in fmpyadd instructions. */
int int
fmpyaddoperands (rtx *operands) pa_fmpyaddoperands (rtx *operands)
{ {
enum machine_mode mode = GET_MODE (operands[0]); enum machine_mode mode = GET_MODE (operands[0]);
...@@ -8519,7 +8507,7 @@ static void ...@@ -8519,7 +8507,7 @@ static void
pa_asm_out_constructor (rtx symbol, int priority) pa_asm_out_constructor (rtx symbol, int priority)
{ {
if (!function_label_operand (symbol, VOIDmode)) if (!function_label_operand (symbol, VOIDmode))
hppa_encode_label (symbol); pa_encode_label (symbol);
#ifdef CTORS_SECTION_ASM_OP #ifdef CTORS_SECTION_ASM_OP
default_ctor_section_asm_out_constructor (symbol, priority); default_ctor_section_asm_out_constructor (symbol, priority);
...@@ -8536,7 +8524,7 @@ static void ...@@ -8536,7 +8524,7 @@ static void
pa_asm_out_destructor (rtx symbol, int priority) pa_asm_out_destructor (rtx symbol, int priority)
{ {
if (!function_label_operand (symbol, VOIDmode)) if (!function_label_operand (symbol, VOIDmode))
hppa_encode_label (symbol); pa_encode_label (symbol);
#ifdef DTORS_SECTION_ASM_OP #ifdef DTORS_SECTION_ASM_OP
default_dtor_section_asm_out_destructor (symbol, priority); default_dtor_section_asm_out_destructor (symbol, priority);
...@@ -8637,7 +8625,7 @@ pa_asm_output_aligned_local (FILE *stream, ...@@ -8637,7 +8625,7 @@ pa_asm_output_aligned_local (FILE *stream,
/* Returns 1 if the 6 operands specified in OPERANDS are suitable for /* Returns 1 if the 6 operands specified in OPERANDS are suitable for
use in fmpysub instructions. */ use in fmpysub instructions. */
int int
fmpysuboperands (rtx *operands) pa_fmpysuboperands (rtx *operands)
{ {
enum machine_mode mode = GET_MODE (operands[0]); enum machine_mode mode = GET_MODE (operands[0]);
...@@ -8693,7 +8681,7 @@ fmpysuboperands (rtx *operands) ...@@ -8693,7 +8681,7 @@ fmpysuboperands (rtx *operands)
/* Return 1 if the given constant is 2, 4, or 8. These are the valid /* Return 1 if the given constant is 2, 4, or 8. These are the valid
constants for shadd instructions. */ constants for shadd instructions. */
int int
shadd_constant_p (int val) pa_shadd_constant_p (int val)
{ {
if (val == 2 || val == 4 || val == 8) if (val == 2 || val == 4 || val == 8)
return 1; return 1;
...@@ -8727,7 +8715,7 @@ forward_branch_p (rtx insn) ...@@ -8727,7 +8715,7 @@ forward_branch_p (rtx insn)
/* Return 1 if INSN is in the delay slot of a call instruction. */ /* Return 1 if INSN is in the delay slot of a call instruction. */
int int
jump_in_call_delay (rtx insn) pa_jump_in_call_delay (rtx insn)
{ {
if (GET_CODE (insn) != JUMP_INSN) if (GET_CODE (insn) != JUMP_INSN)
...@@ -8750,7 +8738,7 @@ jump_in_call_delay (rtx insn) ...@@ -8750,7 +8738,7 @@ jump_in_call_delay (rtx insn)
/* Output an unconditional move and branch insn. */ /* Output an unconditional move and branch insn. */
const char * const char *
output_parallel_movb (rtx *operands, rtx insn) pa_output_parallel_movb (rtx *operands, rtx insn)
{ {
int length = get_attr_length (insn); int length = get_attr_length (insn);
...@@ -8784,13 +8772,13 @@ output_parallel_movb (rtx *operands, rtx insn) ...@@ -8784,13 +8772,13 @@ output_parallel_movb (rtx *operands, rtx insn)
output_asm_insn ("ldi %1,%0", operands); output_asm_insn ("ldi %1,%0", operands);
else else
output_asm_insn ("copy %1,%0", operands); output_asm_insn ("copy %1,%0", operands);
return output_lbranch (operands[2], insn, 1); return pa_output_lbranch (operands[2], insn, 1);
} }
/* Output an unconditional add and branch insn. */ /* Output an unconditional add and branch insn. */
const char * const char *
output_parallel_addb (rtx *operands, rtx insn) pa_output_parallel_addb (rtx *operands, rtx insn)
{ {
int length = get_attr_length (insn); int length = get_attr_length (insn);
...@@ -8816,7 +8804,7 @@ output_parallel_addb (rtx *operands, rtx insn) ...@@ -8816,7 +8804,7 @@ output_parallel_addb (rtx *operands, rtx insn)
} }
output_asm_insn ("add%I1 %1,%0,%0", operands); output_asm_insn ("add%I1 %1,%0,%0", operands);
return output_lbranch (operands[3], insn, 1); return pa_output_lbranch (operands[3], insn, 1);
} }
/* Return nonzero if INSN (a jump insn) immediately follows a call /* Return nonzero if INSN (a jump insn) immediately follows a call
...@@ -8825,7 +8813,7 @@ output_parallel_addb (rtx *operands, rtx insn) ...@@ -8825,7 +8813,7 @@ output_parallel_addb (rtx *operands, rtx insn)
the delay slot of the call. */ the delay slot of the call. */
int int
following_call (rtx insn) pa_following_call (rtx insn)
{ {
if (! TARGET_JUMP_IN_DELAY) if (! TARGET_JUMP_IN_DELAY)
return 0; return 0;
...@@ -9288,7 +9276,7 @@ pa_can_combine_p (rtx new_rtx, rtx anchor, rtx floater, int reversed, rtx dest, ...@@ -9288,7 +9276,7 @@ pa_can_combine_p (rtx new_rtx, rtx anchor, rtx floater, int reversed, rtx dest,
filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
in particular. */ in particular. */
int int
insn_refs_are_delayed (rtx insn) pa_insn_refs_are_delayed (rtx insn)
{ {
return ((GET_CODE (insn) == INSN return ((GET_CODE (insn) == INSN
&& GET_CODE (PATTERN (insn)) != SEQUENCE && GET_CODE (PATTERN (insn)) != SEQUENCE
...@@ -10191,7 +10179,7 @@ pa_initial_elimination_offset (int from, int to) ...@@ -10191,7 +10179,7 @@ pa_initial_elimination_offset (int from, int to)
if ((from == HARD_FRAME_POINTER_REGNUM || from == FRAME_POINTER_REGNUM) if ((from == HARD_FRAME_POINTER_REGNUM || from == FRAME_POINTER_REGNUM)
&& to == STACK_POINTER_REGNUM) && to == STACK_POINTER_REGNUM)
offset = -compute_frame_size (get_frame_size (), 0); offset = -pa_compute_frame_size (get_frame_size (), 0);
else if (from == FRAME_POINTER_REGNUM && to == HARD_FRAME_POINTER_REGNUM) else if (from == FRAME_POINTER_REGNUM && to == HARD_FRAME_POINTER_REGNUM)
offset = 0; offset = 0;
else else
...@@ -10295,7 +10283,7 @@ pa_legitimate_constant_p (enum machine_mode mode, rtx x) ...@@ -10295,7 +10283,7 @@ pa_legitimate_constant_p (enum machine_mode mode, rtx x)
&& !reload_in_progress && !reload_in_progress
&& !reload_completed && !reload_completed
&& !LEGITIMATE_64BIT_CONST_INT_P (INTVAL (x)) && !LEGITIMATE_64BIT_CONST_INT_P (INTVAL (x))
&& !cint_ok_for_move (INTVAL (x))) && !pa_cint_ok_for_move (INTVAL (x)))
return false; return false;
if (function_label_operand (x, mode)) if (function_label_operand (x, mode))
......
gcc/config/pa/pa.h
...@@ -162,11 +162,11 @@ extern unsigned long total_code_bytes; ...@@ -162,11 +162,11 @@ extern unsigned long total_code_bytes;
the stack pointer at the function's entry. Yuk! */ the stack pointer at the function's entry. Yuk! */
#define DEBUGGER_AUTO_OFFSET(X) \ #define DEBUGGER_AUTO_OFFSET(X) \
((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \ ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
+ (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0))) + (frame_pointer_needed ? 0 : pa_compute_frame_size (get_frame_size (), 0)))
#define DEBUGGER_ARG_OFFSET(OFFSET, X) \ #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
((GET_CODE (X) == PLUS ? OFFSET : 0) \ ((GET_CODE (X) == PLUS ? OFFSET : 0) \
+ (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0))) + (frame_pointer_needed ? 0 : pa_compute_frame_size (get_frame_size (), 0)))
#define TARGET_CPU_CPP_BUILTINS() \ #define TARGET_CPU_CPP_BUILTINS() \
do { \ do { \
...@@ -457,7 +457,7 @@ extern rtx hppa_pic_save_rtx (void); ...@@ -457,7 +457,7 @@ extern rtx hppa_pic_save_rtx (void);
{ \ { \
fputs (integer_asm_op (SIZE, FALSE), FILE); \ fputs (integer_asm_op (SIZE, FALSE), FILE); \
if ((ENCODING) & DW_EH_PE_indirect) \ if ((ENCODING) & DW_EH_PE_indirect) \
output_addr_const (FILE, get_deferred_plabel (ADDR)); \ output_addr_const (FILE, pa_get_deferred_plabel (ADDR)); \
else \ else \
assemble_name (FILE, XSTR ((ADDR), 0)); \ assemble_name (FILE, XSTR ((ADDR), 0)); \
fputs ("+8-$PIC_pcrel$0", FILE); \ fputs ("+8-$PIC_pcrel$0", FILE); \
...@@ -661,7 +661,8 @@ struct hppa_args {int words, nargs_prototype, incoming, indirect; }; ...@@ -661,7 +661,8 @@ struct hppa_args {int words, nargs_prototype, incoming, indirect; };
/* If defined, a C expression which determines whether, and in which /* If defined, a C expression which determines whether, and in which
direction, to pad out an argument with extra space. */ direction, to pad out an argument with extra space. */
#define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE)) #define FUNCTION_ARG_PADDING(MODE, TYPE) \
pa_function_arg_padding ((MODE), (TYPE))
/* Specify padding for the last element of a block move between registers /* Specify padding for the last element of a block move between registers
and memory. and memory.
...@@ -673,7 +674,7 @@ struct hppa_args {int words, nargs_prototype, incoming, indirect; }; ...@@ -673,7 +674,7 @@ struct hppa_args {int words, nargs_prototype, incoming, indirect; };
so that there is only one element. This allows the object to be so that there is only one element. This allows the object to be
correctly padded. */ correctly padded. */
#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \ #define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
function_arg_padding ((MODE), (TYPE)) pa_function_arg_padding ((MODE), (TYPE))
/* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than /* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
...@@ -793,7 +794,8 @@ extern int may_call_alloca; ...@@ -793,7 +794,8 @@ extern int may_call_alloca;
|| (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (X)) \ || (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (X)) \
|| GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
|| GET_CODE (X) == HIGH) \ || GET_CODE (X) == HIGH) \
&& (reload_in_progress || reload_completed || ! symbolic_expression_p (X))) && (reload_in_progress || reload_completed \
|| ! pa_symbolic_expression_p (X)))
/* A C expression that is nonzero if we are using the new HP assembler. */ /* A C expression that is nonzero if we are using the new HP assembler. */
...@@ -926,7 +928,7 @@ extern int may_call_alloca; ...@@ -926,7 +928,7 @@ extern int may_call_alloca;
the REG_POINTER lossage can be fixed, it seems better canonicalize. the REG_POINTER lossage can be fixed, it seems better canonicalize.
We initially break out scaled indexed addresses in canonical order We initially break out scaled indexed addresses in canonical order
in emit_move_sequence. LEGITIMIZE_ADDRESS also canonicalizes in pa_emit_move_sequence. LEGITIMIZE_ADDRESS also canonicalizes
scaled indexed addresses during RTL generation. However, fold_rtx scaled indexed addresses during RTL generation. However, fold_rtx
has its own opinion on how the operands of a PLUS should be ordered. has its own opinion on how the operands of a PLUS should be ordered.
If one of the operands is equivalent to a constant, it will make If one of the operands is equivalent to a constant, it will make
...@@ -1183,7 +1185,7 @@ do { \ ...@@ -1183,7 +1185,7 @@ do { \
(TREE_CODE (DECL) == FUNCTION_DECL \ (TREE_CODE (DECL) == FUNCTION_DECL \
|| (TREE_CODE (DECL) == VAR_DECL \ || (TREE_CODE (DECL) == VAR_DECL \
&& TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \ && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
&& (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \ && (! DECL_INITIAL (DECL) || ! pa_reloc_needed (DECL_INITIAL (DECL))) \
&& !flag_pic) \ && !flag_pic) \
|| CONSTANT_CLASS_P (DECL)) || CONSTANT_CLASS_P (DECL))
...@@ -1290,7 +1292,7 @@ do { \ ...@@ -1290,7 +1292,7 @@ do { \
get_attr_type will try to recognize the given insn, so make sure to get_attr_type will try to recognize the given insn, so make sure to
filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
in particular. */ in particular. */
#define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X)) #define INSN_REFERENCES_ARE_DELAYED(X) (pa_insn_refs_are_delayed (X))
/* Control the assembler format that we output. */ /* Control the assembler format that we output. */
...@@ -1368,7 +1370,7 @@ do { \ ...@@ -1368,7 +1370,7 @@ do { \
#define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label #define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label
#define ASM_OUTPUT_ASCII(FILE, P, SIZE) \ #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
output_ascii ((FILE), (P), (SIZE)) pa_output_ascii ((FILE), (P), (SIZE))
/* Jump tables are always placed in the text section. Technically, it /* Jump tables are always placed in the text section. Technically, it
is possible to put them in the readonly data section when -mbig-switch is possible to put them in the readonly data section when -mbig-switch
...@@ -1452,7 +1454,7 @@ do { \ ...@@ -1452,7 +1454,7 @@ do { \
M modifier to handle preincrement addressing for memory refs. M modifier to handle preincrement addressing for memory refs.
F modifier to handle preincrement addressing for fp memory refs */ F modifier to handle preincrement addressing for fp memory refs */
#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) #define PRINT_OPERAND(FILE, X, CODE) pa_print_operand (FILE, X, CODE)
/* Print a memory address as an operand to reference that memory location. */ /* Print a memory address as an operand to reference that memory location. */
...@@ -1476,7 +1478,7 @@ do { \ ...@@ -1476,7 +1478,7 @@ do { \
fputs ("RR'", FILE); \ fputs ("RR'", FILE); \
else \ else \
fputs ("RT'", FILE); \ fputs ("RT'", FILE); \
output_global_address (FILE, XEXP (addr, 1), 0); \ pa_output_global_address (FILE, XEXP (addr, 1), 0); \
fputs ("(", FILE); \ fputs ("(", FILE); \
output_operand (XEXP (addr, 0), 0); \ output_operand (XEXP (addr, 0), 0); \
fputs (")", FILE); \ fputs (")", FILE); \
...@@ -1492,7 +1494,7 @@ do { \ ...@@ -1492,7 +1494,7 @@ do { \
/* Find the return address associated with the frame given by /* Find the return address associated with the frame given by
FRAMEADDR. */ FRAMEADDR. */
#define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \ #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
(return_addr_rtx (COUNT, FRAMEADDR)) (pa_return_addr_rtx (COUNT, FRAMEADDR))
/* Used to mask out junk bits from the return address, such as /* Used to mask out junk bits from the return address, such as
processor state, interrupt status, condition codes and the like. */ processor state, interrupt status, condition codes and the like. */
......
gcc/config/pa/pa.md
...@@ -180,7 +180,7 @@ ...@@ -180,7 +180,7 @@
(attr_flag "backward"))]) (attr_flag "backward"))])
(define_delay (and (eq_attr "type" "uncond_branch") (define_delay (and (eq_attr "type" "uncond_branch")
(not (match_test "following_call (insn)"))) (not (match_test "pa_following_call (insn)")))
[(eq_attr "in_branch_delay" "true") (nil) (nil)]) [(eq_attr "in_branch_delay" "true") (nil) (nil)])
;; Memory. Disregarding Cache misses, the Mustang memory times are: ;; Memory. Disregarding Cache misses, the Mustang memory times are:
...@@ -286,14 +286,14 @@ ...@@ -286,14 +286,14 @@
;; We have a bypass for all computations in the FP unit which feed an ;; We have a bypass for all computations in the FP unit which feed an
;; FP store as long as the sizes are the same. ;; FP store as long as the sizes are the same.
(define_bypass 2 "W1,W2" "W10,W11" "hppa_fpstore_bypass_p") (define_bypass 2 "W1,W2" "W10,W11" "pa_fpstore_bypass_p")
(define_bypass 9 "W3" "W10,W11" "hppa_fpstore_bypass_p") (define_bypass 9 "W3" "W10,W11" "pa_fpstore_bypass_p")
(define_bypass 11 "W4" "W10,W11" "hppa_fpstore_bypass_p") (define_bypass 11 "W4" "W10,W11" "pa_fpstore_bypass_p")
(define_bypass 13 "W5" "W10,W11" "hppa_fpstore_bypass_p") (define_bypass 13 "W5" "W10,W11" "pa_fpstore_bypass_p")
(define_bypass 17 "W6" "W10,W11" "hppa_fpstore_bypass_p") (define_bypass 17 "W6" "W10,W11" "pa_fpstore_bypass_p")
;; We have an "anti-bypass" for FP loads which feed an FP store. ;; We have an "anti-bypass" for FP loads which feed an FP store.
(define_bypass 4 "W8,W12" "W10,W11" "hppa_fpstore_bypass_p") (define_bypass 4 "W8,W12" "W10,W11" "pa_fpstore_bypass_p")
;; Function units for the 7100 and 7150. The 7100/7150 can dual-issue ;; Function units for the 7100 and 7150. The 7100/7150 can dual-issue
;; floating point computations with non-floating point computations (fp loads ;; floating point computations with non-floating point computations (fp loads
...@@ -382,12 +382,12 @@ ...@@ -382,12 +382,12 @@
;; We have a bypass for all computations in the FP unit which feed an ;; We have a bypass for all computations in the FP unit which feed an
;; FP store as long as the sizes are the same. ;; FP store as long as the sizes are the same.
(define_bypass 1 "X0" "X6,X7" "hppa_fpstore_bypass_p") (define_bypass 1 "X0" "X6,X7" "pa_fpstore_bypass_p")
(define_bypass 7 "X1" "X6,X7" "hppa_fpstore_bypass_p") (define_bypass 7 "X1" "X6,X7" "pa_fpstore_bypass_p")
(define_bypass 14 "X2" "X6,X7" "hppa_fpstore_bypass_p") (define_bypass 14 "X2" "X6,X7" "pa_fpstore_bypass_p")
;; We have an "anti-bypass" for FP loads which feed an FP store. ;; We have an "anti-bypass" for FP loads which feed an FP store.
(define_bypass 3 "X4,X8" "X6,X7" "hppa_fpstore_bypass_p") (define_bypass 3 "X4,X8" "X6,X7" "pa_fpstore_bypass_p")
;; The 7100LC has three floating-point units: ALU, MUL, and DIV. ;; The 7100LC has three floating-point units: ALU, MUL, and DIV.
;; There's no value in modeling the ALU and MUL separately though ;; There's no value in modeling the ALU and MUL separately though
...@@ -543,7 +543,7 @@ ...@@ -543,7 +543,7 @@
"i1_7100lc,i1_7100lc+mem_7100lc") "i1_7100lc,i1_7100lc+mem_7100lc")
;; We have an "anti-bypass" for FP loads which feed an FP store. ;; We have an "anti-bypass" for FP loads which feed an FP store.
(define_bypass 3 "Y3,Y7,Y13,Y17" "Y5,Y6,Y11,Y12,Y15,Y16" "hppa_fpstore_bypass_p") (define_bypass 3 "Y3,Y7,Y13,Y17" "Y5,Y6,Y11,Y12,Y15,Y16" "pa_fpstore_bypass_p")
;; Scheduling for the PA8000 is somewhat different than scheduling for a ;; Scheduling for the PA8000 is somewhat different than scheduling for a
;; traditional architecture. ;; traditional architecture.
...@@ -1301,7 +1301,7 @@ ...@@ -1301,7 +1301,7 @@
"" ""
" "
{ {
emit_bcond_fp (operands); pa_emit_bcond_fp (operands);
DONE; DONE;
}") }")
...@@ -1316,7 +1316,7 @@ ...@@ -1316,7 +1316,7 @@
"" ""
" "
{ {
emit_bcond_fp (operands); pa_emit_bcond_fp (operands);
DONE; DONE;
}") }")
...@@ -1336,7 +1336,7 @@ ...@@ -1336,7 +1336,7 @@
"" ""
"* "*
{ {
return output_cbranch (operands, 0, insn); return pa_output_cbranch (operands, 0, insn);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1365,7 +1365,7 @@ ...@@ -1365,7 +1365,7 @@
"" ""
"* "*
{ {
return output_cbranch (operands, 1, insn); return pa_output_cbranch (operands, 1, insn);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1392,7 +1392,7 @@ ...@@ -1392,7 +1392,7 @@
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
return output_cbranch (operands, 0, insn); return pa_output_cbranch (operands, 0, insn);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1421,7 +1421,7 @@ ...@@ -1421,7 +1421,7 @@
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
return output_cbranch (operands, 1, insn); return pa_output_cbranch (operands, 1, insn);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1447,7 +1447,7 @@ ...@@ -1447,7 +1447,7 @@
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
return output_cbranch (operands, 0, insn); return pa_output_cbranch (operands, 0, insn);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1476,7 +1476,7 @@ ...@@ -1476,7 +1476,7 @@
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
return output_cbranch (operands, 1, insn); return pa_output_cbranch (operands, 1, insn);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1505,7 +1505,7 @@ ...@@ -1505,7 +1505,7 @@
"" ""
"* "*
{ {
return output_bb (operands, 0, insn, 0); return pa_output_bb (operands, 0, insn, 0);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1533,7 +1533,7 @@ ...@@ -1533,7 +1533,7 @@
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
return output_bb (operands, 0, insn, 0); return pa_output_bb (operands, 0, insn, 0);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1561,7 +1561,7 @@ ...@@ -1561,7 +1561,7 @@
"" ""
"* "*
{ {
return output_bb (operands, 1, insn, 0); return pa_output_bb (operands, 1, insn, 0);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1589,7 +1589,7 @@ ...@@ -1589,7 +1589,7 @@
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
return output_bb (operands, 1, insn, 0); return pa_output_bb (operands, 1, insn, 0);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1617,7 +1617,7 @@ ...@@ -1617,7 +1617,7 @@
"" ""
"* "*
{ {
return output_bb (operands, 0, insn, 1); return pa_output_bb (operands, 0, insn, 1);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1645,7 +1645,7 @@ ...@@ -1645,7 +1645,7 @@
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
return output_bb (operands, 0, insn, 1); return pa_output_bb (operands, 0, insn, 1);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1673,7 +1673,7 @@ ...@@ -1673,7 +1673,7 @@
"" ""
"* "*
{ {
return output_bb (operands, 1, insn, 1); return pa_output_bb (operands, 1, insn, 1);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1701,7 +1701,7 @@ ...@@ -1701,7 +1701,7 @@
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
return output_bb (operands, 1, insn, 1); return pa_output_bb (operands, 1, insn, 1);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1730,7 +1730,7 @@ ...@@ -1730,7 +1730,7 @@
"" ""
"* "*
{ {
return output_bvb (operands, 0, insn, 0); return pa_output_bvb (operands, 0, insn, 0);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1758,7 +1758,7 @@ ...@@ -1758,7 +1758,7 @@
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
return output_bvb (operands, 0, insn, 0); return pa_output_bvb (operands, 0, insn, 0);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1786,7 +1786,7 @@ ...@@ -1786,7 +1786,7 @@
"" ""
"* "*
{ {
return output_bvb (operands, 1, insn, 0); return pa_output_bvb (operands, 1, insn, 0);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1814,7 +1814,7 @@ ...@@ -1814,7 +1814,7 @@
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
return output_bvb (operands, 1, insn, 0); return pa_output_bvb (operands, 1, insn, 0);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1842,7 +1842,7 @@ ...@@ -1842,7 +1842,7 @@
"" ""
"* "*
{ {
return output_bvb (operands, 0, insn, 1); return pa_output_bvb (operands, 0, insn, 1);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1870,7 +1870,7 @@ ...@@ -1870,7 +1870,7 @@
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
return output_bvb (operands, 0, insn, 1); return pa_output_bvb (operands, 0, insn, 1);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1898,7 +1898,7 @@ ...@@ -1898,7 +1898,7 @@
"" ""
"* "*
{ {
return output_bvb (operands, 1, insn, 1); return pa_output_bvb (operands, 1, insn, 1);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1926,7 +1926,7 @@ ...@@ -1926,7 +1926,7 @@
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
return output_bvb (operands, 1, insn, 1); return pa_output_bvb (operands, 1, insn, 1);
}" }"
[(set_attr "type" "cbranch") [(set_attr "type" "cbranch")
(set (attr "length") (set (attr "length")
...@@ -1978,7 +1978,7 @@ ...@@ -1978,7 +1978,7 @@
output_asm_insn (\"ftest\;add,tr %%r0,%%r0,%%r0\;b,n .+%0\", xoperands); output_asm_insn (\"ftest\;add,tr %%r0,%%r0,%%r0\;b,n .+%0\", xoperands);
else else
output_asm_insn (\"ftest\;add,tr %%r0,%%r0,%%r0\;b .+%0\", xoperands); output_asm_insn (\"ftest\;add,tr %%r0,%%r0,%%r0\;b .+%0\", xoperands);
return output_lbranch (operands[0], insn, xdelay); return pa_output_lbranch (operands[0], insn, xdelay);
}" }"
[(set_attr "type" "fbranch") [(set_attr "type" "fbranch")
(set (attr "length") (set (attr "length")
...@@ -2022,7 +2022,7 @@ ...@@ -2022,7 +2022,7 @@
output_asm_insn (\"ftest\;b,n .+%0\", xoperands); output_asm_insn (\"ftest\;b,n .+%0\", xoperands);
else else
output_asm_insn (\"ftest\;b .+%0\", xoperands); output_asm_insn (\"ftest\;b .+%0\", xoperands);
return output_lbranch (operands[0], insn, xdelay); return pa_output_lbranch (operands[0], insn, xdelay);
}" }"
[(set_attr "type" "fbranch") [(set_attr "type" "fbranch")
(set (attr "length") (set (attr "length")
...@@ -2043,7 +2043,7 @@ ...@@ -2043,7 +2043,7 @@
"" ""
" "
{ {
if (emit_move_sequence (operands, SImode, 0)) if (pa_emit_move_sequence (operands, SImode, 0))
DONE; DONE;
}") }")
...@@ -2055,7 +2055,7 @@ ...@@ -2055,7 +2055,7 @@
"" ""
" "
{ {
if (emit_move_sequence (operands, SImode, operands[2])) if (pa_emit_move_sequence (operands, SImode, operands[2]))
DONE; DONE;
/* We don't want the clobber emitted, so handle this ourselves. */ /* We don't want the clobber emitted, so handle this ourselves. */
...@@ -2072,7 +2072,7 @@ ...@@ -2072,7 +2072,7 @@
"" ""
" "
{ {
if (emit_move_sequence (operands, SImode, operands[2])) if (pa_emit_move_sequence (operands, SImode, operands[2]))
DONE; DONE;
/* We don't want the clobber emitted, so handle this ourselves. */ /* We don't want the clobber emitted, so handle this ourselves. */
...@@ -2089,7 +2089,7 @@ ...@@ -2089,7 +2089,7 @@
"" ""
" "
{ {
if (emit_move_sequence (operands, SImode, operands[2])) if (pa_emit_move_sequence (operands, SImode, operands[2]))
DONE; DONE;
/* We don't want the clobber emitted, so handle this ourselves. */ /* We don't want the clobber emitted, so handle this ourselves. */
...@@ -2624,7 +2624,7 @@ ...@@ -2624,7 +2624,7 @@
[(set (match_operand:SI 0 "register_operand" "=r") [(set (match_operand:SI 0 "register_operand" "=r")
(high:SI (match_operand 1 "" "")))] (high:SI (match_operand 1 "" "")))]
"(!flag_pic || !symbolic_operand (operands[1], Pmode)) "(!flag_pic || !symbolic_operand (operands[1], Pmode))
&& !is_function_label_plus_const (operands[1])" && !pa_is_function_label_plus_const (operands[1])"
"* "*
{ {
if (symbolic_operand (operands[1], Pmode)) if (symbolic_operand (operands[1], Pmode))
...@@ -2656,7 +2656,7 @@ ...@@ -2656,7 +2656,7 @@
[(set (match_operand:SI 0 "register_operand" "=r") [(set (match_operand:SI 0 "register_operand" "=r")
(lo_sum:SI (match_operand:SI 1 "register_operand" "r") (lo_sum:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "immediate_operand" "i")))] (match_operand:SI 2 "immediate_operand" "i")))]
"!is_function_label_plus_const (operands[2])" "!pa_is_function_label_plus_const (operands[2])"
"* "*
{ {
gcc_assert (!flag_pic || !symbolic_operand (operands[2], Pmode)); gcc_assert (!flag_pic || !symbolic_operand (operands[2], Pmode));
...@@ -2735,7 +2735,7 @@ ...@@ -2735,7 +2735,7 @@
"" ""
" "
{ {
if (emit_move_sequence (operands, HImode, 0)) if (pa_emit_move_sequence (operands, HImode, 0))
DONE; DONE;
}") }")
...@@ -2748,7 +2748,7 @@ ...@@ -2748,7 +2748,7 @@
"" ""
" "
{ {
if (emit_move_sequence (operands, HImode, operands[2])) if (pa_emit_move_sequence (operands, HImode, operands[2]))
DONE; DONE;
/* We don't want the clobber emitted, so handle this ourselves. */ /* We don't want the clobber emitted, so handle this ourselves. */
...@@ -2765,7 +2765,7 @@ ...@@ -2765,7 +2765,7 @@
"" ""
" "
{ {
if (emit_move_sequence (operands, HImode, operands[2])) if (pa_emit_move_sequence (operands, HImode, operands[2]))
DONE; DONE;
/* We don't want the clobber emitted, so handle this ourselves. */ /* We don't want the clobber emitted, so handle this ourselves. */
...@@ -2893,7 +2893,7 @@ ...@@ -2893,7 +2893,7 @@
"" ""
" "
{ {
if (emit_move_sequence (operands, QImode, 0)) if (pa_emit_move_sequence (operands, QImode, 0))
DONE; DONE;
}") }")
...@@ -2906,7 +2906,7 @@ ...@@ -2906,7 +2906,7 @@
"" ""
" "
{ {
if (emit_move_sequence (operands, QImode, operands[2])) if (pa_emit_move_sequence (operands, QImode, operands[2]))
DONE; DONE;
/* We don't want the clobber emitted, so handle this ourselves. */ /* We don't want the clobber emitted, so handle this ourselves. */
...@@ -2923,7 +2923,7 @@ ...@@ -2923,7 +2923,7 @@
"" ""
" "
{ {
if (emit_move_sequence (operands, QImode, operands[2])) if (pa_emit_move_sequence (operands, QImode, operands[2]))
DONE; DONE;
/* We don't want the clobber emitted, so handle this ourselves. */ /* We don't want the clobber emitted, so handle this ourselves. */
...@@ -3121,7 +3121,7 @@ ...@@ -3121,7 +3121,7 @@
}") }")
;; The operand constraints are written like this to support both compile-time ;; The operand constraints are written like this to support both compile-time
;; and run-time determined byte counts. The expander and output_block_move ;; and run-time determined byte counts. The expander and pa_output_block_move
;; only support compile-time determined counts at this time. ;; only support compile-time determined counts at this time.
;; ;;
;; If the count is run-time determined, the register with the byte count ;; If the count is run-time determined, the register with the byte count
...@@ -3238,7 +3238,7 @@ ...@@ -3238,7 +3238,7 @@
(use (match_operand:SI 5 "const_int_operand" "n,n")) ;alignment (use (match_operand:SI 5 "const_int_operand" "n,n")) ;alignment
(const_int 0)] (const_int 0)]
"!TARGET_64BIT && reload_completed" "!TARGET_64BIT && reload_completed"
"* return output_block_move (operands, !which_alternative);" "* return pa_output_block_move (operands, !which_alternative);"
[(set_attr "type" "multi,multi")]) [(set_attr "type" "multi,multi")])
(define_expand "movmemdi" (define_expand "movmemdi"
...@@ -3309,7 +3309,7 @@ ...@@ -3309,7 +3309,7 @@
}") }")
;; The operand constraints are written like this to support both compile-time ;; The operand constraints are written like this to support both compile-time
;; and run-time determined byte counts. The expander and output_block_move ;; and run-time determined byte counts. The expander and pa_output_block_move
;; only support compile-time determined counts at this time. ;; only support compile-time determined counts at this time.
;; ;;
;; If the count is run-time determined, the register with the byte count ;; If the count is run-time determined, the register with the byte count
...@@ -3426,7 +3426,7 @@ ...@@ -3426,7 +3426,7 @@
(use (match_operand:DI 5 "const_int_operand" "n,n")) ;alignment (use (match_operand:DI 5 "const_int_operand" "n,n")) ;alignment
(const_int 0)] (const_int 0)]
"TARGET_64BIT && reload_completed" "TARGET_64BIT && reload_completed"
"* return output_block_move (operands, !which_alternative);" "* return pa_output_block_move (operands, !which_alternative);"
[(set_attr "type" "multi,multi")]) [(set_attr "type" "multi,multi")])
(define_expand "setmemsi" (define_expand "setmemsi"
...@@ -3540,7 +3540,7 @@ ...@@ -3540,7 +3540,7 @@
(use (match_operand:SI 3 "const_int_operand" "n,n")) ;alignment (use (match_operand:SI 3 "const_int_operand" "n,n")) ;alignment
(const_int 0)] (const_int 0)]
"!TARGET_64BIT && reload_completed" "!TARGET_64BIT && reload_completed"
"* return output_block_clear (operands, !which_alternative);" "* return pa_output_block_clear (operands, !which_alternative);"
[(set_attr "type" "multi,multi")]) [(set_attr "type" "multi,multi")])
(define_expand "setmemdi" (define_expand "setmemdi"
...@@ -3654,7 +3654,7 @@ ...@@ -3654,7 +3654,7 @@
(use (match_operand:DI 3 "const_int_operand" "n,n")) ;alignment (use (match_operand:DI 3 "const_int_operand" "n,n")) ;alignment
(const_int 0)] (const_int 0)]
"TARGET_64BIT && reload_completed" "TARGET_64BIT && reload_completed"
"* return output_block_clear (operands, !which_alternative);" "* return pa_output_block_clear (operands, !which_alternative);"
[(set_attr "type" "multi,multi")]) [(set_attr "type" "multi,multi")])
;; Floating point move insns ;; Floating point move insns
...@@ -3675,7 +3675,7 @@ ...@@ -3675,7 +3675,7 @@
&& operands[1] != CONST0_RTX (DFmode) && operands[1] != CONST0_RTX (DFmode)
&& !TARGET_64BIT && !TARGET_64BIT
&& !TARGET_SOFT_FLOAT" && !TARGET_SOFT_FLOAT"
"* return (which_alternative == 0 ? output_move_double (operands) "* return (which_alternative == 0 ? pa_output_move_double (operands)
: \"fldd%F1 %1,%0\");" : \"fldd%F1 %1,%0\");"
[(set_attr "type" "move,fpload") [(set_attr "type" "move,fpload")
(set_attr "length" "16,4")]) (set_attr "length" "16,4")])
...@@ -3701,7 +3701,7 @@ ...@@ -3701,7 +3701,7 @@
operands[1] = force_const_mem (DFmode, operands[1]); operands[1] = force_const_mem (DFmode, operands[1]);
} }
if (emit_move_sequence (operands, DFmode, 0)) if (pa_emit_move_sequence (operands, DFmode, 0))
DONE; DONE;
}") }")
...@@ -3714,7 +3714,7 @@ ...@@ -3714,7 +3714,7 @@
"" ""
" "
{ {
if (emit_move_sequence (operands, DFmode, operands[2])) if (pa_emit_move_sequence (operands, DFmode, operands[2]))
DONE; DONE;
/* We don't want the clobber emitted, so handle this ourselves. */ /* We don't want the clobber emitted, so handle this ourselves. */
...@@ -3731,7 +3731,7 @@ ...@@ -3731,7 +3731,7 @@
"" ""
" "
{ {
if (emit_move_sequence (operands, DFmode, operands[2])) if (pa_emit_move_sequence (operands, DFmode, operands[2]))
DONE; DONE;
/* We don't want the clobber emitted, so handle this ourselves. */ /* We don't want the clobber emitted, so handle this ourselves. */
...@@ -3756,8 +3756,8 @@ ...@@ -3756,8 +3756,8 @@
|| operands[1] == CONST0_RTX (DFmode)) || operands[1] == CONST0_RTX (DFmode))
&& !(REG_P (operands[0]) && REG_P (operands[1]) && !(REG_P (operands[0]) && REG_P (operands[1])
&& FP_REG_P (operands[0]) ^ FP_REG_P (operands[1]))) && FP_REG_P (operands[0]) ^ FP_REG_P (operands[1])))
return output_fp_move_double (operands); return pa_output_fp_move_double (operands);
return output_move_double (operands); return pa_output_move_double (operands);
}" }"
[(set_attr "type" "fpalu,move,fpstore,store,store,fpload,load,load,fpstore_load,store_fpload") [(set_attr "type" "fpalu,move,fpstore,store,store,fpload,load,load,fpstore_load,store_fpload")
(set_attr "length" "4,8,4,8,16,4,8,16,12,12")]) (set_attr "length" "4,8,4,8,16,4,8,16,12,12")])
...@@ -3924,7 +3924,7 @@ ...@@ -3924,7 +3924,7 @@
&& TARGET_SOFT_FLOAT" && TARGET_SOFT_FLOAT"
"* "*
{ {
return output_move_double (operands); return pa_output_move_double (operands);
}" }"
[(set_attr "type" "move,store,store,load,load") [(set_attr "type" "move,store,store,load,load")
(set_attr "length" "8,8,16,8,16")]) (set_attr "length" "8,8,16,8,16")])
...@@ -3970,7 +3970,7 @@ ...@@ -3970,7 +3970,7 @@
&& REGNO (operands[0]) >= 32) && REGNO (operands[0]) >= 32)
FAIL; FAIL;
if (emit_move_sequence (operands, DImode, 0)) if (pa_emit_move_sequence (operands, DImode, 0))
DONE; DONE;
}") }")
...@@ -3982,7 +3982,7 @@ ...@@ -3982,7 +3982,7 @@
"" ""
" "
{ {
if (emit_move_sequence (operands, DImode, operands[2])) if (pa_emit_move_sequence (operands, DImode, operands[2]))
DONE; DONE;
/* We don't want the clobber emitted, so handle this ourselves. */ /* We don't want the clobber emitted, so handle this ourselves. */
...@@ -3999,7 +3999,7 @@ ...@@ -3999,7 +3999,7 @@
"" ""
" "
{ {
if (emit_move_sequence (operands, DImode, operands[2])) if (pa_emit_move_sequence (operands, DImode, operands[2]))
DONE; DONE;
/* We don't want the clobber emitted, so handle this ourselves. */ /* We don't want the clobber emitted, so handle this ourselves. */
...@@ -4016,7 +4016,7 @@ ...@@ -4016,7 +4016,7 @@
"" ""
" "
{ {
if (emit_move_sequence (operands, DImode, operands[2])) if (pa_emit_move_sequence (operands, DImode, operands[2]))
DONE; DONE;
/* We don't want the clobber emitted, so handle this ourselves. */ /* We don't want the clobber emitted, so handle this ourselves. */
...@@ -4052,7 +4052,7 @@ ...@@ -4052,7 +4052,7 @@
operands[0] = operand_subword (op0, 0, 0, DImode); operands[0] = operand_subword (op0, 0, 0, DImode);
operands[1] = GEN_INT (INTVAL (op1) >> 32); operands[1] = GEN_INT (INTVAL (op1) >> 32);
output_asm_insn (singlemove_string (operands), operands); output_asm_insn (pa_singlemove_string (operands), operands);
#endif #endif
break; break;
...@@ -4063,7 +4063,7 @@ ...@@ -4063,7 +4063,7 @@
operands[0] = operand_subword (op0, 0, 0, DImode); operands[0] = operand_subword (op0, 0, 0, DImode);
operands[1] = GEN_INT (CONST_DOUBLE_HIGH (op1)); operands[1] = GEN_INT (CONST_DOUBLE_HIGH (op1));
output_asm_insn (singlemove_string (operands), operands); output_asm_insn (pa_singlemove_string (operands), operands);
break; break;
default: default:
...@@ -4089,8 +4089,8 @@ ...@@ -4089,8 +4089,8 @@
|| operands[1] == CONST0_RTX (DFmode)) || operands[1] == CONST0_RTX (DFmode))
&& !(REG_P (operands[0]) && REG_P (operands[1]) && !(REG_P (operands[0]) && REG_P (operands[1])
&& FP_REG_P (operands[0]) ^ FP_REG_P (operands[1]))) && FP_REG_P (operands[0]) ^ FP_REG_P (operands[1])))
return output_fp_move_double (operands); return pa_output_fp_move_double (operands);
return output_move_double (operands); return pa_output_move_double (operands);
}" }"
[(set_attr "type" [(set_attr "type"
"move,store,store,load,load,multi,fpalu,fpload,fpstore,fpstore_load,store_fpload") "move,store,store,load,load,multi,fpalu,fpload,fpstore,fpstore_load,store_fpload")
...@@ -4216,7 +4216,7 @@ ...@@ -4216,7 +4216,7 @@
&& TARGET_SOFT_FLOAT" && TARGET_SOFT_FLOAT"
"* "*
{ {
return output_move_double (operands); return pa_output_move_double (operands);
}" }"
[(set_attr "type" "move,store,store,load,load,multi") [(set_attr "type" "move,store,store,load,load,multi")
(set_attr "length" "8,8,16,8,16,16")]) (set_attr "length" "8,8,16,8,16,16")])
...@@ -4257,7 +4257,7 @@ ...@@ -4257,7 +4257,7 @@
"GET_CODE (operands[1]) == CONST_DOUBLE "GET_CODE (operands[1]) == CONST_DOUBLE
&& operands[1] != CONST0_RTX (SFmode) && operands[1] != CONST0_RTX (SFmode)
&& ! TARGET_SOFT_FLOAT" && ! TARGET_SOFT_FLOAT"
"* return (which_alternative == 0 ? singlemove_string (operands) "* return (which_alternative == 0 ? pa_singlemove_string (operands)
: \" fldw%F1 %1,%0\");" : \" fldw%F1 %1,%0\");"
[(set_attr "type" "move,fpload") [(set_attr "type" "move,fpload")
(set_attr "length" "8,4")]) (set_attr "length" "8,4")])
...@@ -4276,7 +4276,7 @@ ...@@ -4276,7 +4276,7 @@
&& REGNO (operands[0]) >= 32) && REGNO (operands[0]) >= 32)
FAIL; FAIL;
if (emit_move_sequence (operands, SFmode, 0)) if (pa_emit_move_sequence (operands, SFmode, 0))
DONE; DONE;
}") }")
...@@ -4289,7 +4289,7 @@ ...@@ -4289,7 +4289,7 @@
"" ""
" "
{ {
if (emit_move_sequence (operands, SFmode, operands[2])) if (pa_emit_move_sequence (operands, SFmode, operands[2]))
DONE; DONE;
/* We don't want the clobber emitted, so handle this ourselves. */ /* We don't want the clobber emitted, so handle this ourselves. */
...@@ -4306,7 +4306,7 @@ ...@@ -4306,7 +4306,7 @@
"" ""
" "
{ {
if (emit_move_sequence (operands, SFmode, operands[2])) if (pa_emit_move_sequence (operands, SFmode, operands[2]))
DONE; DONE;
/* We don't want the clobber emitted, so handle this ourselves. */ /* We don't want the clobber emitted, so handle this ourselves. */
...@@ -5026,7 +5026,7 @@ ...@@ -5026,7 +5026,7 @@
(plus:SI (match_operand:SI 1 "register_operand" "") (plus:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "const_int_operand" ""))) (match_operand:SI 2 "const_int_operand" "")))
(clobber (match_operand:SI 4 "register_operand" ""))] (clobber (match_operand:SI 4 "register_operand" ""))]
"! cint_ok_for_move (INTVAL (operands[2])) "! pa_cint_ok_for_move (INTVAL (operands[2]))
&& VAL_14_BITS_P (INTVAL (operands[2]) >> 1)" && VAL_14_BITS_P (INTVAL (operands[2]) >> 1)"
[(set (match_dup 4) (plus:SI (match_dup 1) (match_dup 2))) [(set (match_dup 4) (plus:SI (match_dup 1) (match_dup 2)))
(set (match_dup 0) (plus:SI (match_dup 4) (match_dup 3)))] (set (match_dup 0) (plus:SI (match_dup 4) (match_dup 3)))]
...@@ -5045,7 +5045,7 @@ ...@@ -5045,7 +5045,7 @@
(plus:SI (match_operand:SI 1 "register_operand" "") (plus:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "const_int_operand" ""))) (match_operand:SI 2 "const_int_operand" "")))
(clobber (match_operand:SI 4 "register_operand" ""))] (clobber (match_operand:SI 4 "register_operand" ""))]
"! cint_ok_for_move (INTVAL (operands[2]))" "! pa_cint_ok_for_move (INTVAL (operands[2]))"
[(set (match_dup 4) (match_dup 2)) [(set (match_dup 4) (match_dup 2))
(set (match_dup 0) (plus:SI (mult:SI (match_dup 4) (match_dup 3)) (set (match_dup 0) (plus:SI (mult:SI (match_dup 4) (match_dup 3))
(match_dup 1)))] (match_dup 1)))]
...@@ -5055,26 +5055,26 @@ ...@@ -5055,26 +5055,26 @@
/* Try dividing the constant by 2, then 4, and finally 8 to see /* Try dividing the constant by 2, then 4, and finally 8 to see
if we can get a constant which can be loaded into a register if we can get a constant which can be loaded into a register
in a single instruction (cint_ok_for_move). in a single instruction (pa_cint_ok_for_move).
If that fails, try to negate the constant and subtract it If that fails, try to negate the constant and subtract it
from our input operand. */ from our input operand. */
if (intval % 2 == 0 && cint_ok_for_move (intval / 2)) if (intval % 2 == 0 && pa_cint_ok_for_move (intval / 2))
{ {
operands[2] = GEN_INT (intval / 2); operands[2] = GEN_INT (intval / 2);
operands[3] = const2_rtx; operands[3] = const2_rtx;
} }
else if (intval % 4 == 0 && cint_ok_for_move (intval / 4)) else if (intval % 4 == 0 && pa_cint_ok_for_move (intval / 4))
{ {
operands[2] = GEN_INT (intval / 4); operands[2] = GEN_INT (intval / 4);
operands[3] = GEN_INT (4); operands[3] = GEN_INT (4);
} }
else if (intval % 8 == 0 && cint_ok_for_move (intval / 8)) else if (intval % 8 == 0 && pa_cint_ok_for_move (intval / 8))
{ {
operands[2] = GEN_INT (intval / 8); operands[2] = GEN_INT (intval / 8);
operands[3] = GEN_INT (8); operands[3] = GEN_INT (8);
} }
else if (cint_ok_for_move (-intval)) else if (pa_cint_ok_for_move (-intval))
{ {
emit_insn (gen_rtx_SET (VOIDmode, operands[4], GEN_INT (-intval))); emit_insn (gen_rtx_SET (VOIDmode, operands[4], GEN_INT (-intval)));
emit_insn (gen_subsi3 (operands[0], operands[1], operands[4])); emit_insn (gen_subsi3 (operands[0], operands[1], operands[4]));
...@@ -5328,9 +5328,9 @@ ...@@ -5328,9 +5328,9 @@
(clobber (reg:SI 25)) (clobber (reg:SI 25))
(clobber (reg:SI 31))] (clobber (reg:SI 31))]
"!TARGET_64BIT" "!TARGET_64BIT"
"* return output_mul_insn (0, insn);" "* return pa_output_mul_insn (0, insn);"
[(set_attr "type" "milli") [(set_attr "type" "milli")
(set (attr "length") (symbol_ref "attr_length_millicode_call (insn)"))]) (set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
(define_insn "" (define_insn ""
[(set (reg:SI 29) (mult:SI (reg:SI 26) (reg:SI 25))) [(set (reg:SI 29) (mult:SI (reg:SI 26) (reg:SI 25)))
...@@ -5339,9 +5339,9 @@ ...@@ -5339,9 +5339,9 @@
(clobber (reg:SI 25)) (clobber (reg:SI 25))
(clobber (reg:SI 2))] (clobber (reg:SI 2))]
"TARGET_64BIT" "TARGET_64BIT"
"* return output_mul_insn (0, insn);" "* return pa_output_mul_insn (0, insn);"
[(set_attr "type" "milli") [(set_attr "type" "milli")
(set (attr "length") (symbol_ref "attr_length_millicode_call (insn)"))]) (set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
(define_expand "muldi3" (define_expand "muldi3"
[(set (match_operand:DI 0 "register_operand" "") [(set (match_operand:DI 0 "register_operand" "")
...@@ -5416,7 +5416,7 @@ ...@@ -5416,7 +5416,7 @@
operands[5] = gen_rtx_REG (SImode, 31); operands[5] = gen_rtx_REG (SImode, 31);
operands[4] = gen_reg_rtx (SImode); operands[4] = gen_reg_rtx (SImode);
} }
if (GET_CODE (operands[2]) == CONST_INT && emit_hpdiv_const (operands, 0)) if (GET_CODE (operands[2]) == CONST_INT && pa_emit_hpdiv_const (operands, 0))
DONE; DONE;
}") }")
...@@ -5430,9 +5430,9 @@ ...@@ -5430,9 +5430,9 @@
(clobber (reg:SI 31))] (clobber (reg:SI 31))]
"!TARGET_64BIT" "!TARGET_64BIT"
"* "*
return output_div_insn (operands, 0, insn);" return pa_output_div_insn (operands, 0, insn);"
[(set_attr "type" "milli") [(set_attr "type" "milli")
(set (attr "length") (symbol_ref "attr_length_millicode_call (insn)"))]) (set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
(define_insn "" (define_insn ""
[(set (reg:SI 29) [(set (reg:SI 29)
...@@ -5444,9 +5444,9 @@ ...@@ -5444,9 +5444,9 @@
(clobber (reg:SI 2))] (clobber (reg:SI 2))]
"TARGET_64BIT" "TARGET_64BIT"
"* "*
return output_div_insn (operands, 0, insn);" return pa_output_div_insn (operands, 0, insn);"
[(set_attr "type" "milli") [(set_attr "type" "milli")
(set (attr "length") (symbol_ref "attr_length_millicode_call (insn)"))]) (set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
(define_expand "udivsi3" (define_expand "udivsi3"
[(set (reg:SI 26) (match_operand:SI 1 "move_src_operand" "")) [(set (reg:SI 26) (match_operand:SI 1 "move_src_operand" ""))
...@@ -5473,7 +5473,7 @@ ...@@ -5473,7 +5473,7 @@
operands[5] = gen_rtx_REG (SImode, 31); operands[5] = gen_rtx_REG (SImode, 31);
operands[4] = gen_reg_rtx (SImode); operands[4] = gen_reg_rtx (SImode);
} }
if (GET_CODE (operands[2]) == CONST_INT && emit_hpdiv_const (operands, 1)) if (GET_CODE (operands[2]) == CONST_INT && pa_emit_hpdiv_const (operands, 1))
DONE; DONE;
}") }")
...@@ -5487,9 +5487,9 @@ ...@@ -5487,9 +5487,9 @@
(clobber (reg:SI 31))] (clobber (reg:SI 31))]
"!TARGET_64BIT" "!TARGET_64BIT"
"* "*
return output_div_insn (operands, 1, insn);" return pa_output_div_insn (operands, 1, insn);"
[(set_attr "type" "milli") [(set_attr "type" "milli")
(set (attr "length") (symbol_ref "attr_length_millicode_call (insn)"))]) (set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
(define_insn "" (define_insn ""
[(set (reg:SI 29) [(set (reg:SI 29)
...@@ -5501,9 +5501,9 @@ ...@@ -5501,9 +5501,9 @@
(clobber (reg:SI 2))] (clobber (reg:SI 2))]
"TARGET_64BIT" "TARGET_64BIT"
"* "*
return output_div_insn (operands, 1, insn);" return pa_output_div_insn (operands, 1, insn);"
[(set_attr "type" "milli") [(set_attr "type" "milli")
(set (attr "length") (symbol_ref "attr_length_millicode_call (insn)"))]) (set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
(define_expand "modsi3" (define_expand "modsi3"
[(set (reg:SI 26) (match_operand:SI 1 "move_src_operand" "")) [(set (reg:SI 26) (match_operand:SI 1 "move_src_operand" ""))
...@@ -5540,9 +5540,9 @@ ...@@ -5540,9 +5540,9 @@
(clobber (reg:SI 31))] (clobber (reg:SI 31))]
"!TARGET_64BIT" "!TARGET_64BIT"
"* "*
return output_mod_insn (0, insn);" return pa_output_mod_insn (0, insn);"
[(set_attr "type" "milli") [(set_attr "type" "milli")
(set (attr "length") (symbol_ref "attr_length_millicode_call (insn)"))]) (set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
(define_insn "" (define_insn ""
[(set (reg:SI 29) (mod:SI (reg:SI 26) (reg:SI 25))) [(set (reg:SI 29) (mod:SI (reg:SI 26) (reg:SI 25)))
...@@ -5553,9 +5553,9 @@ ...@@ -5553,9 +5553,9 @@
(clobber (reg:SI 2))] (clobber (reg:SI 2))]
"TARGET_64BIT" "TARGET_64BIT"
"* "*
return output_mod_insn (0, insn);" return pa_output_mod_insn (0, insn);"
[(set_attr "type" "milli") [(set_attr "type" "milli")
(set (attr "length") (symbol_ref "attr_length_millicode_call (insn)"))]) (set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
(define_expand "umodsi3" (define_expand "umodsi3"
[(set (reg:SI 26) (match_operand:SI 1 "move_src_operand" "")) [(set (reg:SI 26) (match_operand:SI 1 "move_src_operand" ""))
...@@ -5592,9 +5592,9 @@ ...@@ -5592,9 +5592,9 @@
(clobber (reg:SI 31))] (clobber (reg:SI 31))]
"!TARGET_64BIT" "!TARGET_64BIT"
"* "*
return output_mod_insn (1, insn);" return pa_output_mod_insn (1, insn);"
[(set_attr "type" "milli") [(set_attr "type" "milli")
(set (attr "length") (symbol_ref "attr_length_millicode_call (insn)"))]) (set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
(define_insn "" (define_insn ""
[(set (reg:SI 29) (umod:SI (reg:SI 26) (reg:SI 25))) [(set (reg:SI 29) (umod:SI (reg:SI 26) (reg:SI 25)))
...@@ -5605,9 +5605,9 @@ ...@@ -5605,9 +5605,9 @@
(clobber (reg:SI 2))] (clobber (reg:SI 2))]
"TARGET_64BIT" "TARGET_64BIT"
"* "*
return output_mod_insn (1, insn);" return pa_output_mod_insn (1, insn);"
[(set_attr "type" "milli") [(set_attr "type" "milli")
(set (attr "length") (symbol_ref "attr_length_millicode_call (insn)"))]) (set (attr "length") (symbol_ref "pa_attr_length_millicode_call (insn)"))])
;;- and instructions ;;- and instructions
;; We define DImode `and` so with DImode `not` we can get ;; We define DImode `and` so with DImode `not` we can get
...@@ -5639,7 +5639,7 @@ ...@@ -5639,7 +5639,7 @@
(and:DI (match_operand:DI 1 "register_operand" "%?r,0") (and:DI (match_operand:DI 1 "register_operand" "%?r,0")
(match_operand:DI 2 "and_operand" "rO,P")))] (match_operand:DI 2 "and_operand" "rO,P")))]
"TARGET_64BIT" "TARGET_64BIT"
"* return output_64bit_and (operands); " "* return pa_output_64bit_and (operands); "
[(set_attr "type" "binary") [(set_attr "type" "binary")
(set_attr "length" "4")]) (set_attr "length" "4")])
...@@ -5650,7 +5650,7 @@ ...@@ -5650,7 +5650,7 @@
(and:SI (match_operand:SI 1 "register_operand" "%?r,0") (and:SI (match_operand:SI 1 "register_operand" "%?r,0")
(match_operand:SI 2 "and_operand" "rO,P")))] (match_operand:SI 2 "and_operand" "rO,P")))]
"" ""
"* return output_and (operands); " "* return pa_output_and (operands); "
[(set_attr "type" "binary,shift") [(set_attr "type" "binary,shift")
(set_attr "length" "4,4")]) (set_attr "length" "4,4")])
...@@ -5707,7 +5707,7 @@ ...@@ -5707,7 +5707,7 @@
(ior:DI (match_operand:DI 1 "register_operand" "0,0") (ior:DI (match_operand:DI 1 "register_operand" "0,0")
(match_operand:DI 2 "cint_ior_operand" "M,i")))] (match_operand:DI 2 "cint_ior_operand" "M,i")))]
"TARGET_64BIT" "TARGET_64BIT"
"* return output_64bit_ior (operands); " "* return pa_output_64bit_ior (operands); "
[(set_attr "type" "binary,shift") [(set_attr "type" "binary,shift")
(set_attr "length" "4,4")]) (set_attr "length" "4,4")])
...@@ -5733,7 +5733,7 @@ ...@@ -5733,7 +5733,7 @@
(ior:SI (match_operand:SI 1 "register_operand" "0,0") (ior:SI (match_operand:SI 1 "register_operand" "0,0")
(match_operand:SI 2 "cint_ior_operand" "M,i")))] (match_operand:SI 2 "cint_ior_operand" "M,i")))]
"" ""
"* return output_ior (operands); " "* return pa_output_ior (operands); "
[(set_attr "type" "binary,shift") [(set_attr "type" "binary,shift")
(set_attr "length" "4,4")]) (set_attr "length" "4,4")])
...@@ -6711,14 +6711,14 @@ ...@@ -6711,14 +6711,14 @@
(define_expand "prologue" (define_expand "prologue"
[(const_int 0)] [(const_int 0)]
"" ""
"hppa_expand_prologue ();DONE;") "pa_expand_prologue ();DONE;")
(define_expand "sibcall_epilogue" (define_expand "sibcall_epilogue"
[(return)] [(return)]
"" ""
" "
{ {
hppa_expand_epilogue (); pa_expand_epilogue ();
DONE; DONE;
}") }")
...@@ -6734,7 +6734,7 @@ ...@@ -6734,7 +6734,7 @@
x = gen_return (); x = gen_return ();
else else
{ {
hppa_expand_epilogue (); pa_expand_epilogue ();
/* EH returns bypass the normal return stub. Thus, we must do an /* EH returns bypass the normal return stub. Thus, we must do an
interspace branch to return from functions that call eh_return. interspace branch to return from functions that call eh_return.
...@@ -6808,12 +6808,12 @@ ...@@ -6808,12 +6808,12 @@
if (get_attr_length (insn) < 16) if (get_attr_length (insn) < 16)
return \"b%* %l0\"; return \"b%* %l0\";
return output_lbranch (operands[0], insn, 1); return pa_output_lbranch (operands[0], insn, 1);
}" }"
[(set_attr "type" "uncond_branch") [(set_attr "type" "uncond_branch")
(set_attr "pa_combine_type" "uncond_branch") (set_attr "pa_combine_type" "uncond_branch")
(set (attr "length") (set (attr "length")
(cond [(match_test "jump_in_call_delay (insn)") (cond [(match_test "pa_jump_in_call_delay (insn)")
(if_then_else (lt (abs (minus (match_dup 0) (if_then_else (lt (abs (minus (match_dup 0)
(plus (pc) (const_int 8)))) (plus (pc) (const_int 8))))
(const_int MAX_12BIT_OFFSET)) (const_int MAX_12BIT_OFFSET))
...@@ -7179,11 +7179,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -7179,11 +7179,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT" "!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT"
"* "*
{ {
output_arg_descriptor (insn); pa_output_arg_descriptor (insn);
return output_call (insn, operands[0], 0); return pa_output_call (insn, operands[0], 0);
}" }"
[(set_attr "type" "call") [(set_attr "type" "call")
(set (attr "length") (symbol_ref "attr_length_call (insn, 0)"))]) (set (attr "length") (symbol_ref "pa_attr_length_call (insn, 0)"))])
(define_insn "call_symref_pic" (define_insn "call_symref_pic"
[(set (match_operand:SI 2 "register_operand" "=&r") (reg:SI 19)) [(set (match_operand:SI 2 "register_operand" "=&r") (reg:SI 19))
...@@ -7256,11 +7256,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -7256,11 +7256,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT" "!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT"
"* "*
{ {
output_arg_descriptor (insn); pa_output_arg_descriptor (insn);
return output_call (insn, operands[0], 0); return pa_output_call (insn, operands[0], 0);
}" }"
[(set_attr "type" "call") [(set_attr "type" "call")
(set (attr "length") (symbol_ref "attr_length_call (insn, 0)"))]) (set (attr "length") (symbol_ref "pa_attr_length_call (insn, 0)"))])
;; This pattern is split if it is necessary to save and restore the ;; This pattern is split if it is necessary to save and restore the
;; PIC register. ;; PIC register.
...@@ -7341,11 +7341,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -7341,11 +7341,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
output_arg_descriptor (insn); pa_output_arg_descriptor (insn);
return output_call (insn, operands[0], 0); return pa_output_call (insn, operands[0], 0);
}" }"
[(set_attr "type" "call") [(set_attr "type" "call")
(set (attr "length") (symbol_ref "attr_length_call (insn, 0)"))]) (set (attr "length") (symbol_ref "pa_attr_length_call (insn, 0)"))])
(define_insn "call_reg" (define_insn "call_reg"
[(call (mem:SI (reg:SI 22)) [(call (mem:SI (reg:SI 22))
...@@ -7356,10 +7356,10 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -7356,10 +7356,10 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"!TARGET_64BIT" "!TARGET_64BIT"
"* "*
{ {
return output_indirect_call (insn, gen_rtx_REG (word_mode, 22)); return pa_output_indirect_call (insn, gen_rtx_REG (word_mode, 22));
}" }"
[(set_attr "type" "dyncall") [(set_attr "type" "dyncall")
(set (attr "length") (symbol_ref "attr_length_indirect_call (insn)"))]) (set (attr "length") (symbol_ref "pa_attr_length_indirect_call (insn)"))])
;; This pattern is split if it is necessary to save and restore the ;; This pattern is split if it is necessary to save and restore the
;; PIC register. ;; PIC register.
...@@ -7434,10 +7434,10 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -7434,10 +7434,10 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"!TARGET_64BIT" "!TARGET_64BIT"
"* "*
{ {
return output_indirect_call (insn, gen_rtx_REG (word_mode, 22)); return pa_output_indirect_call (insn, gen_rtx_REG (word_mode, 22));
}" }"
[(set_attr "type" "dyncall") [(set_attr "type" "dyncall")
(set (attr "length") (symbol_ref "attr_length_indirect_call (insn)"))]) (set (attr "length") (symbol_ref "pa_attr_length_indirect_call (insn)"))])
;; This pattern is split if it is necessary to save and restore the ;; This pattern is split if it is necessary to save and restore the
;; PIC register. ;; PIC register.
...@@ -7518,10 +7518,10 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -7518,10 +7518,10 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
return output_indirect_call (insn, operands[0]); return pa_output_indirect_call (insn, operands[0]);
}" }"
[(set_attr "type" "dyncall") [(set_attr "type" "dyncall")
(set (attr "length") (symbol_ref "attr_length_indirect_call (insn)"))]) (set (attr "length") (symbol_ref "pa_attr_length_indirect_call (insn)"))])
(define_expand "call_value" (define_expand "call_value"
[(parallel [(set (match_operand 0 "" "") [(parallel [(set (match_operand 0 "" "")
...@@ -7643,11 +7643,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -7643,11 +7643,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT" "!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT"
"* "*
{ {
output_arg_descriptor (insn); pa_output_arg_descriptor (insn);
return output_call (insn, operands[1], 0); return pa_output_call (insn, operands[1], 0);
}" }"
[(set_attr "type" "call") [(set_attr "type" "call")
(set (attr "length") (symbol_ref "attr_length_call (insn, 0)"))]) (set (attr "length") (symbol_ref "pa_attr_length_call (insn, 0)"))])
(define_insn "call_val_symref_pic" (define_insn "call_val_symref_pic"
[(set (match_operand:SI 3 "register_operand" "=&r") (reg:SI 19)) [(set (match_operand:SI 3 "register_operand" "=&r") (reg:SI 19))
...@@ -7726,11 +7726,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -7726,11 +7726,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT" "!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT"
"* "*
{ {
output_arg_descriptor (insn); pa_output_arg_descriptor (insn);
return output_call (insn, operands[1], 0); return pa_output_call (insn, operands[1], 0);
}" }"
[(set_attr "type" "call") [(set_attr "type" "call")
(set (attr "length") (symbol_ref "attr_length_call (insn, 0)"))]) (set (attr "length") (symbol_ref "pa_attr_length_call (insn, 0)"))])
;; This pattern is split if it is necessary to save and restore the ;; This pattern is split if it is necessary to save and restore the
;; PIC register. ;; PIC register.
...@@ -7817,11 +7817,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -7817,11 +7817,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
output_arg_descriptor (insn); pa_output_arg_descriptor (insn);
return output_call (insn, operands[1], 0); return pa_output_call (insn, operands[1], 0);
}" }"
[(set_attr "type" "call") [(set_attr "type" "call")
(set (attr "length") (symbol_ref "attr_length_call (insn, 0)"))]) (set (attr "length") (symbol_ref "pa_attr_length_call (insn, 0)"))])
(define_insn "call_val_reg" (define_insn "call_val_reg"
[(set (match_operand 0 "" "") [(set (match_operand 0 "" "")
...@@ -7833,10 +7833,10 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -7833,10 +7833,10 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"!TARGET_64BIT" "!TARGET_64BIT"
"* "*
{ {
return output_indirect_call (insn, gen_rtx_REG (word_mode, 22)); return pa_output_indirect_call (insn, gen_rtx_REG (word_mode, 22));
}" }"
[(set_attr "type" "dyncall") [(set_attr "type" "dyncall")
(set (attr "length") (symbol_ref "attr_length_indirect_call (insn)"))]) (set (attr "length") (symbol_ref "pa_attr_length_indirect_call (insn)"))])
;; This pattern is split if it is necessary to save and restore the ;; This pattern is split if it is necessary to save and restore the
;; PIC register. ;; PIC register.
...@@ -7917,10 +7917,10 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -7917,10 +7917,10 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"!TARGET_64BIT" "!TARGET_64BIT"
"* "*
{ {
return output_indirect_call (insn, gen_rtx_REG (word_mode, 22)); return pa_output_indirect_call (insn, gen_rtx_REG (word_mode, 22));
}" }"
[(set_attr "type" "dyncall") [(set_attr "type" "dyncall")
(set (attr "length") (symbol_ref "attr_length_indirect_call (insn)"))]) (set (attr "length") (symbol_ref "pa_attr_length_indirect_call (insn)"))])
;; This pattern is split if it is necessary to save and restore the ;; This pattern is split if it is necessary to save and restore the
;; PIC register. ;; PIC register.
...@@ -8007,10 +8007,10 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -8007,10 +8007,10 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
return output_indirect_call (insn, operands[1]); return pa_output_indirect_call (insn, operands[1]);
}" }"
[(set_attr "type" "dyncall") [(set_attr "type" "dyncall")
(set (attr "length") (symbol_ref "attr_length_indirect_call (insn)"))]) (set (attr "length") (symbol_ref "pa_attr_length_indirect_call (insn)"))])
;; Call subroutine returning any type. ;; Call subroutine returning any type.
...@@ -8100,11 +8100,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -8100,11 +8100,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT" "!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT"
"* "*
{ {
output_arg_descriptor (insn); pa_output_arg_descriptor (insn);
return output_call (insn, operands[0], 1); return pa_output_call (insn, operands[0], 1);
}" }"
[(set_attr "type" "call") [(set_attr "type" "call")
(set (attr "length") (symbol_ref "attr_length_call (insn, 1)"))]) (set (attr "length") (symbol_ref "pa_attr_length_call (insn, 1)"))])
(define_insn "sibcall_internal_symref_64bit" (define_insn "sibcall_internal_symref_64bit"
[(call (mem:SI (match_operand 0 "call_operand_address" "")) [(call (mem:SI (match_operand 0 "call_operand_address" ""))
...@@ -8115,11 +8115,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -8115,11 +8115,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
output_arg_descriptor (insn); pa_output_arg_descriptor (insn);
return output_call (insn, operands[0], 1); return pa_output_call (insn, operands[0], 1);
}" }"
[(set_attr "type" "call") [(set_attr "type" "call")
(set (attr "length") (symbol_ref "attr_length_call (insn, 1)"))]) (set (attr "length") (symbol_ref "pa_attr_length_call (insn, 1)"))])
(define_expand "sibcall_value" (define_expand "sibcall_value"
[(set (match_operand 0 "" "") [(set (match_operand 0 "" "")
...@@ -8184,11 +8184,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -8184,11 +8184,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT" "!TARGET_PORTABLE_RUNTIME && !TARGET_64BIT"
"* "*
{ {
output_arg_descriptor (insn); pa_output_arg_descriptor (insn);
return output_call (insn, operands[1], 1); return pa_output_call (insn, operands[1], 1);
}" }"
[(set_attr "type" "call") [(set_attr "type" "call")
(set (attr "length") (symbol_ref "attr_length_call (insn, 1)"))]) (set (attr "length") (symbol_ref "pa_attr_length_call (insn, 1)"))])
(define_insn "sibcall_value_internal_symref_64bit" (define_insn "sibcall_value_internal_symref_64bit"
[(set (match_operand 0 "" "") [(set (match_operand 0 "" "")
...@@ -8200,11 +8200,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -8200,11 +8200,11 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
output_arg_descriptor (insn); pa_output_arg_descriptor (insn);
return output_call (insn, operands[1], 1); return pa_output_call (insn, operands[1], 1);
}" }"
[(set_attr "type" "call") [(set_attr "type" "call")
(set (attr "length") (symbol_ref "attr_length_call (insn, 1)"))]) (set (attr "length") (symbol_ref "pa_attr_length_call (insn, 1)"))])
(define_insn "nop" (define_insn "nop"
[(const_int 0)] [(const_int 0)]
...@@ -8593,7 +8593,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -8593,7 +8593,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
(plus:SI (match_dup 0) (match_dup 1))) (plus:SI (match_dup 0) (match_dup 1)))
(clobber (match_scratch:SI 4 "=X,r,r"))] (clobber (match_scratch:SI 4 "=X,r,r"))]
"" ""
"* return output_dbra (operands, insn, which_alternative); " "* return pa_output_dbra (operands, insn, which_alternative); "
;; Do not expect to understand this the first time through. ;; Do not expect to understand this the first time through.
[(set_attr "type" "cbranch,multi,multi") [(set_attr "type" "cbranch,multi,multi")
(set (attr "length") (set (attr "length")
...@@ -8676,7 +8676,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -8676,7 +8676,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
(set (match_operand:SI 0 "reg_before_reload_operand" "=!r,!*f,*m,!*q") (set (match_operand:SI 0 "reg_before_reload_operand" "=!r,!*f,*m,!*q")
(match_dup 1))] (match_dup 1))]
"" ""
"* return output_movb (operands, insn, which_alternative, 0); " "* return pa_output_movb (operands, insn, which_alternative, 0); "
;; Do not expect to understand this the first time through. ;; Do not expect to understand this the first time through.
[(set_attr "type" "cbranch,multi,multi,multi") [(set_attr "type" "cbranch,multi,multi,multi")
(set (attr "length") (set (attr "length")
...@@ -8748,7 +8748,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -8748,7 +8748,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
(set (match_operand:SI 0 "reg_before_reload_operand" "=!r,!*f,*m,!*q") (set (match_operand:SI 0 "reg_before_reload_operand" "=!r,!*f,*m,!*q")
(match_dup 1))] (match_dup 1))]
"" ""
"* return output_movb (operands, insn, which_alternative, 1); " "* return pa_output_movb (operands, insn, which_alternative, 1); "
;; Do not expect to understand this the first time through. ;; Do not expect to understand this the first time through.
[(set_attr "type" "cbranch,multi,multi,multi") [(set_attr "type" "cbranch,multi,multi,multi")
(set (attr "length") (set (attr "length")
...@@ -8817,7 +8817,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -8817,7 +8817,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"(reload_completed && operands[0] == operands[1]) || operands[0] == operands[2]" "(reload_completed && operands[0] == operands[1]) || operands[0] == operands[2]"
"* "*
{ {
return output_parallel_addb (operands, insn); return pa_output_parallel_addb (operands, insn);
}" }"
[(set_attr "type" "parallel_branch") [(set_attr "type" "parallel_branch")
(set (attr "length") (set (attr "length")
...@@ -8840,7 +8840,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -8840,7 +8840,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"reload_completed" "reload_completed"
"* "*
{ {
return output_parallel_movb (operands, insn); return pa_output_parallel_movb (operands, insn);
}" }"
[(set_attr "type" "parallel_branch") [(set_attr "type" "parallel_branch")
(set (attr "length") (set (attr "length")
...@@ -8863,7 +8863,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -8863,7 +8863,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"reload_completed" "reload_completed"
"* "*
{ {
return output_parallel_movb (operands, insn); return pa_output_parallel_movb (operands, insn);
}" }"
[(set_attr "type" "parallel_branch") [(set_attr "type" "parallel_branch")
(set (attr "length") (set (attr "length")
...@@ -8886,7 +8886,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -8886,7 +8886,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"reload_completed" "reload_completed"
"* "*
{ {
return output_parallel_movb (operands, insn); return pa_output_parallel_movb (operands, insn);
}" }"
[(set_attr "type" "parallel_branch") [(set_attr "type" "parallel_branch")
(set (attr "length") (set (attr "length")
...@@ -8909,7 +8909,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -8909,7 +8909,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
"reload_completed" "reload_completed"
"* "*
{ {
return output_parallel_movb (operands, insn); return pa_output_parallel_movb (operands, insn);
}" }"
[(set_attr "type" "parallel_branch") [(set_attr "type" "parallel_branch")
(set (attr "length") (set (attr "length")
...@@ -8933,7 +8933,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -8933,7 +8933,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
(plus (match_operand 4 "register_operand" "f") (plus (match_operand 4 "register_operand" "f")
(match_operand 5 "register_operand" "f")))] (match_operand 5 "register_operand" "f")))]
"TARGET_PA_11 && ! TARGET_SOFT_FLOAT "TARGET_PA_11 && ! TARGET_SOFT_FLOAT
&& reload_completed && fmpyaddoperands (operands)" && reload_completed && pa_fmpyaddoperands (operands)"
"* "*
{ {
if (GET_MODE (operands[0]) == DFmode) if (GET_MODE (operands[0]) == DFmode)
...@@ -8962,7 +8962,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -8962,7 +8962,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
(mult (match_operand 1 "register_operand" "f") (mult (match_operand 1 "register_operand" "f")
(match_operand 2 "register_operand" "f")))] (match_operand 2 "register_operand" "f")))]
"TARGET_PA_11 && ! TARGET_SOFT_FLOAT "TARGET_PA_11 && ! TARGET_SOFT_FLOAT
&& reload_completed && fmpyaddoperands (operands)" && reload_completed && pa_fmpyaddoperands (operands)"
"* "*
{ {
if (GET_MODE (operands[0]) == DFmode) if (GET_MODE (operands[0]) == DFmode)
...@@ -8991,7 +8991,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -8991,7 +8991,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
(minus (match_operand 4 "register_operand" "f") (minus (match_operand 4 "register_operand" "f")
(match_operand 5 "register_operand" "f")))] (match_operand 5 "register_operand" "f")))]
"TARGET_PA_11 && ! TARGET_SOFT_FLOAT "TARGET_PA_11 && ! TARGET_SOFT_FLOAT
&& reload_completed && fmpysuboperands (operands)" && reload_completed && pa_fmpysuboperands (operands)"
"* "*
{ {
if (GET_MODE (operands[0]) == DFmode) if (GET_MODE (operands[0]) == DFmode)
...@@ -9010,7 +9010,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -9010,7 +9010,7 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
(mult (match_operand 1 "register_operand" "f") (mult (match_operand 1 "register_operand" "f")
(match_operand 2 "register_operand" "f")))] (match_operand 2 "register_operand" "f")))]
"TARGET_PA_11 && ! TARGET_SOFT_FLOAT "TARGET_PA_11 && ! TARGET_SOFT_FLOAT
&& reload_completed && fmpysuboperands (operands)" && reload_completed && pa_fmpysuboperands (operands)"
"* "*
{ {
if (GET_MODE (operands[0]) == DFmode) if (GET_MODE (operands[0]) == DFmode)
...@@ -9236,13 +9236,13 @@ add,l %2,%3,%3\;bv,n %%r0(%3)" ...@@ -9236,13 +9236,13 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
output_asm_insn (\"{comb|cmpb},<<,n %%r26,%%r31,.+%1\", xoperands); output_asm_insn (\"{comb|cmpb},<<,n %%r26,%%r31,.+%1\", xoperands);
/* Finally, call $$sh_func_adrs to extract the function's real add24. */ /* Finally, call $$sh_func_adrs to extract the function's real add24. */
return output_millicode_call (insn, return pa_output_millicode_call (insn,
gen_rtx_SYMBOL_REF (SImode, gen_rtx_SYMBOL_REF (SImode,
\"$$sh_func_adrs\")); \"$$sh_func_adrs\"));
}" }"
[(set_attr "type" "multi") [(set_attr "type" "multi")
(set (attr "length") (set (attr "length")
(plus (symbol_ref "attr_length_millicode_call (insn)") (plus (symbol_ref "pa_attr_length_millicode_call (insn)")
(const_int 20)))]) (const_int 20)))])
;; On the PA, the PIC register is call clobbered, so it must ;; On the PA, the PIC register is call clobbered, so it must
......
gcc/config/pa/pa64-hpux.h
...@@ -236,7 +236,7 @@ do { \ ...@@ -236,7 +236,7 @@ do { \
#define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \ #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
do { \ do { \
if (!FUNCTION_NAME_P (XSTR (FUN, 0))) \ if (!FUNCTION_NAME_P (XSTR (FUN, 0))) \
hppa_encode_label (FUN); \ pa_encode_label (FUN); \
ASM_OUTPUT_TYPE_DIRECTIVE (FILE, XSTR (FUN, 0), "function"); \ ASM_OUTPUT_TYPE_DIRECTIVE (FILE, XSTR (FUN, 0), "function"); \
} while (0) } while (0)
......
gcc/config/pa/pa64-linux.h
...@@ -37,7 +37,7 @@ along with GCC; see the file COPYING3. If not see ...@@ -37,7 +37,7 @@ along with GCC; see the file COPYING3. If not see
{ \ { \
int fsize; \ int fsize; \
\ \
fsize = compute_frame_size (get_frame_size (), 0); \ fsize = pa_compute_frame_size (get_frame_size (), 0); \
if ((TO) == FRAME_POINTER_REGNUM \ if ((TO) == FRAME_POINTER_REGNUM \
&& (FROM) == ARG_POINTER_REGNUM) \ && (FROM) == ARG_POINTER_REGNUM) \
{ \ { \
......
gcc/config/pa/predicates.md
...@@ -59,14 +59,14 @@ ...@@ -59,14 +59,14 @@
(define_predicate "cint_ior_operand" (define_predicate "cint_ior_operand"
(and (match_code "const_int") (and (match_code "const_int")
(match_test "ior_mask_p (INTVAL (op))"))) (match_test "pa_ior_mask_p (INTVAL (op))")))
;; True iff OP is CONST_INT that can be moved in one instruction ;; True iff OP is CONST_INT that can be moved in one instruction
;; into a general register. ;; into a general register.
(define_predicate "cint_move_operand" (define_predicate "cint_move_operand"
(and (match_code "const_int") (and (match_code "const_int")
(match_test "cint_ok_for_move (INTVAL (op))"))) (match_test "pa_cint_ok_for_move (INTVAL (op))")))
;; True iff OP is a CONST0_RTX for MODE. ;; True iff OP is a CONST0_RTX for MODE.
...@@ -91,7 +91,7 @@ ...@@ -91,7 +91,7 @@
(define_predicate "and_operand" (define_predicate "and_operand"
(ior (match_operand 0 "register_operand") (ior (match_operand 0 "register_operand")
(and (match_code "const_int") (and (match_code "const_int")
(match_test "and_mask_p (INTVAL (op))")))) (match_test "pa_and_mask_p (INTVAL (op))"))))
;; Return truth value of whether OP can be used as an operand in a ;; Return truth value of whether OP can be used as an operand in a
;; three operand arithmetic insn that accepts registers of mode MODE ;; three operand arithmetic insn that accepts registers of mode MODE
...@@ -179,7 +179,7 @@ ...@@ -179,7 +179,7 @@
&& ((REG_P (op) && REGNO (op) == 25) && ((REG_P (op) && REGNO (op) == 25)
|| (CONST_INT_P (op) || (CONST_INT_P (op)
&& INTVAL (op) > 0 && INTVAL (op) < 16 && INTVAL (op) > 0 && INTVAL (op) < 16
&& magic_milli[INTVAL (op)]))); && pa_magic_milli[INTVAL (op)])));
}) })
;; True iff OP is a reloading floating point register ;; True iff OP is a reloading floating point register
...@@ -304,7 +304,7 @@ ...@@ -304,7 +304,7 @@
return true; return true;
if (CONST_INT_P (op)) if (CONST_INT_P (op))
return cint_ok_for_move (INTVAL (op)); return pa_cint_ok_for_move (INTVAL (op));
if (GET_MODE (op) != mode) if (GET_MODE (op) != mode)
return false; return false;
...@@ -452,7 +452,7 @@ ...@@ -452,7 +452,7 @@
(define_predicate "shadd_operand" (define_predicate "shadd_operand"
(and (match_code "const_int") (and (match_code "const_int")
(match_test "shadd_constant_p (INTVAL (op))"))) (match_test "pa_shadd_constant_p (INTVAL (op))")))
;; Return truth value of statement that OP is a symbolic memory operand. ;; Return truth value of statement that OP is a symbolic memory operand.
...@@ -463,7 +463,7 @@ ...@@ -463,7 +463,7 @@
op = SUBREG_REG (op); op = SUBREG_REG (op);
if (!MEM_P (op)) if (!MEM_P (op))
return false; return false;
return symbolic_expression_p (XEXP (op, 0)); return pa_symbolic_expression_p (XEXP (op, 0));
}) })
;; True iff OP is a symbolic operand. ;; True iff OP is a symbolic operand.
......
gcc/config/pa/som.h
...@@ -227,7 +227,7 @@ do { \ ...@@ -227,7 +227,7 @@ do { \
tree id; \ tree id; \
\ \
if (!function_label_operand (RTL, VOIDmode)) \ if (!function_label_operand (RTL, VOIDmode)) \
hppa_encode_label (RTL); \ pa_encode_label (RTL); \
\ \
name = targetm.strip_name_encoding (XSTR ((RTL), 0)); \ name = targetm.strip_name_encoding (XSTR ((RTL), 0)); \
id = maybe_get_identifier (name); \ id = maybe_get_identifier (name); \
......
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