rs6000.md (movsf_hardfloat): Accept CTR-to-CTR copy.

2004-02-23  Dale Johannesen  <dalej@apple.com>

	* config/rs6000.md (movsf_hardfloat): Accept CTR-to-CTR copy.
	(movdf_hardfloat64):  Ditto.

From-SVN: r78322

gcc/ChangeLog

+2004-02-23  Dale Johannesen  <dalej@apple.com>
+
+	* config/rs6000.md (movsf_hardfloat): Accept CTR-to-CTR copy.
+	(movdf_hardfloat64):  Ditto.
+
 2004-02-23  Kazu Hirata  <kazu@cs.umass.edu>
 
 	* convert.c, gcov-io.c, libgcov.c, sched-int.h, sibcall.c,

gcc/config/rs6000/rs6000.md

@@ -7888,8 +7888,8 @@
 }")
 
 (define_insn "*movsf_hardfloat"
-  [(set (match_operand:SF 0 "nonimmediate_operand" "=!r,!r,m,f,f,m,!cl,!q,!r,!r,!r")
-	(match_operand:SF 1 "input_operand" "r,m,r,f,m,f,r,r,h,G,Fn"))]
+  [(set (match_operand:SF 0 "nonimmediate_operand" "=!r,!r,m,f,f,m,!cl,!q,!r,!h,!r,!r")
+	(match_operand:SF 1 "input_operand" "r,m,r,f,m,f,r,r,h,0,G,Fn"))]
   "(gpc_reg_operand (operands[0], SFmode)
    || gpc_reg_operand (operands[1], SFmode))
    && (TARGET_HARD_FLOAT && TARGET_FPRS)"
@@ -7903,10 +7903,11 @@
    mt%0 %1
    mt%0 %1
    mf%1 %0
+   nop
    #
    #"
-  [(set_attr "type" "*,load,store,fp,fpload,fpstore,*,mtjmpr,*,*,*")
-   (set_attr "length" "4,4,4,4,4,4,4,4,4,4,8")])
+  [(set_attr "type" "*,load,store,fp,fpload,fpstore,*,mtjmpr,*,*,*,*")
+   (set_attr "length" "4,4,4,4,4,4,4,4,4,4,4,8")])
 
 (define_insn "*movsf_softfloat"
   [(set (match_operand:SF 0 "nonimmediate_operand" "=r,cl,q,r,r,m,r,r,r,r,r,*h")
@@ -8163,8 +8164,8 @@
 ; ld/std require word-aligned displacements -> 'Y' constraint.
 ; List Y->r and r->Y before r->r for reload.
 (define_insn "*movdf_hardfloat64"
-  [(set (match_operand:DF 0 "nonimmediate_operand" "=Y,r,!r,f,f,m,!cl,!r,!r,!r,!r")
-	(match_operand:DF 1 "input_operand" "r,Y,r,f,m,f,r,h,G,H,F"))]
+  [(set (match_operand:DF 0 "nonimmediate_operand" "=Y,r,!r,f,f,m,!cl,!r,!h,!r,!r,!r")
+	(match_operand:DF 1 "input_operand" "r,Y,r,f,m,f,r,h,0,G,H,F"))]
   "TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS
    && (gpc_reg_operand (operands[0], DFmode)
        || gpc_reg_operand (operands[1], DFmode))"
@@ -8177,11 +8178,12 @@
    stfd%U0%X0 %1,%0
    mt%0 %1
    mf%1 %0
+   nop
    #
    #
    #"
-  [(set_attr "type" "*,load,store,fp,fpload,fpstore,mtjmpr,*,*,*,*")
-   (set_attr "length" "4,4,4,4,4,4,4,4,8,12,16")])
+  [(set_attr "type" "*,load,store,fp,fpload,fpstore,mtjmpr,*,*,*,*,*")
+   (set_attr "length" "4,4,4,4,4,4,4,4,4,8,12,16")])
 
 (define_insn "*movdf_softfloat64"
   [(set (match_operand:DF 0 "nonimmediate_operand" "=r,Y,r,cl,r,r,r,r,*h")