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riscv-gcc-1
Commit ae156f85 by Adrian Straetling Committed by Ulrich Weigand
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s390.h: Move xxx_REGNUM definitions to s390.md. 

2005-05-09  Adrian Straetling  <straetling@de.ibm.com>

	* config/s390/s390.h: Move xxx_REGNUM definitions to s390.md.
	* config/s390/s390.md: ("SIBCALL_REGNUM", "BASE_REGNUM",
	"RETURN_REGNUM", "CC_REGNUM", "TP_REGNUM"): New constants.
	Replace every occurrence of '(reg:<MODE> 33)' by '(reg:<MODE>
	CC_REGNUM)'.
	("get_tp_64", "get_tp_31", "set_tp_64", "set_tp_31"): Replace
	'(reg:<MODE> 36)' by '(reg:<MODE> TP_REGNUM)'.
	("*sibcall_br", "*sibcall_value_br"): Replace '(reg:DI 1)' by '(reg:DI
	REG_SC)'.

From-SVN: r99459
parent 2f8f8434
Showing with 368 additions and 344 deletions
gcc/ChangeLog
2005-05-09 Adrian Straetling <straetling@de.ibm.com> 2005-05-09 Adrian Straetling <straetling@de.ibm.com>
* config/s390/s390.h: Move xxx_REGNUM definitions to s390.md.
* config/s390/s390.md: ("SIBCALL_REGNUM", "BASE_REGNUM",
"RETURN_REGNUM", "CC_REGNUM", "TP_REGNUM"): New constants.
Replace every occurrence of '(reg:<MODE> 33)' by '(reg:<MODE>
CC_REGNUM)'.
("get_tp_64", "get_tp_31", "set_tp_64", "set_tp_31"): Replace
'(reg:<MODE> 36)' by '(reg:<MODE> TP_REGNUM)'.
("*sibcall_br", "*sibcall_value_br"): Replace '(reg:DI 1)' by '(reg:DI
REG_SC)'.
2005-05-09 Adrian Straetling <straetling@de.ibm.com>
* config/s390/s390.md: ("gf") New mode attribute. * config/s390/s390.md: ("gf") New mode attribute.
("fixuns_truncdfdi2", "fixuns_truncdfsi2", "fixuns_truncsfdi2", ("fixuns_truncdfdi2", "fixuns_truncdfsi2", "fixuns_truncsfdi2",
"fixuns_truncsfsi2"): Merge. "fixuns_truncsfsi2"): Merge.
......
gcc/config/s390/s390.h
...@@ -253,12 +253,6 @@ if (INTEGRAL_MODE_P (MODE) && \ ...@@ -253,12 +253,6 @@ if (INTEGRAL_MODE_P (MODE) && \
#define FRAME_REG_P(X) (REG_P (X) && FRAME_REGNO_P (REGNO (X))) #define FRAME_REG_P(X) (REG_P (X) && FRAME_REGNO_P (REGNO (X)))
#define ACCESS_REG_P(X) (REG_P (X) && ACCESS_REGNO_P (REGNO (X))) #define ACCESS_REG_P(X) (REG_P (X) && ACCESS_REGNO_P (REGNO (X)))
#define SIBCALL_REGNUM 1
#define BASE_REGNUM 13
#define RETURN_REGNUM 14
#define CC_REGNUM 33
#define TP_REGNUM 36
/* Set up fixed registers and calling convention: /* Set up fixed registers and calling convention:
GPRs 0-5 are always call-clobbered, GPRs 0-5 are always call-clobbered,
......
gcc/config/s390/s390.md
...@@ -145,6 +145,24 @@ ...@@ -145,6 +145,24 @@
(UNSPECV_SET_TP 500) (UNSPECV_SET_TP 500)
]) ])
;;
;; Registers
;;
(define_constants
[
; Sibling call register.
(SIBCALL_REGNUM 1)
; Literal pool base register.
(BASE_REGNUM 13)
; Return address register.
(RETURN_REGNUM 14)
; Condition code register.
(CC_REGNUM 33)
; Thread local storage pointer register.
(TP_REGNUM 36)
])
;; Instruction operand type as used in the Principles of Operation. ;; Instruction operand type as used in the Principles of Operation.
;; Used to determine defaults for length and other attribute values. ;; Used to determine defaults for length and other attribute values.
...@@ -317,7 +335,7 @@ ...@@ -317,7 +335,7 @@
;; ;;
(define_expand "cmp<mode>" (define_expand "cmp<mode>"
[(set (reg:CC 33) [(set (reg:CC CC_REGNUM)
(compare:CC (match_operand:GPR 0 "register_operand" "") (compare:CC (match_operand:GPR 0 "register_operand" "")
(match_operand:GPR 1 "general_operand" "")))] (match_operand:GPR 1 "general_operand" "")))]
"" ""
...@@ -328,7 +346,7 @@ ...@@ -328,7 +346,7 @@
}) })
(define_expand "cmp<mode>" (define_expand "cmp<mode>"
[(set (reg:CC 33) [(set (reg:CC CC_REGNUM)
(compare:CC (match_operand:FPR 0 "register_operand" "") (compare:CC (match_operand:FPR 0 "register_operand" "")
(match_operand:FPR 1 "general_operand" "")))] (match_operand:FPR 1 "general_operand" "")))]
"TARGET_HARD_FLOAT" "TARGET_HARD_FLOAT"
...@@ -342,7 +360,7 @@ ...@@ -342,7 +360,7 @@
; Test-under-Mask instructions ; Test-under-Mask instructions
(define_insn "*tmqi_mem" (define_insn "*tmqi_mem"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (and:QI (match_operand:QI 0 "memory_operand" "Q,S") (compare (and:QI (match_operand:QI 0 "memory_operand" "Q,S")
(match_operand:QI 1 "immediate_operand" "n,n")) (match_operand:QI 1 "immediate_operand" "n,n"))
(match_operand:QI 2 "immediate_operand" "n,n")))] (match_operand:QI 2 "immediate_operand" "n,n")))]
...@@ -353,7 +371,7 @@ ...@@ -353,7 +371,7 @@
[(set_attr "op_type" "SI,SIY")]) [(set_attr "op_type" "SI,SIY")])
(define_insn "*tmdi_reg" (define_insn "*tmdi_reg"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (and:DI (match_operand:DI 0 "nonimmediate_operand" "d,d,d,d") (compare (and:DI (match_operand:DI 0 "nonimmediate_operand" "d,d,d,d")
(match_operand:DI 1 "immediate_operand" (match_operand:DI 1 "immediate_operand"
"N0HD0,N1HD0,N2HD0,N3HD0")) "N0HD0,N1HD0,N2HD0,N3HD0"))
...@@ -369,7 +387,7 @@ ...@@ -369,7 +387,7 @@
[(set_attr "op_type" "RI")]) [(set_attr "op_type" "RI")])
(define_insn "*tmsi_reg" (define_insn "*tmsi_reg"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (and:SI (match_operand:SI 0 "nonimmediate_operand" "d,d") (compare (and:SI (match_operand:SI 0 "nonimmediate_operand" "d,d")
(match_operand:SI 1 "immediate_operand" "N0HS0,N1HS0")) (match_operand:SI 1 "immediate_operand" "N0HS0,N1HS0"))
(match_operand:SI 2 "immediate_operand" "n,n")))] (match_operand:SI 2 "immediate_operand" "n,n")))]
...@@ -381,7 +399,7 @@ ...@@ -381,7 +399,7 @@
[(set_attr "op_type" "RI")]) [(set_attr "op_type" "RI")])
(define_insn "*tm<mode>_full" (define_insn "*tm<mode>_full"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:HQI 0 "register_operand" "d") (compare (match_operand:HQI 0 "register_operand" "d")
(match_operand:HQI 1 "immediate_operand" "n")))] (match_operand:HQI 1 "immediate_operand" "n")))]
"s390_match_ccmode (insn, s390_tm_ccmode (constm1_rtx, operands[1], 1))" "s390_match_ccmode (insn, s390_tm_ccmode (constm1_rtx, operands[1], 1))"
...@@ -392,7 +410,7 @@ ...@@ -392,7 +410,7 @@
; Load-and-Test instructions ; Load-and-Test instructions
(define_insn "*tstdi_sign" (define_insn "*tstdi_sign"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (ashiftrt:DI (ashift:DI (subreg:DI (match_operand:SI 0 "register_operand" "d") 0) (compare (ashiftrt:DI (ashift:DI (subreg:DI (match_operand:SI 0 "register_operand" "d") 0)
(const_int 32)) (const_int 32)) (const_int 32)) (const_int 32))
(match_operand:DI 1 "const0_operand" ""))) (match_operand:DI 1 "const0_operand" "")))
...@@ -403,7 +421,7 @@ ...@@ -403,7 +421,7 @@
[(set_attr "op_type" "RRE")]) [(set_attr "op_type" "RRE")])
(define_insn "*tstdi" (define_insn "*tstdi"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:DI 0 "register_operand" "d") (compare (match_operand:DI 0 "register_operand" "d")
(match_operand:DI 1 "const0_operand" ""))) (match_operand:DI 1 "const0_operand" "")))
(set (match_operand:DI 2 "register_operand" "=d") (set (match_operand:DI 2 "register_operand" "=d")
...@@ -413,7 +431,7 @@ ...@@ -413,7 +431,7 @@
[(set_attr "op_type" "RRE")]) [(set_attr "op_type" "RRE")])
(define_insn "*tstdi_cconly" (define_insn "*tstdi_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:DI 0 "register_operand" "d") (compare (match_operand:DI 0 "register_operand" "d")
(match_operand:DI 1 "const0_operand" "")))] (match_operand:DI 1 "const0_operand" "")))]
"s390_match_ccmode(insn, CCSmode) && TARGET_64BIT" "s390_match_ccmode(insn, CCSmode) && TARGET_64BIT"
...@@ -421,7 +439,7 @@ ...@@ -421,7 +439,7 @@
[(set_attr "op_type" "RRE")]) [(set_attr "op_type" "RRE")])
(define_insn "*tstdi_cconly_31" (define_insn "*tstdi_cconly_31"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:DI 0 "register_operand" "d") (compare (match_operand:DI 0 "register_operand" "d")
(match_operand:DI 1 "const0_operand" "")))] (match_operand:DI 1 "const0_operand" "")))]
"s390_match_ccmode(insn, CCSmode) && !TARGET_64BIT" "s390_match_ccmode(insn, CCSmode) && !TARGET_64BIT"
...@@ -431,7 +449,7 @@ ...@@ -431,7 +449,7 @@
(define_insn "*tstsi" (define_insn "*tstsi"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:SI 0 "nonimmediate_operand" "d,Q,S") (compare (match_operand:SI 0 "nonimmediate_operand" "d,Q,S")
(match_operand:SI 1 "const0_operand" ""))) (match_operand:SI 1 "const0_operand" "")))
(set (match_operand:SI 2 "register_operand" "=d,d,d") (set (match_operand:SI 2 "register_operand" "=d,d,d")
...@@ -444,7 +462,7 @@ ...@@ -444,7 +462,7 @@
[(set_attr "op_type" "RR,RS,RSY")]) [(set_attr "op_type" "RR,RS,RSY")])
(define_insn "*tstsi_cconly" (define_insn "*tstsi_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:SI 0 "nonimmediate_operand" "d,Q,S") (compare (match_operand:SI 0 "nonimmediate_operand" "d,Q,S")
(match_operand:SI 1 "const0_operand" ""))) (match_operand:SI 1 "const0_operand" "")))
(clobber (match_scratch:SI 2 "=X,d,d"))] (clobber (match_scratch:SI 2 "=X,d,d"))]
...@@ -456,7 +474,7 @@ ...@@ -456,7 +474,7 @@
[(set_attr "op_type" "RR,RS,RSY")]) [(set_attr "op_type" "RR,RS,RSY")])
(define_insn "*tstsi_cconly2" (define_insn "*tstsi_cconly2"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:SI 0 "register_operand" "d") (compare (match_operand:SI 0 "register_operand" "d")
(match_operand:SI 1 "const0_operand" "")))] (match_operand:SI 1 "const0_operand" "")))]
"s390_match_ccmode(insn, CCSmode)" "s390_match_ccmode(insn, CCSmode)"
...@@ -464,7 +482,7 @@ ...@@ -464,7 +482,7 @@
[(set_attr "op_type" "RR")]) [(set_attr "op_type" "RR")])
(define_insn "*tst<mode>CCT" (define_insn "*tst<mode>CCT"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:HQI 0 "nonimmediate_operand" "?Q,?S,d") (compare (match_operand:HQI 0 "nonimmediate_operand" "?Q,?S,d")
(match_operand:HQI 1 "const0_operand" ""))) (match_operand:HQI 1 "const0_operand" "")))
(set (match_operand:HQI 2 "register_operand" "=d,d,0") (set (match_operand:HQI 2 "register_operand" "=d,d,0")
...@@ -477,7 +495,7 @@ ...@@ -477,7 +495,7 @@
[(set_attr "op_type" "RS,RSY,RI")]) [(set_attr "op_type" "RS,RSY,RI")])
(define_insn "*tsthiCCT_cconly" (define_insn "*tsthiCCT_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:HI 0 "nonimmediate_operand" "Q,S,d") (compare (match_operand:HI 0 "nonimmediate_operand" "Q,S,d")
(match_operand:HI 1 "const0_operand" ""))) (match_operand:HI 1 "const0_operand" "")))
(clobber (match_scratch:HI 2 "=d,d,X"))] (clobber (match_scratch:HI 2 "=d,d,X"))]
...@@ -489,7 +507,7 @@ ...@@ -489,7 +507,7 @@
[(set_attr "op_type" "RS,RSY,RI")]) [(set_attr "op_type" "RS,RSY,RI")])
(define_insn "*tstqiCCT_cconly" (define_insn "*tstqiCCT_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:QI 0 "nonimmediate_operand" "?Q,?S,d") (compare (match_operand:QI 0 "nonimmediate_operand" "?Q,?S,d")
(match_operand:QI 1 "const0_operand" "")))] (match_operand:QI 1 "const0_operand" "")))]
"s390_match_ccmode(insn, CCTmode)" "s390_match_ccmode(insn, CCTmode)"
...@@ -500,7 +518,7 @@ ...@@ -500,7 +518,7 @@
[(set_attr "op_type" "SI,SIY,RI")]) [(set_attr "op_type" "SI,SIY,RI")])
(define_insn "*tst<mode>" (define_insn "*tst<mode>"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:HQI 0 "s_operand" "Q,S") (compare (match_operand:HQI 0 "s_operand" "Q,S")
(match_operand:HQI 1 "const0_operand" ""))) (match_operand:HQI 1 "const0_operand" "")))
(set (match_operand:HQI 2 "register_operand" "=d,d") (set (match_operand:HQI 2 "register_operand" "=d,d")
...@@ -512,7 +530,7 @@ ...@@ -512,7 +530,7 @@
[(set_attr "op_type" "RS,RSY")]) [(set_attr "op_type" "RS,RSY")])
(define_insn "*tst<mode>_cconly" (define_insn "*tst<mode>_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:HQI 0 "s_operand" "Q,S") (compare (match_operand:HQI 0 "s_operand" "Q,S")
(match_operand:HQI 1 "const0_operand" ""))) (match_operand:HQI 1 "const0_operand" "")))
(clobber (match_scratch:HQI 2 "=d,d"))] (clobber (match_scratch:HQI 2 "=d,d"))]
...@@ -526,7 +544,7 @@ ...@@ -526,7 +544,7 @@
; Compare (equality) instructions ; Compare (equality) instructions
(define_insn "*cmpdi_cct" (define_insn "*cmpdi_cct"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:DI 0 "nonimmediate_operand" "%d,d,d,Q") (compare (match_operand:DI 0 "nonimmediate_operand" "%d,d,d,Q")
(match_operand:DI 1 "general_operand" "d,K,m,BQ")))] (match_operand:DI 1 "general_operand" "d,K,m,BQ")))]
"s390_match_ccmode (insn, CCTmode) && TARGET_64BIT" "s390_match_ccmode (insn, CCTmode) && TARGET_64BIT"
...@@ -538,7 +556,7 @@ ...@@ -538,7 +556,7 @@
[(set_attr "op_type" "RRE,RI,RXY,SS")]) [(set_attr "op_type" "RRE,RI,RXY,SS")])
(define_insn "*cmpsi_cct" (define_insn "*cmpsi_cct"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:SI 0 "nonimmediate_operand" "%d,d,d,d,Q") (compare (match_operand:SI 0 "nonimmediate_operand" "%d,d,d,d,Q")
(match_operand:SI 1 "general_operand" "d,K,R,T,BQ")))] (match_operand:SI 1 "general_operand" "d,K,R,T,BQ")))]
"s390_match_ccmode (insn, CCTmode)" "s390_match_ccmode (insn, CCTmode)"
...@@ -554,7 +572,7 @@ ...@@ -554,7 +572,7 @@
; Compare (signed) instructions ; Compare (signed) instructions
(define_insn "*cmpdi_ccs_sign" (define_insn "*cmpdi_ccs_sign"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "d,m")) (compare (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "d,m"))
(match_operand:DI 0 "register_operand" "d,d")))] (match_operand:DI 0 "register_operand" "d,d")))]
"s390_match_ccmode(insn, CCSRmode) && TARGET_64BIT" "s390_match_ccmode(insn, CCSRmode) && TARGET_64BIT"
...@@ -564,7 +582,7 @@ ...@@ -564,7 +582,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*cmpdi_ccs" (define_insn "*cmpdi_ccs"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:DI 0 "register_operand" "d,d,d") (compare (match_operand:DI 0 "register_operand" "d,d,d")
(match_operand:DI 1 "general_operand" "d,K,m")))] (match_operand:DI 1 "general_operand" "d,K,m")))]
"s390_match_ccmode(insn, CCSmode) && TARGET_64BIT" "s390_match_ccmode(insn, CCSmode) && TARGET_64BIT"
...@@ -575,7 +593,7 @@ ...@@ -575,7 +593,7 @@
[(set_attr "op_type" "RRE,RI,RXY")]) [(set_attr "op_type" "RRE,RI,RXY")])
(define_insn "*cmpsi_ccs_sign" (define_insn "*cmpsi_ccs_sign"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (sign_extend:SI (match_operand:HI 1 "memory_operand" "R,T")) (compare (sign_extend:SI (match_operand:HI 1 "memory_operand" "R,T"))
(match_operand:SI 0 "register_operand" "d,d")))] (match_operand:SI 0 "register_operand" "d,d")))]
"s390_match_ccmode(insn, CCSRmode)" "s390_match_ccmode(insn, CCSRmode)"
...@@ -585,7 +603,7 @@ ...@@ -585,7 +603,7 @@
[(set_attr "op_type" "RX,RXY")]) [(set_attr "op_type" "RX,RXY")])
(define_insn "*cmpsi_ccs" (define_insn "*cmpsi_ccs"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:SI 0 "register_operand" "d,d,d,d") (compare (match_operand:SI 0 "register_operand" "d,d,d,d")
(match_operand:SI 1 "general_operand" "d,K,R,T")))] (match_operand:SI 1 "general_operand" "d,K,R,T")))]
"s390_match_ccmode(insn, CCSmode)" "s390_match_ccmode(insn, CCSmode)"
...@@ -600,7 +618,7 @@ ...@@ -600,7 +618,7 @@
; Compare (unsigned) instructions ; Compare (unsigned) instructions
(define_insn "*cmpdi_ccu_zero" (define_insn "*cmpdi_ccu_zero"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "d,m")) (compare (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "d,m"))
(match_operand:DI 0 "register_operand" "d,d")))] (match_operand:DI 0 "register_operand" "d,d")))]
"s390_match_ccmode (insn, CCURmode) && TARGET_64BIT" "s390_match_ccmode (insn, CCURmode) && TARGET_64BIT"
...@@ -610,7 +628,7 @@ ...@@ -610,7 +628,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*cmpdi_ccu" (define_insn "*cmpdi_ccu"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:DI 0 "nonimmediate_operand" "d,d,Q,BQ") (compare (match_operand:DI 0 "nonimmediate_operand" "d,d,Q,BQ")
(match_operand:DI 1 "general_operand" "d,m,BQ,Q")))] (match_operand:DI 1 "general_operand" "d,m,BQ,Q")))]
"s390_match_ccmode (insn, CCUmode) && TARGET_64BIT" "s390_match_ccmode (insn, CCUmode) && TARGET_64BIT"
...@@ -622,7 +640,7 @@ ...@@ -622,7 +640,7 @@
[(set_attr "op_type" "RRE,RXY,SS,SS")]) [(set_attr "op_type" "RRE,RXY,SS,SS")])
(define_insn "*cmpsi_ccu" (define_insn "*cmpsi_ccu"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:SI 0 "nonimmediate_operand" "d,d,d,Q,BQ") (compare (match_operand:SI 0 "nonimmediate_operand" "d,d,d,Q,BQ")
(match_operand:SI 1 "general_operand" "d,R,T,BQ,Q")))] (match_operand:SI 1 "general_operand" "d,R,T,BQ,Q")))]
"s390_match_ccmode (insn, CCUmode)" "s390_match_ccmode (insn, CCUmode)"
...@@ -635,7 +653,7 @@ ...@@ -635,7 +653,7 @@
[(set_attr "op_type" "RR,RX,RXY,SS,SS")]) [(set_attr "op_type" "RR,RX,RXY,SS,SS")])
(define_insn "*cmphi_ccu" (define_insn "*cmphi_ccu"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:HI 0 "nonimmediate_operand" "d,d,Q,BQ") (compare (match_operand:HI 0 "nonimmediate_operand" "d,d,Q,BQ")
(match_operand:HI 1 "general_operand" "Q,S,BQ,Q")))] (match_operand:HI 1 "general_operand" "Q,S,BQ,Q")))]
"s390_match_ccmode (insn, CCUmode) "s390_match_ccmode (insn, CCUmode)
...@@ -648,7 +666,7 @@ ...@@ -648,7 +666,7 @@
[(set_attr "op_type" "RS,RSY,SS,SS")]) [(set_attr "op_type" "RS,RSY,SS,SS")])
(define_insn "*cmpqi_ccu" (define_insn "*cmpqi_ccu"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:QI 0 "nonimmediate_operand" "d,d,Q,S,Q,BQ") (compare (match_operand:QI 0 "nonimmediate_operand" "d,d,Q,S,Q,BQ")
(match_operand:QI 1 "general_operand" "Q,S,n,n,BQ,Q")))] (match_operand:QI 1 "general_operand" "Q,S,n,n,BQ,Q")))]
"s390_match_ccmode (insn, CCUmode) "s390_match_ccmode (insn, CCUmode)
...@@ -666,7 +684,7 @@ ...@@ -666,7 +684,7 @@
; Block compare (CLC) instruction patterns. ; Block compare (CLC) instruction patterns.
(define_insn "*clc" (define_insn "*clc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:BLK 0 "memory_operand" "Q") (compare (match_operand:BLK 0 "memory_operand" "Q")
(match_operand:BLK 1 "memory_operand" "Q"))) (match_operand:BLK 1 "memory_operand" "Q")))
(use (match_operand 2 "const_int_operand" "n"))] (use (match_operand 2 "const_int_operand" "n"))]
...@@ -676,7 +694,7 @@ ...@@ -676,7 +694,7 @@
[(set_attr "op_type" "SS")]) [(set_attr "op_type" "SS")])
(define_split (define_split
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand 0 "memory_operand" "") (compare (match_operand 0 "memory_operand" "")
(match_operand 1 "memory_operand" "")))] (match_operand 1 "memory_operand" "")))]
"reload_completed "reload_completed
...@@ -700,7 +718,7 @@ ...@@ -700,7 +718,7 @@
; (DF|SF) instructions ; (DF|SF) instructions
(define_insn "*cmp<mode>_ccs_0" (define_insn "*cmp<mode>_ccs_0"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:FPR 0 "register_operand" "f") (compare (match_operand:FPR 0 "register_operand" "f")
(match_operand:FPR 1 "const0_operand" "")))] (match_operand:FPR 1 "const0_operand" "")))]
"s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" "s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
...@@ -709,7 +727,7 @@ ...@@ -709,7 +727,7 @@
(set_attr "type" "fsimp<mode>")]) (set_attr "type" "fsimp<mode>")])
(define_insn "*cmp<mode>_ccs_0_ibm" (define_insn "*cmp<mode>_ccs_0_ibm"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:FPR 0 "register_operand" "f") (compare (match_operand:FPR 0 "register_operand" "f")
(match_operand:FPR 1 "const0_operand" "")))] (match_operand:FPR 1 "const0_operand" "")))]
"s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" "s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IBM_FLOAT"
...@@ -718,7 +736,7 @@ ...@@ -718,7 +736,7 @@
(set_attr "type" "fsimp<mode>")]) (set_attr "type" "fsimp<mode>")])
(define_insn "*cmp<mode>_ccs" (define_insn "*cmp<mode>_ccs"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:FPR 0 "register_operand" "f,f") (compare (match_operand:FPR 0 "register_operand" "f,f")
(match_operand:FPR 1 "general_operand" "f,R")))] (match_operand:FPR 1 "general_operand" "f,R")))]
"s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" "s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
...@@ -729,7 +747,7 @@ ...@@ -729,7 +747,7 @@
(set_attr "type" "fsimp<mode>")]) (set_attr "type" "fsimp<mode>")])
(define_insn "*cmp<mode>_ccs_ibm" (define_insn "*cmp<mode>_ccs_ibm"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:FPR 0 "register_operand" "f,f") (compare (match_operand:FPR 0 "register_operand" "f,f")
(match_operand:FPR 1 "general_operand" "f,R")))] (match_operand:FPR 1 "general_operand" "f,R")))]
"s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" "s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IBM_FLOAT"
...@@ -999,7 +1017,7 @@ ...@@ -999,7 +1017,7 @@
[(parallel [(parallel
[(set (match_operand:DI 0 "register_operand" "") [(set (match_operand:DI 0 "register_operand" "")
(match_operand:QI 1 "address_operand" "")) (match_operand:QI 1 "address_operand" ""))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"TARGET_64BIT "TARGET_64BIT
&& preferred_la_operand_p (operands[1], const0_rtx)" && preferred_la_operand_p (operands[1], const0_rtx)"
[(set (match_dup 0) (match_dup 1))] [(set (match_dup 0) (match_dup 1))]
...@@ -1012,7 +1030,7 @@ ...@@ -1012,7 +1030,7 @@
[(set (match_dup 0) [(set (match_dup 0)
(plus:DI (match_dup 0) (plus:DI (match_dup 0)
(match_operand:DI 2 "nonmemory_operand" ""))) (match_operand:DI 2 "nonmemory_operand" "")))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"TARGET_64BIT "TARGET_64BIT
&& !reg_overlap_mentioned_p (operands[0], operands[2]) && !reg_overlap_mentioned_p (operands[0], operands[2])
&& preferred_la_operand_p (operands[1], operands[2])" && preferred_la_operand_p (operands[1], operands[2])"
...@@ -1128,7 +1146,7 @@ ...@@ -1128,7 +1146,7 @@
[(parallel [(parallel
[(set (match_operand:SI 0 "register_operand" "") [(set (match_operand:SI 0 "register_operand" "")
(match_operand:QI 1 "address_operand" "")) (match_operand:QI 1 "address_operand" ""))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"!TARGET_64BIT "!TARGET_64BIT
&& preferred_la_operand_p (operands[1], const0_rtx)" && preferred_la_operand_p (operands[1], const0_rtx)"
[(set (match_dup 0) (match_dup 1))] [(set (match_dup 0) (match_dup 1))]
...@@ -1141,7 +1159,7 @@ ...@@ -1141,7 +1159,7 @@
[(set (match_dup 0) [(set (match_dup 0)
(plus:SI (match_dup 0) (plus:SI (match_dup 0)
(match_operand:SI 2 "nonmemory_operand" ""))) (match_operand:SI 2 "nonmemory_operand" "")))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"!TARGET_64BIT "!TARGET_64BIT
&& !reg_overlap_mentioned_p (operands[0], operands[2]) && !reg_overlap_mentioned_p (operands[0], operands[2])
&& preferred_la_operand_p (operands[1], operands[2])" && preferred_la_operand_p (operands[1], operands[2])"
...@@ -1163,7 +1181,7 @@ ...@@ -1163,7 +1181,7 @@
[(set (match_operand:SI 0 "register_operand" "=d") [(set (match_operand:SI 0 "register_operand" "=d")
(and:SI (match_operand:QI 1 "address_operand" "p") (and:SI (match_operand:QI 1 "address_operand" "p")
(const_int 2147483647))) (const_int 2147483647)))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_64BIT" "!TARGET_64BIT"
"#" "#"
"&& reload_completed" "&& reload_completed"
...@@ -1310,7 +1328,7 @@ ...@@ -1310,7 +1328,7 @@
(define_insn "*movstricthi" (define_insn "*movstricthi"
[(set (strict_low_part (match_operand:HI 0 "register_operand" "+d,d")) [(set (strict_low_part (match_operand:HI 0 "register_operand" "+d,d"))
(match_operand:HI 1 "memory_operand" "Q,S")) (match_operand:HI 1 "memory_operand" "Q,S"))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"@ "@
icm\t%0,3,%S1 icm\t%0,3,%S1
...@@ -1735,11 +1753,11 @@ ...@@ -1735,11 +1753,11 @@
(reg:QI 0) (reg:QI 0)
(match_operand 3 "immediate_operand" "")] UNSPEC_SRST)) (match_operand 3 "immediate_operand" "")] UNSPEC_SRST))
(clobber (scratch:P)) (clobber (scratch:P))
(clobber (reg:CC 33))]) (clobber (reg:CC CC_REGNUM))])
(parallel (parallel
[(set (match_operand:P 0 "register_operand" "") [(set (match_operand:P 0 "register_operand" "")
(minus:P (match_dup 4) (match_dup 5))) (minus:P (match_dup 4) (match_dup 5)))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"" ""
{ {
operands[4] = gen_reg_rtx (Pmode); operands[4] = gen_reg_rtx (Pmode);
...@@ -1755,7 +1773,7 @@ ...@@ -1755,7 +1773,7 @@
(reg:QI 0) (reg:QI 0)
(match_operand 4 "immediate_operand" "")] UNSPEC_SRST)) (match_operand 4 "immediate_operand" "")] UNSPEC_SRST))
(clobber (match_scratch:P 1 "=a")) (clobber (match_scratch:P 1 "=a"))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"srst\t%0,%1\;jo\t.-4" "srst\t%0,%1\;jo\t.-4"
[(set_attr "length" "8") [(set_attr "length" "8")
...@@ -1848,7 +1866,7 @@ ...@@ -1848,7 +1866,7 @@
(match_operand:BLK 1 "memory_operand" "")) (match_operand:BLK 1 "memory_operand" ""))
(use (match_operand 2 "general_operand" "")) (use (match_operand 2 "general_operand" ""))
(use (match_dup 3)) (use (match_dup 3))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"" ""
{ {
enum machine_mode dword_mode = word_mode == DImode ? TImode : DImode; enum machine_mode dword_mode = word_mode == DImode ? TImode : DImode;
...@@ -1880,7 +1898,7 @@ ...@@ -1880,7 +1898,7 @@
(mem:BLK (subreg:DI (match_operand:TI 3 "register_operand" "1") 0))) (mem:BLK (subreg:DI (match_operand:TI 3 "register_operand" "1") 0)))
(use (match_dup 2)) (use (match_dup 2))
(use (match_dup 3)) (use (match_dup 3))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"mvcle\t%0,%1,0\;jo\t.-4" "mvcle\t%0,%1,0\;jo\t.-4"
[(set_attr "length" "8") [(set_attr "length" "8")
...@@ -1893,7 +1911,7 @@ ...@@ -1893,7 +1911,7 @@
(mem:BLK (subreg:SI (match_operand:DI 3 "register_operand" "1") 0))) (mem:BLK (subreg:SI (match_operand:DI 3 "register_operand" "1") 0)))
(use (match_dup 2)) (use (match_dup 2))
(use (match_dup 3)) (use (match_dup 3))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_64BIT" "!TARGET_64BIT"
"mvcle\t%0,%1,0\;jo\t.-4" "mvcle\t%0,%1,0\;jo\t.-4"
[(set_attr "length" "8") [(set_attr "length" "8")
...@@ -1921,7 +1939,7 @@ ...@@ -1921,7 +1939,7 @@
(use (match_operand 1 "nonmemory_operand" "")) (use (match_operand 1 "nonmemory_operand" ""))
(use (const:BLK (unspec:BLK [(const_int 0)] UNSPEC_INSN))) (use (const:BLK (unspec:BLK [(const_int 0)] UNSPEC_INSN)))
(clobber (match_dup 2)) (clobber (match_dup 2))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"" ""
"operands[2] = gen_rtx_SCRATCH (Pmode);") "operands[2] = gen_rtx_SCRATCH (Pmode);")
...@@ -1931,7 +1949,7 @@ ...@@ -1931,7 +1949,7 @@
(use (match_operand 1 "nonmemory_operand" "n,a,a")) (use (match_operand 1 "nonmemory_operand" "n,a,a"))
(use (match_operand 2 "immediate_operand" "X,R,X")) (use (match_operand 2 "immediate_operand" "X,R,X"))
(clobber (match_scratch 3 "=X,X,&a")) (clobber (match_scratch 3 "=X,X,&a"))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"(GET_MODE (operands[1]) == Pmode || GET_MODE (operands[1]) == VOIDmode) "(GET_MODE (operands[1]) == Pmode || GET_MODE (operands[1]) == VOIDmode)
&& GET_MODE (operands[3]) == Pmode" && GET_MODE (operands[3]) == Pmode"
"#" "#"
...@@ -1943,12 +1961,12 @@ ...@@ -1943,12 +1961,12 @@
(use (match_operand 1 "const_int_operand" "")) (use (match_operand 1 "const_int_operand" ""))
(use (match_operand 2 "immediate_operand" "")) (use (match_operand 2 "immediate_operand" ""))
(clobber (scratch)) (clobber (scratch))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"reload_completed" "reload_completed"
[(parallel [(parallel
[(set (match_dup 0) (const_int 0)) [(set (match_dup 0) (const_int 0))
(use (match_dup 1)) (use (match_dup 1))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"operands[1] = GEN_INT ((INTVAL (operands[1]) & 0xff) + 1);") "operands[1] = GEN_INT ((INTVAL (operands[1]) & 0xff) + 1);")
(define_split (define_split
...@@ -1957,14 +1975,14 @@ ...@@ -1957,14 +1975,14 @@
(use (match_operand 1 "register_operand" "")) (use (match_operand 1 "register_operand" ""))
(use (match_operand 2 "memory_operand" "")) (use (match_operand 2 "memory_operand" ""))
(clobber (scratch)) (clobber (scratch))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"reload_completed" "reload_completed"
[(parallel [(parallel
[(unspec [(match_dup 1) (match_dup 2) [(unspec [(match_dup 1) (match_dup 2)
(const_int 0)] UNSPEC_EXECUTE) (const_int 0)] UNSPEC_EXECUTE)
(set (match_dup 0) (const_int 0)) (set (match_dup 0) (const_int 0))
(use (const_int 1)) (use (const_int 1))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"") "")
(define_split (define_split
...@@ -1973,7 +1991,7 @@ ...@@ -1973,7 +1991,7 @@
(use (match_operand 1 "register_operand" "")) (use (match_operand 1 "register_operand" ""))
(use (const:BLK (unspec:BLK [(const_int 0)] UNSPEC_INSN))) (use (const:BLK (unspec:BLK [(const_int 0)] UNSPEC_INSN)))
(clobber (match_operand 2 "register_operand" "")) (clobber (match_operand 2 "register_operand" ""))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"reload_completed && TARGET_CPU_ZARCH" "reload_completed && TARGET_CPU_ZARCH"
[(set (match_dup 2) (label_ref (match_dup 3))) [(set (match_dup 2) (label_ref (match_dup 3)))
(parallel (parallel
...@@ -1981,7 +1999,7 @@ ...@@ -1981,7 +1999,7 @@
(label_ref (match_dup 3))] UNSPEC_EXECUTE) (label_ref (match_dup 3))] UNSPEC_EXECUTE)
(set (match_dup 0) (const_int 0)) (set (match_dup 0) (const_int 0))
(use (const_int 1)) (use (const_int 1))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"operands[3] = gen_label_rtx ();") "operands[3] = gen_label_rtx ();")
; Clear a block of arbitrary length. ; Clear a block of arbitrary length.
...@@ -1993,7 +2011,7 @@ ...@@ -1993,7 +2011,7 @@
(const_int 0)) (const_int 0))
(use (match_operand 1 "general_operand" "")) (use (match_operand 1 "general_operand" ""))
(use (match_dup 2)) (use (match_dup 2))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"" ""
{ {
enum machine_mode dword_mode = word_mode == DImode ? TImode : DImode; enum machine_mode dword_mode = word_mode == DImode ? TImode : DImode;
...@@ -2019,7 +2037,7 @@ ...@@ -2019,7 +2037,7 @@
(const_int 0)) (const_int 0))
(use (match_dup 2)) (use (match_dup 2))
(use (match_operand:TI 1 "register_operand" "d")) (use (match_operand:TI 1 "register_operand" "d"))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"mvcle\t%0,%1,0\;jo\t.-4" "mvcle\t%0,%1,0\;jo\t.-4"
[(set_attr "length" "8") [(set_attr "length" "8")
...@@ -2031,7 +2049,7 @@ ...@@ -2031,7 +2049,7 @@
(const_int 0)) (const_int 0))
(use (match_dup 2)) (use (match_dup 2))
(use (match_operand:DI 1 "register_operand" "d")) (use (match_operand:DI 1 "register_operand" "d"))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_64BIT" "!TARGET_64BIT"
"mvcle\t%0,%1,0\;jo\t.-4" "mvcle\t%0,%1,0\;jo\t.-4"
[(set_attr "length" "8") [(set_attr "length" "8")
...@@ -2056,7 +2074,7 @@ ...@@ -2056,7 +2074,7 @@
(define_expand "cmpmem_short" (define_expand "cmpmem_short"
[(parallel [(parallel
[(set (reg:CCU 33) [(set (reg:CCU CC_REGNUM)
(compare:CCU (match_operand:BLK 0 "memory_operand" "") (compare:CCU (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))) (match_operand:BLK 1 "memory_operand" "")))
(use (match_operand 2 "nonmemory_operand" "")) (use (match_operand 2 "nonmemory_operand" ""))
...@@ -2066,7 +2084,7 @@ ...@@ -2066,7 +2084,7 @@
"operands[3] = gen_rtx_SCRATCH (Pmode);") "operands[3] = gen_rtx_SCRATCH (Pmode);")
(define_insn "*cmpmem_short" (define_insn "*cmpmem_short"
[(set (reg:CCU 33) [(set (reg:CCU CC_REGNUM)
(compare:CCU (match_operand:BLK 0 "memory_operand" "Q,Q,Q") (compare:CCU (match_operand:BLK 0 "memory_operand" "Q,Q,Q")
(match_operand:BLK 1 "memory_operand" "Q,Q,Q"))) (match_operand:BLK 1 "memory_operand" "Q,Q,Q")))
(use (match_operand 2 "nonmemory_operand" "n,a,a")) (use (match_operand 2 "nonmemory_operand" "n,a,a"))
...@@ -2078,7 +2096,7 @@ ...@@ -2078,7 +2096,7 @@
[(set_attr "type" "cs")]) [(set_attr "type" "cs")])
(define_split (define_split
[(set (reg:CCU 33) [(set (reg:CCU CC_REGNUM)
(compare:CCU (match_operand:BLK 0 "memory_operand" "") (compare:CCU (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))) (match_operand:BLK 1 "memory_operand" "")))
(use (match_operand 2 "const_int_operand" "")) (use (match_operand 2 "const_int_operand" ""))
...@@ -2086,12 +2104,12 @@ ...@@ -2086,12 +2104,12 @@
(clobber (scratch))] (clobber (scratch))]
"reload_completed" "reload_completed"
[(parallel [(parallel
[(set (reg:CCU 33) (compare:CCU (match_dup 0) (match_dup 1))) [(set (reg:CCU CC_REGNUM) (compare:CCU (match_dup 0) (match_dup 1)))
(use (match_dup 2))])] (use (match_dup 2))])]
"operands[2] = GEN_INT ((INTVAL (operands[2]) & 0xff) + 1);") "operands[2] = GEN_INT ((INTVAL (operands[2]) & 0xff) + 1);")
(define_split (define_split
[(set (reg:CCU 33) [(set (reg:CCU CC_REGNUM)
(compare:CCU (match_operand:BLK 0 "memory_operand" "") (compare:CCU (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))) (match_operand:BLK 1 "memory_operand" "")))
(use (match_operand 2 "register_operand" "")) (use (match_operand 2 "register_operand" ""))
...@@ -2101,12 +2119,12 @@ ...@@ -2101,12 +2119,12 @@
[(parallel [(parallel
[(unspec [(match_dup 2) (match_dup 3) [(unspec [(match_dup 2) (match_dup 3)
(const_int 0)] UNSPEC_EXECUTE) (const_int 0)] UNSPEC_EXECUTE)
(set (reg:CCU 33) (compare:CCU (match_dup 0) (match_dup 1))) (set (reg:CCU CC_REGNUM) (compare:CCU (match_dup 0) (match_dup 1)))
(use (const_int 1))])] (use (const_int 1))])]
"") "")
(define_split (define_split
[(set (reg:CCU 33) [(set (reg:CCU CC_REGNUM)
(compare:CCU (match_operand:BLK 0 "memory_operand" "") (compare:CCU (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))) (match_operand:BLK 1 "memory_operand" "")))
(use (match_operand 2 "register_operand" "")) (use (match_operand 2 "register_operand" ""))
...@@ -2117,7 +2135,7 @@ ...@@ -2117,7 +2135,7 @@
(parallel (parallel
[(unspec [(match_dup 2) (mem:BLK (match_dup 3)) [(unspec [(match_dup 2) (mem:BLK (match_dup 3))
(label_ref (match_dup 4))] UNSPEC_EXECUTE) (label_ref (match_dup 4))] UNSPEC_EXECUTE)
(set (reg:CCU 33) (compare:CCU (match_dup 0) (match_dup 1))) (set (reg:CCU CC_REGNUM) (compare:CCU (match_dup 0) (match_dup 1)))
(use (const_int 1))])] (use (const_int 1))])]
"operands[4] = gen_label_rtx ();") "operands[4] = gen_label_rtx ();")
...@@ -2127,7 +2145,7 @@ ...@@ -2127,7 +2145,7 @@
[(parallel [(parallel
[(clobber (match_dup 2)) [(clobber (match_dup 2))
(clobber (match_dup 3)) (clobber (match_dup 3))
(set (reg:CCU 33) (set (reg:CCU CC_REGNUM)
(compare:CCU (match_operand:BLK 0 "memory_operand" "") (compare:CCU (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))) (match_operand:BLK 1 "memory_operand" "")))
(use (match_operand 2 "general_operand" "")) (use (match_operand 2 "general_operand" ""))
...@@ -2159,7 +2177,7 @@ ...@@ -2159,7 +2177,7 @@
(define_insn "*cmpmem_long_64" (define_insn "*cmpmem_long_64"
[(clobber (match_operand:TI 0 "register_operand" "=d")) [(clobber (match_operand:TI 0 "register_operand" "=d"))
(clobber (match_operand:TI 1 "register_operand" "=d")) (clobber (match_operand:TI 1 "register_operand" "=d"))
(set (reg:CCU 33) (set (reg:CCU CC_REGNUM)
(compare:CCU (mem:BLK (subreg:DI (match_operand:TI 2 "register_operand" "0") 0)) (compare:CCU (mem:BLK (subreg:DI (match_operand:TI 2 "register_operand" "0") 0))
(mem:BLK (subreg:DI (match_operand:TI 3 "register_operand" "1") 0)))) (mem:BLK (subreg:DI (match_operand:TI 3 "register_operand" "1") 0))))
(use (match_dup 2)) (use (match_dup 2))
...@@ -2172,7 +2190,7 @@ ...@@ -2172,7 +2190,7 @@
(define_insn "*cmpmem_long_31" (define_insn "*cmpmem_long_31"
[(clobber (match_operand:DI 0 "register_operand" "=d")) [(clobber (match_operand:DI 0 "register_operand" "=d"))
(clobber (match_operand:DI 1 "register_operand" "=d")) (clobber (match_operand:DI 1 "register_operand" "=d"))
(set (reg:CCU 33) (set (reg:CCU CC_REGNUM)
(compare:CCU (mem:BLK (subreg:SI (match_operand:DI 2 "register_operand" "0") 0)) (compare:CCU (mem:BLK (subreg:SI (match_operand:DI 2 "register_operand" "0") 0))
(mem:BLK (subreg:SI (match_operand:DI 3 "register_operand" "1") 0)))) (mem:BLK (subreg:SI (match_operand:DI 3 "register_operand" "1") 0))))
(use (match_dup 2)) (use (match_dup 2))
...@@ -2189,17 +2207,17 @@ ...@@ -2189,17 +2207,17 @@
[(set (match_operand:SI 0 "register_operand" "=d") [(set (match_operand:SI 0 "register_operand" "=d")
(unspec:SI [(match_operand:CCU 1 "register_operand" "0")] (unspec:SI [(match_operand:CCU 1 "register_operand" "0")]
UNSPEC_CMPINT)) UNSPEC_CMPINT))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"#" "#"
"reload_completed" "reload_completed"
[(set (match_dup 0) (ashift:SI (match_dup 0) (const_int 2))) [(set (match_dup 0) (ashift:SI (match_dup 0) (const_int 2)))
(parallel (parallel
[(set (match_dup 0) (ashiftrt:SI (match_dup 0) (const_int 30))) [(set (match_dup 0) (ashiftrt:SI (match_dup 0) (const_int 30)))
(clobber (reg:CC 33))])]) (clobber (reg:CC CC_REGNUM))])])
(define_insn_and_split "*cmpint_cc" (define_insn_and_split "*cmpint_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (unspec:SI [(match_operand:CCU 1 "register_operand" "0")] (compare (unspec:SI [(match_operand:CCU 1 "register_operand" "0")]
UNSPEC_CMPINT) UNSPEC_CMPINT)
(const_int 0))) (const_int 0)))
...@@ -2222,17 +2240,17 @@ ...@@ -2222,17 +2240,17 @@
[(set (match_operand:DI 0 "register_operand" "=d") [(set (match_operand:DI 0 "register_operand" "=d")
(sign_extend:DI (unspec:SI [(match_operand:CCU 1 "register_operand" "0")] (sign_extend:DI (unspec:SI [(match_operand:CCU 1 "register_operand" "0")]
UNSPEC_CMPINT))) UNSPEC_CMPINT)))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(set (match_dup 0) (ashift:DI (match_dup 0) (const_int 34))) [(set (match_dup 0) (ashift:DI (match_dup 0) (const_int 34)))
(parallel (parallel
[(set (match_dup 0) (ashiftrt:DI (match_dup 0) (const_int 62))) [(set (match_dup 0) (ashiftrt:DI (match_dup 0) (const_int 62)))
(clobber (reg:CC 33))])]) (clobber (reg:CC CC_REGNUM))])])
(define_insn_and_split "*cmpint_sign_cc" (define_insn_and_split "*cmpint_sign_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (ashiftrt:DI (ashift:DI (subreg:DI (compare (ashiftrt:DI (ashift:DI (subreg:DI
(unspec:SI [(match_operand:CCU 1 "register_operand" "0")] (unspec:SI [(match_operand:CCU 1 "register_operand" "0")]
UNSPEC_CMPINT) 0) UNSPEC_CMPINT) 0)
...@@ -2262,7 +2280,7 @@ ...@@ -2262,7 +2280,7 @@
(define_insn "*sethigh<mode>si" (define_insn "*sethigh<mode>si"
[(set (match_operand:SI 0 "register_operand" "=d,d") [(set (match_operand:SI 0 "register_operand" "=d,d")
(unspec:SI [(match_operand:HQI 1 "s_operand" "Q,S")] UNSPEC_SETHIGH)) (unspec:SI [(match_operand:HQI 1 "s_operand" "Q,S")] UNSPEC_SETHIGH))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"@ "@
icm\t%0,<icm_hi>,%S1 icm\t%0,<icm_hi>,%S1
...@@ -2272,7 +2290,7 @@ ...@@ -2272,7 +2290,7 @@
(define_insn "*sethighqidi_64" (define_insn "*sethighqidi_64"
[(set (match_operand:DI 0 "register_operand" "=d") [(set (match_operand:DI 0 "register_operand" "=d")
(unspec:DI [(match_operand:QI 1 "s_operand" "QS")] UNSPEC_SETHIGH)) (unspec:DI [(match_operand:QI 1 "s_operand" "QS")] UNSPEC_SETHIGH))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"icmh\t%0,8,%S1" "icmh\t%0,8,%S1"
[(set_attr "op_type" "RSY")]) [(set_attr "op_type" "RSY")])
...@@ -2280,7 +2298,7 @@ ...@@ -2280,7 +2298,7 @@
(define_insn "*sethighqidi_31" (define_insn "*sethighqidi_31"
[(set (match_operand:DI 0 "register_operand" "=d,d") [(set (match_operand:DI 0 "register_operand" "=d,d")
(unspec:DI [(match_operand:QI 1 "s_operand" "Q,S")] UNSPEC_SETHIGH)) (unspec:DI [(match_operand:QI 1 "s_operand" "Q,S")] UNSPEC_SETHIGH))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_64BIT" "!TARGET_64BIT"
"@ "@
icm\t%0,8,%S1 icm\t%0,8,%S1
...@@ -2292,14 +2310,14 @@ ...@@ -2292,14 +2310,14 @@
(zero_extract:SI (match_operand:QI 1 "s_operand" "Q") (zero_extract:SI (match_operand:QI 1 "s_operand" "Q")
(match_operand 2 "const_int_operand" "n") (match_operand 2 "const_int_operand" "n")
(const_int 0))) (const_int 0)))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_64BIT "!TARGET_64BIT
&& INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 8" && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 8"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(parallel [(parallel
[(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_SETHIGH)) [(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_SETHIGH))
(clobber (reg:CC 33))]) (clobber (reg:CC CC_REGNUM))])
(set (match_dup 0) (lshiftrt:SI (match_dup 0) (match_dup 2)))] (set (match_dup 0) (lshiftrt:SI (match_dup 0) (match_dup 2)))]
{ {
operands[2] = GEN_INT (32 - INTVAL (operands[2])); operands[2] = GEN_INT (32 - INTVAL (operands[2]));
...@@ -2311,14 +2329,14 @@ ...@@ -2311,14 +2329,14 @@
(zero_extract:SI (match_operand:QI 1 "s_operand" "Q") (zero_extract:SI (match_operand:QI 1 "s_operand" "Q")
(match_operand 2 "const_int_operand" "n") (match_operand 2 "const_int_operand" "n")
(const_int 0))) (const_int 0)))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_64BIT "!TARGET_64BIT
&& INTVAL (operands[2]) >= 8 && INTVAL (operands[2]) < 16" && INTVAL (operands[2]) >= 8 && INTVAL (operands[2]) < 16"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(parallel [(parallel
[(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_SETHIGH)) [(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_SETHIGH))
(clobber (reg:CC 33))]) (clobber (reg:CC CC_REGNUM))])
(set (match_dup 0) (lshiftrt:SI (match_dup 0) (match_dup 2)))] (set (match_dup 0) (lshiftrt:SI (match_dup 0) (match_dup 2)))]
{ {
operands[2] = GEN_INT (32 - INTVAL (operands[2])); operands[2] = GEN_INT (32 - INTVAL (operands[2]));
...@@ -2401,16 +2419,16 @@ ...@@ -2401,16 +2419,16 @@
(define_insn_and_split "*extendqidi2_short_displ" (define_insn_and_split "*extendqidi2_short_displ"
[(set (match_operand:DI 0 "register_operand" "=d") [(set (match_operand:DI 0 "register_operand" "=d")
(sign_extend:DI (match_operand:QI 1 "s_operand" "Q"))) (sign_extend:DI (match_operand:QI 1 "s_operand" "Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT && !TARGET_LONG_DISPLACEMENT" "TARGET_64BIT && !TARGET_LONG_DISPLACEMENT"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(parallel [(parallel
[(set (match_dup 0) (unspec:DI [(match_dup 1)] UNSPEC_SETHIGH)) [(set (match_dup 0) (unspec:DI [(match_dup 1)] UNSPEC_SETHIGH))
(clobber (reg:CC 33))]) (clobber (reg:CC CC_REGNUM))])
(parallel (parallel
[(set (match_dup 0) (ashiftrt:DI (match_dup 0) (const_int 56))) [(set (match_dup 0) (ashiftrt:DI (match_dup 0) (const_int 56)))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"") "")
; ;
...@@ -2451,16 +2469,16 @@ ...@@ -2451,16 +2469,16 @@
(define_insn_and_split "*extendqisi2_short_displ" (define_insn_and_split "*extendqisi2_short_displ"
[(set (match_operand:SI 0 "register_operand" "=d") [(set (match_operand:SI 0 "register_operand" "=d")
(sign_extend:SI (match_operand:QI 1 "s_operand" "Q"))) (sign_extend:SI (match_operand:QI 1 "s_operand" "Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_LONG_DISPLACEMENT" "!TARGET_LONG_DISPLACEMENT"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(parallel [(parallel
[(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_SETHIGH)) [(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_SETHIGH))
(clobber (reg:CC 33))]) (clobber (reg:CC CC_REGNUM))])
(parallel (parallel
[(set (match_dup 0) (ashiftrt:SI (match_dup 0) (const_int 24))) [(set (match_dup 0) (ashiftrt:SI (match_dup 0) (const_int 24)))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"") "")
; ;
...@@ -2549,7 +2567,7 @@ ...@@ -2549,7 +2567,7 @@
[(set (match_operand:DI 0 "register_operand" "=d") [(set (match_operand:DI 0 "register_operand" "=d")
(and:DI (subreg:DI (match_operand:SI 1 "memory_operand" "m") 0) (and:DI (subreg:DI (match_operand:SI 1 "memory_operand" "m") 0)
(const_int 2147483647))) (const_int 2147483647)))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"#" "#"
"&& reload_completed" "&& reload_completed"
...@@ -2582,7 +2600,7 @@ ...@@ -2582,7 +2600,7 @@
[(set (match_operand:GPR 0 "register_operand" "") [(set (match_operand:GPR 0 "register_operand" "")
(and:GPR (match_operand:GPR 1 "nonimmediate_operand" "") (and:GPR (match_operand:GPR 1 "nonimmediate_operand" "")
(const_int 2147483647))) (const_int 2147483647)))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT && reload_completed" "TARGET_64BIT && reload_completed"
[(set (match_dup 0) [(set (match_dup 0)
(and:GPR (match_dup 1) (and:GPR (match_dup 1)
...@@ -2616,14 +2634,14 @@ ...@@ -2616,14 +2634,14 @@
(define_insn_and_split "*zero_extendhisi2_31" (define_insn_and_split "*zero_extendhisi2_31"
[(set (match_operand:SI 0 "register_operand" "=&d") [(set (match_operand:SI 0 "register_operand" "=&d")
(zero_extend:SI (match_operand:HI 1 "s_operand" "QS"))) (zero_extend:SI (match_operand:HI 1 "s_operand" "QS")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_ZARCH" "!TARGET_ZARCH"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(set (match_dup 0) (const_int 0)) [(set (match_dup 0) (const_int 0))
(parallel (parallel
[(set (strict_low_part (match_dup 2)) (match_dup 1)) [(set (strict_low_part (match_dup 2)) (match_dup 1))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"operands[2] = gen_lowpart (HImode, operands[0]);") "operands[2] = gen_lowpart (HImode, operands[0]);")
(define_insn_and_split "*zero_extendqisi2_31" (define_insn_and_split "*zero_extendqisi2_31"
...@@ -2719,7 +2737,7 @@ ...@@ -2719,7 +2737,7 @@
[(set (match_operand:GPR 0 "register_operand" "=d") [(set (match_operand:GPR 0 "register_operand" "=d")
(fix:GPR (match_operand:FPR 1 "register_operand" "f"))) (fix:GPR (match_operand:FPR 1 "register_operand" "f")))
(unspec:GPR [(match_operand:GPR 2 "immediate_operand" "K")] UNSPEC_ROUND) (unspec:GPR [(match_operand:GPR 2 "immediate_operand" "K")] UNSPEC_ROUND)
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"c<GPR:gf><FPR:de>br\t%0,%h2,%1" "c<GPR:gf><FPR:de>br\t%0,%h2,%1"
[(set_attr "op_type" "RRE") [(set_attr "op_type" "RRE")
...@@ -2761,7 +2779,7 @@ ...@@ -2761,7 +2779,7 @@
(use (match_operand:DI 2 "immediate_operand" "m")) (use (match_operand:DI 2 "immediate_operand" "m"))
(use (match_operand:DI 3 "immediate_operand" "m")) (use (match_operand:DI 3 "immediate_operand" "m"))
(use (match_operand:BLK 4 "memory_operand" "m")) (use (match_operand:BLK 4 "memory_operand" "m"))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT"
{ {
output_asm_insn ("sd\t%1,%2", operands); output_asm_insn ("sd\t%1,%2", operands);
...@@ -2843,7 +2861,7 @@ ...@@ -2843,7 +2861,7 @@
(float:DF (match_operand:SI 1 "register_operand" "d"))) (float:DF (match_operand:SI 1 "register_operand" "d")))
(use (match_operand:DI 2 "immediate_operand" "m")) (use (match_operand:DI 2 "immediate_operand" "m"))
(use (match_operand:BLK 3 "memory_operand" "m")) (use (match_operand:BLK 3 "memory_operand" "m"))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT"
{ {
output_asm_insn ("st\t%1,%N3", operands); output_asm_insn ("st\t%1,%N3", operands);
...@@ -2937,7 +2955,7 @@ ...@@ -2937,7 +2955,7 @@
(define_insn "extendsfdf2_ibm" (define_insn "extendsfdf2_ibm"
[(set (match_operand:DF 0 "register_operand" "=f,f") [(set (match_operand:DF 0 "register_operand" "=f,f")
(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "f,R"))) (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "f,R")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT"
"@ "@
sdr\t%0,%0\;ler\t%0,%1 sdr\t%0,%0\;ler\t%0,%1
...@@ -2965,19 +2983,19 @@ ...@@ -2965,19 +2983,19 @@
[(set (match_operand:TI 0 "register_operand" "=&d") [(set (match_operand:TI 0 "register_operand" "=&d")
(plus:TI (match_operand:TI 1 "nonimmediate_operand" "%0") (plus:TI (match_operand:TI 1 "nonimmediate_operand" "%0")
(match_operand:TI 2 "general_operand" "do") ) ) (match_operand:TI 2 "general_operand" "do") ) )
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(parallel [(parallel
[(set (reg:CCL1 33) [(set (reg:CCL1 CC_REGNUM)
(compare:CCL1 (plus:DI (match_dup 7) (match_dup 8)) (compare:CCL1 (plus:DI (match_dup 7) (match_dup 8))
(match_dup 7))) (match_dup 7)))
(set (match_dup 6) (plus:DI (match_dup 7) (match_dup 8)))]) (set (match_dup 6) (plus:DI (match_dup 7) (match_dup 8)))])
(parallel (parallel
[(set (match_dup 3) (plus:DI (plus:DI (match_dup 4) (match_dup 5)) [(set (match_dup 3) (plus:DI (plus:DI (match_dup 4) (match_dup 5))
(ltu:DI (reg:CCL1 33) (const_int 0)))) (ltu:DI (reg:CCL1 CC_REGNUM) (const_int 0))))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"operands[3] = operand_subword (operands[0], 0, 0, TImode); "operands[3] = operand_subword (operands[0], 0, 0, TImode);
operands[4] = operand_subword (operands[1], 0, 0, TImode); operands[4] = operand_subword (operands[1], 0, 0, TImode);
operands[5] = operand_subword (operands[2], 0, 0, TImode); operands[5] = operand_subword (operands[2], 0, 0, TImode);
...@@ -2993,7 +3011,7 @@ ...@@ -2993,7 +3011,7 @@
[(set (match_operand:DI 0 "register_operand" "=d,d") [(set (match_operand:DI 0 "register_operand" "=d,d")
(plus:DI (sign_extend:DI (match_operand:SI 2 "general_operand" "d,m")) (plus:DI (sign_extend:DI (match_operand:SI 2 "general_operand" "d,m"))
(match_operand:DI 1 "register_operand" "0,0"))) (match_operand:DI 1 "register_operand" "0,0")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"@ "@
agfr\t%0,%2 agfr\t%0,%2
...@@ -3001,7 +3019,7 @@ ...@@ -3001,7 +3019,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*adddi3_zero_cc" (define_insn "*adddi3_zero_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:DI (zero_extend:DI (match_operand:SI 2 "general_operand" "d,m")) (compare (plus:DI (zero_extend:DI (match_operand:SI 2 "general_operand" "d,m"))
(match_operand:DI 1 "register_operand" "0,0")) (match_operand:DI 1 "register_operand" "0,0"))
(const_int 0))) (const_int 0)))
...@@ -3014,7 +3032,7 @@ ...@@ -3014,7 +3032,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*adddi3_zero_cconly" (define_insn "*adddi3_zero_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:DI (zero_extend:DI (match_operand:SI 2 "general_operand" "d,m")) (compare (plus:DI (zero_extend:DI (match_operand:SI 2 "general_operand" "d,m"))
(match_operand:DI 1 "register_operand" "0,0")) (match_operand:DI 1 "register_operand" "0,0"))
(const_int 0))) (const_int 0)))
...@@ -3029,7 +3047,7 @@ ...@@ -3029,7 +3047,7 @@
[(set (match_operand:DI 0 "register_operand" "=d,d") [(set (match_operand:DI 0 "register_operand" "=d,d")
(plus:DI (zero_extend:DI (match_operand:SI 2 "general_operand" "d,m")) (plus:DI (zero_extend:DI (match_operand:SI 2 "general_operand" "d,m"))
(match_operand:DI 1 "register_operand" "0,0"))) (match_operand:DI 1 "register_operand" "0,0")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"@ "@
algfr\t%0,%2 algfr\t%0,%2
...@@ -3037,7 +3055,7 @@ ...@@ -3037,7 +3055,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*adddi3_imm_cc" (define_insn "*adddi3_imm_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "0") (compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "0")
(match_operand:DI 2 "const_int_operand" "K")) (match_operand:DI 2 "const_int_operand" "K"))
(const_int 0))) (const_int 0)))
...@@ -3050,7 +3068,7 @@ ...@@ -3050,7 +3068,7 @@
[(set_attr "op_type" "RI")]) [(set_attr "op_type" "RI")])
(define_insn "*adddi3_carry1_cc" (define_insn "*adddi3_carry1_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0") (compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
(match_operand:DI 2 "general_operand" "d,m")) (match_operand:DI 2 "general_operand" "d,m"))
(match_dup 1))) (match_dup 1)))
...@@ -3063,7 +3081,7 @@ ...@@ -3063,7 +3081,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*adddi3_carry1_cconly" (define_insn "*adddi3_carry1_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0") (compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
(match_operand:DI 2 "general_operand" "d,m")) (match_operand:DI 2 "general_operand" "d,m"))
(match_dup 1))) (match_dup 1)))
...@@ -3075,7 +3093,7 @@ ...@@ -3075,7 +3093,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*adddi3_carry2_cc" (define_insn "*adddi3_carry2_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0") (compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
(match_operand:DI 2 "general_operand" "d,m")) (match_operand:DI 2 "general_operand" "d,m"))
(match_dup 2))) (match_dup 2)))
...@@ -3088,7 +3106,7 @@ ...@@ -3088,7 +3106,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*adddi3_carry2_cconly" (define_insn "*adddi3_carry2_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0") (compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
(match_operand:DI 2 "general_operand" "d,m")) (match_operand:DI 2 "general_operand" "d,m"))
(match_dup 2))) (match_dup 2)))
...@@ -3100,7 +3118,7 @@ ...@@ -3100,7 +3118,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*adddi3_cc" (define_insn "*adddi3_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0") (compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
(match_operand:DI 2 "general_operand" "d,m")) (match_operand:DI 2 "general_operand" "d,m"))
(const_int 0))) (const_int 0)))
...@@ -3113,7 +3131,7 @@ ...@@ -3113,7 +3131,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*adddi3_cconly" (define_insn "*adddi3_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0") (compare (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
(match_operand:DI 2 "general_operand" "d,m")) (match_operand:DI 2 "general_operand" "d,m"))
(const_int 0))) (const_int 0)))
...@@ -3125,7 +3143,7 @@ ...@@ -3125,7 +3143,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*adddi3_cconly2" (define_insn "*adddi3_cconly2"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:DI 1 "nonimmediate_operand" "%0,0") (compare (match_operand:DI 1 "nonimmediate_operand" "%0,0")
(neg:SI (match_operand:DI 2 "general_operand" "d,m")))) (neg:SI (match_operand:DI 2 "general_operand" "d,m"))))
(clobber (match_scratch:DI 0 "=d,d"))] (clobber (match_scratch:DI 0 "=d,d"))]
...@@ -3139,7 +3157,7 @@ ...@@ -3139,7 +3157,7 @@
[(set (match_operand:DI 0 "register_operand" "=d,d,d") [(set (match_operand:DI 0 "register_operand" "=d,d,d")
(plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0,0") (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:DI 2 "general_operand" "d,K,m") ) ) (match_operand:DI 2 "general_operand" "d,K,m") ) )
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"@ "@
agr\t%0,%2 agr\t%0,%2
...@@ -3151,19 +3169,19 @@ ...@@ -3151,19 +3169,19 @@
[(set (match_operand:DI 0 "register_operand" "=&d") [(set (match_operand:DI 0 "register_operand" "=&d")
(plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0") (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0")
(match_operand:DI 2 "general_operand" "do") ) ) (match_operand:DI 2 "general_operand" "do") ) )
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_64BIT && TARGET_CPU_ZARCH" "!TARGET_64BIT && TARGET_CPU_ZARCH"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(parallel [(parallel
[(set (reg:CCL1 33) [(set (reg:CCL1 CC_REGNUM)
(compare:CCL1 (plus:SI (match_dup 7) (match_dup 8)) (compare:CCL1 (plus:SI (match_dup 7) (match_dup 8))
(match_dup 7))) (match_dup 7)))
(set (match_dup 6) (plus:SI (match_dup 7) (match_dup 8)))]) (set (match_dup 6) (plus:SI (match_dup 7) (match_dup 8)))])
(parallel (parallel
[(set (match_dup 3) (plus:SI (plus:SI (match_dup 4) (match_dup 5)) [(set (match_dup 3) (plus:SI (plus:SI (match_dup 4) (match_dup 5))
(ltu:SI (reg:CCL1 33) (const_int 0)))) (ltu:SI (reg:CCL1 CC_REGNUM) (const_int 0))))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"operands[3] = operand_subword (operands[0], 0, 0, DImode); "operands[3] = operand_subword (operands[0], 0, 0, DImode);
operands[4] = operand_subword (operands[1], 0, 0, DImode); operands[4] = operand_subword (operands[1], 0, 0, DImode);
operands[5] = operand_subword (operands[2], 0, 0, DImode); operands[5] = operand_subword (operands[2], 0, 0, DImode);
...@@ -3175,25 +3193,25 @@ ...@@ -3175,25 +3193,25 @@
[(set (match_operand:DI 0 "register_operand" "=&d") [(set (match_operand:DI 0 "register_operand" "=&d")
(plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0") (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0")
(match_operand:DI 2 "general_operand" "do") ) ) (match_operand:DI 2 "general_operand" "do") ) )
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_CPU_ZARCH" "!TARGET_CPU_ZARCH"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(parallel [(parallel
[(set (match_dup 3) (plus:SI (match_dup 4) (match_dup 5))) [(set (match_dup 3) (plus:SI (match_dup 4) (match_dup 5)))
(clobber (reg:CC 33))]) (clobber (reg:CC CC_REGNUM))])
(parallel (parallel
[(set (reg:CCL1 33) [(set (reg:CCL1 CC_REGNUM)
(compare:CCL1 (plus:SI (match_dup 7) (match_dup 8)) (compare:CCL1 (plus:SI (match_dup 7) (match_dup 8))
(match_dup 7))) (match_dup 7)))
(set (match_dup 6) (plus:SI (match_dup 7) (match_dup 8)))]) (set (match_dup 6) (plus:SI (match_dup 7) (match_dup 8)))])
(set (pc) (set (pc)
(if_then_else (ltu (reg:CCL1 33) (const_int 0)) (if_then_else (ltu (reg:CCL1 CC_REGNUM) (const_int 0))
(pc) (pc)
(label_ref (match_dup 9)))) (label_ref (match_dup 9))))
(parallel (parallel
[(set (match_dup 3) (plus:SI (match_dup 3) (const_int 1))) [(set (match_dup 3) (plus:SI (match_dup 3) (const_int 1)))
(clobber (reg:CC 33))]) (clobber (reg:CC CC_REGNUM))])
(match_dup 9)] (match_dup 9)]
"operands[3] = operand_subword (operands[0], 0, 0, DImode); "operands[3] = operand_subword (operands[0], 0, 0, DImode);
operands[4] = operand_subword (operands[1], 0, 0, DImode); operands[4] = operand_subword (operands[1], 0, 0, DImode);
...@@ -3208,7 +3226,7 @@ ...@@ -3208,7 +3226,7 @@
[(set (match_operand:DI 0 "register_operand" "") [(set (match_operand:DI 0 "register_operand" "")
(plus:DI (match_operand:DI 1 "nonimmediate_operand" "") (plus:DI (match_operand:DI 1 "nonimmediate_operand" "")
(match_operand:DI 2 "general_operand" ""))) (match_operand:DI 2 "general_operand" "")))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"" ""
"") "")
...@@ -3217,7 +3235,7 @@ ...@@ -3217,7 +3235,7 @@
; ;
(define_insn "*addsi3_imm_cc" (define_insn "*addsi3_imm_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:SI (match_operand:SI 1 "nonimmediate_operand" "0") (compare (plus:SI (match_operand:SI 1 "nonimmediate_operand" "0")
(match_operand:SI 2 "const_int_operand" "K")) (match_operand:SI 2 "const_int_operand" "K"))
(const_int 0))) (const_int 0)))
...@@ -3229,7 +3247,7 @@ ...@@ -3229,7 +3247,7 @@
[(set_attr "op_type" "RI")]) [(set_attr "op_type" "RI")])
(define_insn "*addsi3_carry1_cc" (define_insn "*addsi3_carry1_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0") (compare (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T")) (match_operand:SI 2 "general_operand" "d,R,T"))
(match_dup 1))) (match_dup 1)))
...@@ -3243,7 +3261,7 @@ ...@@ -3243,7 +3261,7 @@
[(set_attr "op_type" "RR,RX,RXY")]) [(set_attr "op_type" "RR,RX,RXY")])
(define_insn "*addsi3_carry1_cconly" (define_insn "*addsi3_carry1_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0") (compare (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T")) (match_operand:SI 2 "general_operand" "d,R,T"))
(match_dup 1))) (match_dup 1)))
...@@ -3256,7 +3274,7 @@ ...@@ -3256,7 +3274,7 @@
[(set_attr "op_type" "RR,RX,RXY")]) [(set_attr "op_type" "RR,RX,RXY")])
(define_insn "*addsi3_carry2_cc" (define_insn "*addsi3_carry2_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0") (compare (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T")) (match_operand:SI 2 "general_operand" "d,R,T"))
(match_dup 2))) (match_dup 2)))
...@@ -3270,7 +3288,7 @@ ...@@ -3270,7 +3288,7 @@
[(set_attr "op_type" "RR,RX,RXY")]) [(set_attr "op_type" "RR,RX,RXY")])
(define_insn "*addsi3_carry2_cconly" (define_insn "*addsi3_carry2_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0") (compare (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T")) (match_operand:SI 2 "general_operand" "d,R,T"))
(match_dup 2))) (match_dup 2)))
...@@ -3283,7 +3301,7 @@ ...@@ -3283,7 +3301,7 @@
[(set_attr "op_type" "RR,RX,RXY")]) [(set_attr "op_type" "RR,RX,RXY")])
(define_insn "*addsi3_cc" (define_insn "*addsi3_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0") (compare (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T")) (match_operand:SI 2 "general_operand" "d,R,T"))
(const_int 0))) (const_int 0)))
...@@ -3297,7 +3315,7 @@ ...@@ -3297,7 +3315,7 @@
[(set_attr "op_type" "RR,RX,RXY")]) [(set_attr "op_type" "RR,RX,RXY")])
(define_insn "*addsi3_cconly" (define_insn "*addsi3_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0") (compare (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T")) (match_operand:SI 2 "general_operand" "d,R,T"))
(const_int 0))) (const_int 0)))
...@@ -3310,7 +3328,7 @@ ...@@ -3310,7 +3328,7 @@
[(set_attr "op_type" "RR,RX,RXY")]) [(set_attr "op_type" "RR,RX,RXY")])
(define_insn "*addsi3_cconly2" (define_insn "*addsi3_cconly2"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:SI 1 "nonimmediate_operand" "%0,0,0") (compare (match_operand:SI 1 "nonimmediate_operand" "%0,0,0")
(neg:SI (match_operand:SI 2 "general_operand" "d,R,T")))) (neg:SI (match_operand:SI 2 "general_operand" "d,R,T"))))
(clobber (match_scratch:SI 0 "=d,d,d"))] (clobber (match_scratch:SI 0 "=d,d,d"))]
...@@ -3325,7 +3343,7 @@ ...@@ -3325,7 +3343,7 @@
[(set (match_operand:SI 0 "register_operand" "=d,d") [(set (match_operand:SI 0 "register_operand" "=d,d")
(plus:SI (sign_extend:SI (match_operand:HI 2 "memory_operand" "R,T")) (plus:SI (sign_extend:SI (match_operand:HI 2 "memory_operand" "R,T"))
(match_operand:SI 1 "register_operand" "0,0"))) (match_operand:SI 1 "register_operand" "0,0")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"@ "@
ah\t%0,%2 ah\t%0,%2
...@@ -3336,7 +3354,7 @@ ...@@ -3336,7 +3354,7 @@
[(set (match_operand:SI 0 "register_operand" "=d,d,d,d") [(set (match_operand:SI 0 "register_operand" "=d,d,d,d")
(plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0,0") (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0,0")
(match_operand:SI 2 "general_operand" "d,K,R,T"))) (match_operand:SI 2 "general_operand" "d,K,R,T")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"@ "@
ar\t%0,%2 ar\t%0,%2
...@@ -3354,7 +3372,7 @@ ...@@ -3354,7 +3372,7 @@
[(set (match_operand:FPR 0 "register_operand" "=f,f") [(set (match_operand:FPR 0 "register_operand" "=f,f")
(plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0") (plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0")
(match_operand:FPR 2 "general_operand" "f,R"))) (match_operand:FPR 2 "general_operand" "f,R")))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"TARGET_HARD_FLOAT" "TARGET_HARD_FLOAT"
"") "")
...@@ -3362,7 +3380,7 @@ ...@@ -3362,7 +3380,7 @@
[(set (match_operand:FPR 0 "register_operand" "=f,f") [(set (match_operand:FPR 0 "register_operand" "=f,f")
(plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0") (plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0")
(match_operand:FPR 2 "general_operand" "f,R"))) (match_operand:FPR 2 "general_operand" "f,R")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"@ "@
a<de>br\t%0,%2 a<de>br\t%0,%2
...@@ -3371,7 +3389,7 @@ ...@@ -3371,7 +3389,7 @@
(set_attr "type" "fsimp<mode>")]) (set_attr "type" "fsimp<mode>")])
(define_insn "*add<mode>3_cc" (define_insn "*add<mode>3_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0") (compare (plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0")
(match_operand:FPR 2 "general_operand" "f,R")) (match_operand:FPR 2 "general_operand" "f,R"))
(match_operand:FPR 3 "const0_operand" ""))) (match_operand:FPR 3 "const0_operand" "")))
...@@ -3385,7 +3403,7 @@ ...@@ -3385,7 +3403,7 @@
(set_attr "type" "fsimp<mode>")]) (set_attr "type" "fsimp<mode>")])
(define_insn "*add<mode>3_cconly" (define_insn "*add<mode>3_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0") (compare (plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0")
(match_operand:FPR 2 "general_operand" "f,R")) (match_operand:FPR 2 "general_operand" "f,R"))
(match_operand:FPR 3 "const0_operand" ""))) (match_operand:FPR 3 "const0_operand" "")))
...@@ -3401,7 +3419,7 @@ ...@@ -3401,7 +3419,7 @@
[(set (match_operand:FPR 0 "register_operand" "=f,f") [(set (match_operand:FPR 0 "register_operand" "=f,f")
(plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0") (plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0")
(match_operand:FPR 2 "general_operand" "f,R"))) (match_operand:FPR 2 "general_operand" "f,R")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT"
"@ "@
a<de>r\t%0,%2 a<de>r\t%0,%2
...@@ -3422,19 +3440,19 @@ ...@@ -3422,19 +3440,19 @@
[(set (match_operand:TI 0 "register_operand" "=&d") [(set (match_operand:TI 0 "register_operand" "=&d")
(minus:TI (match_operand:TI 1 "register_operand" "0") (minus:TI (match_operand:TI 1 "register_operand" "0")
(match_operand:TI 2 "general_operand" "do") ) ) (match_operand:TI 2 "general_operand" "do") ) )
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(parallel [(parallel
[(set (reg:CCL2 33) [(set (reg:CCL2 CC_REGNUM)
(compare:CCL2 (minus:DI (match_dup 7) (match_dup 8)) (compare:CCL2 (minus:DI (match_dup 7) (match_dup 8))
(match_dup 7))) (match_dup 7)))
(set (match_dup 6) (minus:DI (match_dup 7) (match_dup 8)))]) (set (match_dup 6) (minus:DI (match_dup 7) (match_dup 8)))])
(parallel (parallel
[(set (match_dup 3) (minus:DI (minus:DI (match_dup 4) (match_dup 5)) [(set (match_dup 3) (minus:DI (minus:DI (match_dup 4) (match_dup 5))
(gtu:DI (reg:CCL2 33) (const_int 0)))) (gtu:DI (reg:CCL2 CC_REGNUM) (const_int 0))))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"operands[3] = operand_subword (operands[0], 0, 0, TImode); "operands[3] = operand_subword (operands[0], 0, 0, TImode);
operands[4] = operand_subword (operands[1], 0, 0, TImode); operands[4] = operand_subword (operands[1], 0, 0, TImode);
operands[5] = operand_subword (operands[2], 0, 0, TImode); operands[5] = operand_subword (operands[2], 0, 0, TImode);
...@@ -3450,7 +3468,7 @@ ...@@ -3450,7 +3468,7 @@
[(set (match_operand:DI 0 "register_operand" "=d,d") [(set (match_operand:DI 0 "register_operand" "=d,d")
(minus:DI (match_operand:DI 1 "register_operand" "0,0") (minus:DI (match_operand:DI 1 "register_operand" "0,0")
(sign_extend:DI (match_operand:SI 2 "general_operand" "d,m")))) (sign_extend:DI (match_operand:SI 2 "general_operand" "d,m"))))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"@ "@
sgfr\t%0,%2 sgfr\t%0,%2
...@@ -3458,7 +3476,7 @@ ...@@ -3458,7 +3476,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*subdi3_zero_cc" (define_insn "*subdi3_zero_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (minus:DI (match_operand:DI 1 "register_operand" "0,0") (compare (minus:DI (match_operand:DI 1 "register_operand" "0,0")
(zero_extend:DI (match_operand:SI 2 "general_operand" "d,m"))) (zero_extend:DI (match_operand:SI 2 "general_operand" "d,m")))
(const_int 0))) (const_int 0)))
...@@ -3471,7 +3489,7 @@ ...@@ -3471,7 +3489,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*subdi3_zero_cconly" (define_insn "*subdi3_zero_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (minus:DI (match_operand:DI 1 "register_operand" "0,0") (compare (minus:DI (match_operand:DI 1 "register_operand" "0,0")
(zero_extend:DI (match_operand:SI 2 "general_operand" "d,m"))) (zero_extend:DI (match_operand:SI 2 "general_operand" "d,m")))
(const_int 0))) (const_int 0)))
...@@ -3486,7 +3504,7 @@ ...@@ -3486,7 +3504,7 @@
[(set (match_operand:DI 0 "register_operand" "=d,d") [(set (match_operand:DI 0 "register_operand" "=d,d")
(minus:DI (match_operand:DI 1 "register_operand" "0,0") (minus:DI (match_operand:DI 1 "register_operand" "0,0")
(zero_extend:DI (match_operand:SI 2 "general_operand" "d,m")))) (zero_extend:DI (match_operand:SI 2 "general_operand" "d,m"))))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"@ "@
slgfr\t%0,%2 slgfr\t%0,%2
...@@ -3494,7 +3512,7 @@ ...@@ -3494,7 +3512,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*subdi3_borrow_cc" (define_insn "*subdi3_borrow_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (minus:DI (match_operand:DI 1 "register_operand" "0,0") (compare (minus:DI (match_operand:DI 1 "register_operand" "0,0")
(match_operand:DI 2 "general_operand" "d,m")) (match_operand:DI 2 "general_operand" "d,m"))
(match_dup 1))) (match_dup 1)))
...@@ -3507,7 +3525,7 @@ ...@@ -3507,7 +3525,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*subdi3_borrow_cconly" (define_insn "*subdi3_borrow_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (minus:DI (match_operand:DI 1 "register_operand" "0,0") (compare (minus:DI (match_operand:DI 1 "register_operand" "0,0")
(match_operand:DI 2 "general_operand" "d,m")) (match_operand:DI 2 "general_operand" "d,m"))
(match_dup 1))) (match_dup 1)))
...@@ -3519,7 +3537,7 @@ ...@@ -3519,7 +3537,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*subdi3_cc" (define_insn "*subdi3_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (minus:DI (match_operand:DI 1 "register_operand" "0,0") (compare (minus:DI (match_operand:DI 1 "register_operand" "0,0")
(match_operand:DI 2 "general_operand" "d,m")) (match_operand:DI 2 "general_operand" "d,m"))
(const_int 0))) (const_int 0)))
...@@ -3532,7 +3550,7 @@ ...@@ -3532,7 +3550,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*subdi3_cc2" (define_insn "*subdi3_cc2"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:DI 1 "register_operand" "0,0") (compare (match_operand:DI 1 "register_operand" "0,0")
(match_operand:DI 2 "general_operand" "d,m"))) (match_operand:DI 2 "general_operand" "d,m")))
(set (match_operand:DI 0 "register_operand" "=d,d") (set (match_operand:DI 0 "register_operand" "=d,d")
...@@ -3544,7 +3562,7 @@ ...@@ -3544,7 +3562,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*subdi3_cconly" (define_insn "*subdi3_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (minus:DI (match_operand:DI 1 "register_operand" "0,0") (compare (minus:DI (match_operand:DI 1 "register_operand" "0,0")
(match_operand:DI 2 "general_operand" "d,m")) (match_operand:DI 2 "general_operand" "d,m"))
(const_int 0))) (const_int 0)))
...@@ -3556,7 +3574,7 @@ ...@@ -3556,7 +3574,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*subdi3_cconly2" (define_insn "*subdi3_cconly2"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:DI 1 "register_operand" "0,0") (compare (match_operand:DI 1 "register_operand" "0,0")
(match_operand:DI 2 "general_operand" "d,m"))) (match_operand:DI 2 "general_operand" "d,m")))
(clobber (match_scratch:DI 0 "=d,d"))] (clobber (match_scratch:DI 0 "=d,d"))]
...@@ -3570,7 +3588,7 @@ ...@@ -3570,7 +3588,7 @@
[(set (match_operand:DI 0 "register_operand" "=d,d") [(set (match_operand:DI 0 "register_operand" "=d,d")
(minus:DI (match_operand:DI 1 "register_operand" "0,0") (minus:DI (match_operand:DI 1 "register_operand" "0,0")
(match_operand:DI 2 "general_operand" "d,m") ) ) (match_operand:DI 2 "general_operand" "d,m") ) )
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"@ "@
sgr\t%0,%2 sgr\t%0,%2
...@@ -3581,19 +3599,19 @@ ...@@ -3581,19 +3599,19 @@
[(set (match_operand:DI 0 "register_operand" "=&d") [(set (match_operand:DI 0 "register_operand" "=&d")
(minus:DI (match_operand:DI 1 "register_operand" "0") (minus:DI (match_operand:DI 1 "register_operand" "0")
(match_operand:DI 2 "general_operand" "do") ) ) (match_operand:DI 2 "general_operand" "do") ) )
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_64BIT && TARGET_CPU_ZARCH" "!TARGET_64BIT && TARGET_CPU_ZARCH"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(parallel [(parallel
[(set (reg:CCL2 33) [(set (reg:CCL2 CC_REGNUM)
(compare:CCL2 (minus:SI (match_dup 7) (match_dup 8)) (compare:CCL2 (minus:SI (match_dup 7) (match_dup 8))
(match_dup 7))) (match_dup 7)))
(set (match_dup 6) (minus:SI (match_dup 7) (match_dup 8)))]) (set (match_dup 6) (minus:SI (match_dup 7) (match_dup 8)))])
(parallel (parallel
[(set (match_dup 3) (minus:SI (minus:SI (match_dup 4) (match_dup 5)) [(set (match_dup 3) (minus:SI (minus:SI (match_dup 4) (match_dup 5))
(gtu:SI (reg:CCL2 33) (const_int 0)))) (gtu:SI (reg:CCL2 CC_REGNUM) (const_int 0))))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"operands[3] = operand_subword (operands[0], 0, 0, DImode); "operands[3] = operand_subword (operands[0], 0, 0, DImode);
operands[4] = operand_subword (operands[1], 0, 0, DImode); operands[4] = operand_subword (operands[1], 0, 0, DImode);
operands[5] = operand_subword (operands[2], 0, 0, DImode); operands[5] = operand_subword (operands[2], 0, 0, DImode);
...@@ -3605,25 +3623,25 @@ ...@@ -3605,25 +3623,25 @@
[(set (match_operand:DI 0 "register_operand" "=&d") [(set (match_operand:DI 0 "register_operand" "=&d")
(minus:DI (match_operand:DI 1 "register_operand" "0") (minus:DI (match_operand:DI 1 "register_operand" "0")
(match_operand:DI 2 "general_operand" "do") ) ) (match_operand:DI 2 "general_operand" "do") ) )
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_CPU_ZARCH" "!TARGET_CPU_ZARCH"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(parallel [(parallel
[(set (match_dup 3) (minus:SI (match_dup 4) (match_dup 5))) [(set (match_dup 3) (minus:SI (match_dup 4) (match_dup 5)))
(clobber (reg:CC 33))]) (clobber (reg:CC CC_REGNUM))])
(parallel (parallel
[(set (reg:CCL2 33) [(set (reg:CCL2 CC_REGNUM)
(compare:CCL2 (minus:SI (match_dup 7) (match_dup 8)) (compare:CCL2 (minus:SI (match_dup 7) (match_dup 8))
(match_dup 7))) (match_dup 7)))
(set (match_dup 6) (minus:SI (match_dup 7) (match_dup 8)))]) (set (match_dup 6) (minus:SI (match_dup 7) (match_dup 8)))])
(set (pc) (set (pc)
(if_then_else (gtu (reg:CCL2 33) (const_int 0)) (if_then_else (gtu (reg:CCL2 CC_REGNUM) (const_int 0))
(pc) (pc)
(label_ref (match_dup 9)))) (label_ref (match_dup 9))))
(parallel (parallel
[(set (match_dup 3) (plus:SI (match_dup 3) (const_int -1))) [(set (match_dup 3) (plus:SI (match_dup 3) (const_int -1)))
(clobber (reg:CC 33))]) (clobber (reg:CC CC_REGNUM))])
(match_dup 9)] (match_dup 9)]
"operands[3] = operand_subword (operands[0], 0, 0, DImode); "operands[3] = operand_subword (operands[0], 0, 0, DImode);
operands[4] = operand_subword (operands[1], 0, 0, DImode); operands[4] = operand_subword (operands[1], 0, 0, DImode);
...@@ -3638,7 +3656,7 @@ ...@@ -3638,7 +3656,7 @@
[(set (match_operand:DI 0 "register_operand" "") [(set (match_operand:DI 0 "register_operand" "")
(minus:DI (match_operand:DI 1 "register_operand" "") (minus:DI (match_operand:DI 1 "register_operand" "")
(match_operand:DI 2 "general_operand" ""))) (match_operand:DI 2 "general_operand" "")))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"" ""
"") "")
...@@ -3647,7 +3665,7 @@ ...@@ -3647,7 +3665,7 @@
; ;
(define_insn "*subsi3_borrow_cc" (define_insn "*subsi3_borrow_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (minus:SI (match_operand:SI 1 "register_operand" "0,0,0") (compare (minus:SI (match_operand:SI 1 "register_operand" "0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T")) (match_operand:SI 2 "general_operand" "d,R,T"))
(match_dup 1))) (match_dup 1)))
...@@ -3661,7 +3679,7 @@ ...@@ -3661,7 +3679,7 @@
[(set_attr "op_type" "RR,RX,RXY")]) [(set_attr "op_type" "RR,RX,RXY")])
(define_insn "*subsi3_borrow_cconly" (define_insn "*subsi3_borrow_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (minus:SI (match_operand:SI 1 "register_operand" "0,0,0") (compare (minus:SI (match_operand:SI 1 "register_operand" "0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T")) (match_operand:SI 2 "general_operand" "d,R,T"))
(match_dup 1))) (match_dup 1)))
...@@ -3674,7 +3692,7 @@ ...@@ -3674,7 +3692,7 @@
[(set_attr "op_type" "RR,RX,RXY")]) [(set_attr "op_type" "RR,RX,RXY")])
(define_insn "*subsi3_cc" (define_insn "*subsi3_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (minus:SI (match_operand:SI 1 "register_operand" "0,0,0") (compare (minus:SI (match_operand:SI 1 "register_operand" "0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T")) (match_operand:SI 2 "general_operand" "d,R,T"))
(const_int 0))) (const_int 0)))
...@@ -3688,7 +3706,7 @@ ...@@ -3688,7 +3706,7 @@
[(set_attr "op_type" "RR,RX,RXY")]) [(set_attr "op_type" "RR,RX,RXY")])
(define_insn "*subsi3_cc2" (define_insn "*subsi3_cc2"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:SI 1 "register_operand" "0,0,0") (compare (match_operand:SI 1 "register_operand" "0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T"))) (match_operand:SI 2 "general_operand" "d,R,T")))
(set (match_operand:SI 0 "register_operand" "=d,d,d") (set (match_operand:SI 0 "register_operand" "=d,d,d")
...@@ -3701,7 +3719,7 @@ ...@@ -3701,7 +3719,7 @@
[(set_attr "op_type" "RR,RX,RXY")]) [(set_attr "op_type" "RR,RX,RXY")])
(define_insn "*subsi3_cconly" (define_insn "*subsi3_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (minus:SI (match_operand:SI 1 "register_operand" "0,0,0") (compare (minus:SI (match_operand:SI 1 "register_operand" "0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T")) (match_operand:SI 2 "general_operand" "d,R,T"))
(const_int 0))) (const_int 0)))
...@@ -3714,7 +3732,7 @@ ...@@ -3714,7 +3732,7 @@
[(set_attr "op_type" "RR,RX,RXY")]) [(set_attr "op_type" "RR,RX,RXY")])
(define_insn "*subsi3_cconly2" (define_insn "*subsi3_cconly2"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (match_operand:SI 1 "register_operand" "0,0,0") (compare (match_operand:SI 1 "register_operand" "0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T"))) (match_operand:SI 2 "general_operand" "d,R,T")))
(clobber (match_scratch:SI 0 "=d,d,d"))] (clobber (match_scratch:SI 0 "=d,d,d"))]
...@@ -3729,7 +3747,7 @@ ...@@ -3729,7 +3747,7 @@
[(set (match_operand:SI 0 "register_operand" "=d,d") [(set (match_operand:SI 0 "register_operand" "=d,d")
(minus:SI (match_operand:SI 1 "register_operand" "0,0") (minus:SI (match_operand:SI 1 "register_operand" "0,0")
(sign_extend:SI (match_operand:HI 2 "memory_operand" "R,T")))) (sign_extend:SI (match_operand:HI 2 "memory_operand" "R,T"))))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"@ "@
sh\t%0,%2 sh\t%0,%2
...@@ -3740,7 +3758,7 @@ ...@@ -3740,7 +3758,7 @@
[(set (match_operand:SI 0 "register_operand" "=d,d,d") [(set (match_operand:SI 0 "register_operand" "=d,d,d")
(minus:SI (match_operand:SI 1 "register_operand" "0,0,0") (minus:SI (match_operand:SI 1 "register_operand" "0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T"))) (match_operand:SI 2 "general_operand" "d,R,T")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"@ "@
sr\t%0,%2 sr\t%0,%2
...@@ -3758,7 +3776,7 @@ ...@@ -3758,7 +3776,7 @@
[(set (match_operand:FPR 0 "register_operand" "=f,f") [(set (match_operand:FPR 0 "register_operand" "=f,f")
(minus:FPR (match_operand:FPR 1 "register_operand" "0,0") (minus:FPR (match_operand:FPR 1 "register_operand" "0,0")
(match_operand:FPR 2 "general_operand" "f,R"))) (match_operand:FPR 2 "general_operand" "f,R")))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"TARGET_HARD_FLOAT" "TARGET_HARD_FLOAT"
"") "")
...@@ -3766,7 +3784,7 @@ ...@@ -3766,7 +3784,7 @@
[(set (match_operand:FPR 0 "register_operand" "=f,f") [(set (match_operand:FPR 0 "register_operand" "=f,f")
(minus:FPR (match_operand:FPR 1 "register_operand" "0,0") (minus:FPR (match_operand:FPR 1 "register_operand" "0,0")
(match_operand:FPR 2 "general_operand" "f,R"))) (match_operand:FPR 2 "general_operand" "f,R")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"@ "@
s<de>br\t%0,%2 s<de>br\t%0,%2
...@@ -3775,7 +3793,7 @@ ...@@ -3775,7 +3793,7 @@
(set_attr "type" "fsimp<mode>")]) (set_attr "type" "fsimp<mode>")])
(define_insn "*sub<mode>3_cc" (define_insn "*sub<mode>3_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (minus:FPR (match_operand:FPR 1 "nonimmediate_operand" "0,0") (compare (minus:FPR (match_operand:FPR 1 "nonimmediate_operand" "0,0")
(match_operand:FPR 2 "general_operand" "f,R")) (match_operand:FPR 2 "general_operand" "f,R"))
(match_operand:FPR 3 "const0_operand" ""))) (match_operand:FPR 3 "const0_operand" "")))
...@@ -3789,7 +3807,7 @@ ...@@ -3789,7 +3807,7 @@
(set_attr "type" "fsimp<mode>")]) (set_attr "type" "fsimp<mode>")])
(define_insn "*sub<mode>3_cconly" (define_insn "*sub<mode>3_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (minus:FPR (match_operand:FPR 1 "nonimmediate_operand" "0,0") (compare (minus:FPR (match_operand:FPR 1 "nonimmediate_operand" "0,0")
(match_operand:FPR 2 "general_operand" "f,R")) (match_operand:FPR 2 "general_operand" "f,R"))
(match_operand:FPR 3 "const0_operand" ""))) (match_operand:FPR 3 "const0_operand" "")))
...@@ -3805,7 +3823,7 @@ ...@@ -3805,7 +3823,7 @@
[(set (match_operand:FPR 0 "register_operand" "=f,f") [(set (match_operand:FPR 0 "register_operand" "=f,f")
(minus:FPR (match_operand:FPR 1 "register_operand" "0,0") (minus:FPR (match_operand:FPR 1 "register_operand" "0,0")
(match_operand:FPR 2 "general_operand" "f,R"))) (match_operand:FPR 2 "general_operand" "f,R")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT"
"@ "@
s<de>r\t%0,%2 s<de>r\t%0,%2
...@@ -3823,7 +3841,7 @@ ...@@ -3823,7 +3841,7 @@
; ;
(define_insn "*add<mode>3_alc_cc" (define_insn "*add<mode>3_alc_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (compare
(plus:GPR (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0") (plus:GPR (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0")
(match_operand:GPR 2 "general_operand" "d,m")) (match_operand:GPR 2 "general_operand" "d,m"))
...@@ -3842,7 +3860,7 @@ ...@@ -3842,7 +3860,7 @@
(plus:GPR (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0") (plus:GPR (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0")
(match_operand:GPR 2 "general_operand" "d,m")) (match_operand:GPR 2 "general_operand" "d,m"))
(match_operand:GPR 3 "s390_alc_comparison" ""))) (match_operand:GPR 3 "s390_alc_comparison" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_CPU_ZARCH" "TARGET_CPU_ZARCH"
"@ "@
alc<g>r\t%0,%2 alc<g>r\t%0,%2
...@@ -3850,7 +3868,7 @@ ...@@ -3850,7 +3868,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*sub<mode>3_slb_cc" (define_insn "*sub<mode>3_slb_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (compare
(minus:GPR (minus:GPR (match_operand:GPR 1 "nonimmediate_operand" "0,0") (minus:GPR (minus:GPR (match_operand:GPR 1 "nonimmediate_operand" "0,0")
(match_operand:GPR 2 "general_operand" "d,m")) (match_operand:GPR 2 "general_operand" "d,m"))
...@@ -3869,7 +3887,7 @@ ...@@ -3869,7 +3887,7 @@
(minus:GPR (minus:GPR (match_operand:GPR 1 "nonimmediate_operand" "0,0") (minus:GPR (minus:GPR (match_operand:GPR 1 "nonimmediate_operand" "0,0")
(match_operand:GPR 2 "general_operand" "d,m")) (match_operand:GPR 2 "general_operand" "d,m"))
(match_operand:GPR 3 "s390_slb_comparison" ""))) (match_operand:GPR 3 "s390_slb_comparison" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_CPU_ZARCH" "TARGET_CPU_ZARCH"
"@ "@
slb<g>r\t%0,%2 slb<g>r\t%0,%2
...@@ -3894,7 +3912,7 @@ ...@@ -3894,7 +3912,7 @@
(define_insn_and_split "*scond<mode>" (define_insn_and_split "*scond<mode>"
[(set (match_operand:GPR 0 "register_operand" "=&d") [(set (match_operand:GPR 0 "register_operand" "=&d")
(match_operand:GPR 1 "s390_alc_comparison" "")) (match_operand:GPR 1 "s390_alc_comparison" ""))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_CPU_ZARCH" "TARGET_CPU_ZARCH"
"#" "#"
"&& reload_completed" "&& reload_completed"
...@@ -3902,13 +3920,13 @@ ...@@ -3902,13 +3920,13 @@
(parallel (parallel
[(set (match_dup 0) (plus:GPR (plus:GPR (match_dup 0) (match_dup 0)) [(set (match_dup 0) (plus:GPR (plus:GPR (match_dup 0) (match_dup 0))
(match_dup 1))) (match_dup 1)))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"") "")
(define_insn_and_split "*scond<mode>_neg" (define_insn_and_split "*scond<mode>_neg"
[(set (match_operand:GPR 0 "register_operand" "=&d") [(set (match_operand:GPR 0 "register_operand" "=&d")
(match_operand:GPR 1 "s390_slb_comparison" "")) (match_operand:GPR 1 "s390_slb_comparison" ""))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_CPU_ZARCH" "TARGET_CPU_ZARCH"
"#" "#"
"&& reload_completed" "&& reload_completed"
...@@ -3916,10 +3934,10 @@ ...@@ -3916,10 +3934,10 @@
(parallel (parallel
[(set (match_dup 0) (minus:GPR (minus:GPR (match_dup 0) (match_dup 0)) [(set (match_dup 0) (minus:GPR (minus:GPR (match_dup 0) (match_dup 0))
(match_dup 1))) (match_dup 1)))
(clobber (reg:CC 33))]) (clobber (reg:CC CC_REGNUM))])
(parallel (parallel
[(set (match_dup 0) (neg:GPR (match_dup 0))) [(set (match_dup 0) (neg:GPR (match_dup 0)))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"") "")
...@@ -4559,7 +4577,7 @@ ...@@ -4559,7 +4577,7 @@
; ;
(define_insn "*anddi3_cc" (define_insn "*anddi3_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (and:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0") (compare (and:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
(match_operand:DI 2 "general_operand" "d,m")) (match_operand:DI 2 "general_operand" "d,m"))
(const_int 0))) (const_int 0)))
...@@ -4572,7 +4590,7 @@ ...@@ -4572,7 +4590,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*anddi3_cconly" (define_insn "*anddi3_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (and:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0") (compare (and:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
(match_operand:DI 2 "general_operand" "d,m")) (match_operand:DI 2 "general_operand" "d,m"))
(const_int 0))) (const_int 0)))
...@@ -4591,7 +4609,7 @@ ...@@ -4591,7 +4609,7 @@
"%d,o,0,0,0,0,0,0,0,0") "%d,o,0,0,0,0,0,0,0,0")
(match_operand:DI 2 "general_operand" (match_operand:DI 2 "general_operand"
"M,M,N0HDF,N1HDF,N2HDF,N3HDF,d,m,NxQDF,Q"))) "M,M,N0HDF,N1HDF,N2HDF,N3HDF,d,m,NxQDF,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT && s390_logical_operator_ok_p (operands)" "TARGET_64BIT && s390_logical_operator_ok_p (operands)"
"@ "@
# #
...@@ -4609,18 +4627,18 @@ ...@@ -4609,18 +4627,18 @@
(define_split (define_split
[(set (match_operand:DI 0 "s_operand" "") [(set (match_operand:DI 0 "s_operand" "")
(and:DI (match_dup 0) (match_operand:DI 1 "immediate_operand" ""))) (and:DI (match_dup 0) (match_operand:DI 1 "immediate_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"reload_completed" "reload_completed"
[(parallel [(parallel
[(set (match_dup 0) (and:QI (match_dup 0) (match_dup 1))) [(set (match_dup 0) (and:QI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"s390_narrow_logical_operator (AND, &operands[0], &operands[1]);") "s390_narrow_logical_operator (AND, &operands[0], &operands[1]);")
(define_expand "anddi3" (define_expand "anddi3"
[(set (match_operand:DI 0 "nonimmediate_operand" "") [(set (match_operand:DI 0 "nonimmediate_operand" "")
(and:DI (match_operand:DI 1 "nonimmediate_operand" "") (and:DI (match_operand:DI 1 "nonimmediate_operand" "")
(match_operand:DI 2 "general_operand" ""))) (match_operand:DI 2 "general_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"s390_expand_logical_operator (AND, DImode, operands); DONE;") "s390_expand_logical_operator (AND, DImode, operands); DONE;")
...@@ -4629,7 +4647,7 @@ ...@@ -4629,7 +4647,7 @@
; ;
(define_insn "*andsi3_cc" (define_insn "*andsi3_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0") (compare (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T")) (match_operand:SI 2 "general_operand" "d,R,T"))
(const_int 0))) (const_int 0)))
...@@ -4643,7 +4661,7 @@ ...@@ -4643,7 +4661,7 @@
[(set_attr "op_type" "RR,RX,RXY")]) [(set_attr "op_type" "RR,RX,RXY")])
(define_insn "*andsi3_cconly" (define_insn "*andsi3_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0") (compare (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T")) (match_operand:SI 2 "general_operand" "d,R,T"))
(const_int 0))) (const_int 0)))
...@@ -4663,7 +4681,7 @@ ...@@ -4663,7 +4681,7 @@
"%d,o,0,0,0,0,0,0,0") "%d,o,0,0,0,0,0,0,0")
(match_operand:SI 2 "general_operand" (match_operand:SI 2 "general_operand"
"M,M,N0HSF,N1HSF,d,R,T,NxQSF,Q"))) "M,M,N0HSF,N1HSF,d,R,T,NxQSF,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
"@ "@
# #
...@@ -4681,7 +4699,7 @@ ...@@ -4681,7 +4699,7 @@
[(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,AQ,Q") [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,AQ,Q")
(and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0,0") (and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0,0")
(match_operand:SI 2 "general_operand" "d,R,NxQSF,Q"))) (match_operand:SI 2 "general_operand" "d,R,NxQSF,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
"@ "@
nr\t%0,%2 nr\t%0,%2
...@@ -4693,18 +4711,18 @@ ...@@ -4693,18 +4711,18 @@
(define_split (define_split
[(set (match_operand:SI 0 "s_operand" "") [(set (match_operand:SI 0 "s_operand" "")
(and:SI (match_dup 0) (match_operand:SI 1 "immediate_operand" ""))) (and:SI (match_dup 0) (match_operand:SI 1 "immediate_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"reload_completed" "reload_completed"
[(parallel [(parallel
[(set (match_dup 0) (and:QI (match_dup 0) (match_dup 1))) [(set (match_dup 0) (and:QI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"s390_narrow_logical_operator (AND, &operands[0], &operands[1]);") "s390_narrow_logical_operator (AND, &operands[0], &operands[1]);")
(define_expand "andsi3" (define_expand "andsi3"
[(set (match_operand:SI 0 "nonimmediate_operand" "") [(set (match_operand:SI 0 "nonimmediate_operand" "")
(and:SI (match_operand:SI 1 "nonimmediate_operand" "") (and:SI (match_operand:SI 1 "nonimmediate_operand" "")
(match_operand:SI 2 "general_operand" ""))) (match_operand:SI 2 "general_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"s390_expand_logical_operator (AND, SImode, operands); DONE;") "s390_expand_logical_operator (AND, SImode, operands); DONE;")
...@@ -4716,7 +4734,7 @@ ...@@ -4716,7 +4734,7 @@
[(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,AQ,Q") [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,AQ,Q")
(and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0,0") (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0,0")
(match_operand:HI 2 "general_operand" "d,n,NxQHF,Q"))) (match_operand:HI 2 "general_operand" "d,n,NxQHF,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
"@ "@
nr\t%0,%2 nr\t%0,%2
...@@ -4729,7 +4747,7 @@ ...@@ -4729,7 +4747,7 @@
[(set (match_operand:HI 0 "nonimmediate_operand" "=d,AQ,Q") [(set (match_operand:HI 0 "nonimmediate_operand" "=d,AQ,Q")
(and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0") (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:HI 2 "general_operand" "d,NxQHF,Q"))) (match_operand:HI 2 "general_operand" "d,NxQHF,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
"@ "@
nr\t%0,%2 nr\t%0,%2
...@@ -4740,18 +4758,18 @@ ...@@ -4740,18 +4758,18 @@
(define_split (define_split
[(set (match_operand:HI 0 "s_operand" "") [(set (match_operand:HI 0 "s_operand" "")
(and:HI (match_dup 0) (match_operand:HI 1 "immediate_operand" ""))) (and:HI (match_dup 0) (match_operand:HI 1 "immediate_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"reload_completed" "reload_completed"
[(parallel [(parallel
[(set (match_dup 0) (and:QI (match_dup 0) (match_dup 1))) [(set (match_dup 0) (and:QI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"s390_narrow_logical_operator (AND, &operands[0], &operands[1]);") "s390_narrow_logical_operator (AND, &operands[0], &operands[1]);")
(define_expand "andhi3" (define_expand "andhi3"
[(set (match_operand:HI 0 "nonimmediate_operand" "") [(set (match_operand:HI 0 "nonimmediate_operand" "")
(and:HI (match_operand:HI 1 "nonimmediate_operand" "") (and:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:HI 2 "general_operand" ""))) (match_operand:HI 2 "general_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"s390_expand_logical_operator (AND, HImode, operands); DONE;") "s390_expand_logical_operator (AND, HImode, operands); DONE;")
...@@ -4763,7 +4781,7 @@ ...@@ -4763,7 +4781,7 @@
[(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,Q,S,Q") [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,Q,S,Q")
(and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,0,0") (and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,0,0")
(match_operand:QI 2 "general_operand" "d,n,n,n,Q"))) (match_operand:QI 2 "general_operand" "d,n,n,n,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
"@ "@
nr\t%0,%2 nr\t%0,%2
...@@ -4777,7 +4795,7 @@ ...@@ -4777,7 +4795,7 @@
[(set (match_operand:QI 0 "nonimmediate_operand" "=d,Q,Q") [(set (match_operand:QI 0 "nonimmediate_operand" "=d,Q,Q")
(and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0") (and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:QI 2 "general_operand" "d,n,Q"))) (match_operand:QI 2 "general_operand" "d,n,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
"@ "@
nr\t%0,%2 nr\t%0,%2
...@@ -4789,7 +4807,7 @@ ...@@ -4789,7 +4807,7 @@
[(set (match_operand:QI 0 "nonimmediate_operand" "") [(set (match_operand:QI 0 "nonimmediate_operand" "")
(and:QI (match_operand:QI 1 "nonimmediate_operand" "") (and:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "general_operand" ""))) (match_operand:QI 2 "general_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"s390_expand_logical_operator (AND, QImode, operands); DONE;") "s390_expand_logical_operator (AND, QImode, operands); DONE;")
...@@ -4802,7 +4820,7 @@ ...@@ -4802,7 +4820,7 @@
(and:BLK (match_dup 0) (and:BLK (match_dup 0)
(match_operand:BLK 1 "memory_operand" "Q"))) (match_operand:BLK 1 "memory_operand" "Q")))
(use (match_operand 2 "const_int_operand" "n")) (use (match_operand 2 "const_int_operand" "n"))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 256" "INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 256"
"nc\t%O0(%2,%R0),%S1" "nc\t%O0(%2,%R0),%S1"
[(set_attr "op_type" "SS")]) [(set_attr "op_type" "SS")])
...@@ -4811,14 +4829,14 @@ ...@@ -4811,14 +4829,14 @@
[(set (match_operand 0 "memory_operand" "") [(set (match_operand 0 "memory_operand" "")
(and (match_dup 0) (and (match_dup 0)
(match_operand 1 "memory_operand" ""))) (match_operand 1 "memory_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"reload_completed "reload_completed
&& GET_MODE (operands[0]) == GET_MODE (operands[1]) && GET_MODE (operands[0]) == GET_MODE (operands[1])
&& GET_MODE_SIZE (GET_MODE (operands[0])) > 0" && GET_MODE_SIZE (GET_MODE (operands[0])) > 0"
[(parallel [(parallel
[(set (match_dup 0) (and:BLK (match_dup 0) (match_dup 1))) [(set (match_dup 0) (and:BLK (match_dup 0) (match_dup 1)))
(use (match_dup 2)) (use (match_dup 2))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
{ {
operands[2] = GEN_INT (GET_MODE_SIZE (GET_MODE (operands[0]))); operands[2] = GEN_INT (GET_MODE_SIZE (GET_MODE (operands[0])));
operands[0] = adjust_address (operands[0], BLKmode, 0); operands[0] = adjust_address (operands[0], BLKmode, 0);
...@@ -4831,20 +4849,20 @@ ...@@ -4831,20 +4849,20 @@
(and:BLK (match_dup 0) (and:BLK (match_dup 0)
(match_operand:BLK 1 "memory_operand" ""))) (match_operand:BLK 1 "memory_operand" "")))
(use (match_operand 2 "const_int_operand" "")) (use (match_operand 2 "const_int_operand" ""))
(clobber (reg:CC 33))]) (clobber (reg:CC CC_REGNUM))])
(parallel (parallel
[(set (match_operand:BLK 3 "memory_operand" "") [(set (match_operand:BLK 3 "memory_operand" "")
(and:BLK (match_dup 3) (and:BLK (match_dup 3)
(match_operand:BLK 4 "memory_operand" ""))) (match_operand:BLK 4 "memory_operand" "")))
(use (match_operand 5 "const_int_operand" "")) (use (match_operand 5 "const_int_operand" ""))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"s390_offset_p (operands[0], operands[3], operands[2]) "s390_offset_p (operands[0], operands[3], operands[2])
&& s390_offset_p (operands[1], operands[4], operands[2]) && s390_offset_p (operands[1], operands[4], operands[2])
&& INTVAL (operands[2]) + INTVAL (operands[5]) <= 256" && INTVAL (operands[2]) + INTVAL (operands[5]) <= 256"
[(parallel [(parallel
[(set (match_dup 6) (and:BLK (match_dup 6) (match_dup 7))) [(set (match_dup 6) (and:BLK (match_dup 6) (match_dup 7)))
(use (match_dup 8)) (use (match_dup 8))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"operands[6] = gen_rtx_MEM (BLKmode, XEXP (operands[0], 0)); "operands[6] = gen_rtx_MEM (BLKmode, XEXP (operands[0], 0));
operands[7] = gen_rtx_MEM (BLKmode, XEXP (operands[1], 0)); operands[7] = gen_rtx_MEM (BLKmode, XEXP (operands[1], 0));
operands[8] = GEN_INT (INTVAL (operands[2]) + INTVAL (operands[5]));") operands[8] = GEN_INT (INTVAL (operands[2]) + INTVAL (operands[5]));")
...@@ -4859,7 +4877,7 @@ ...@@ -4859,7 +4877,7 @@
; ;
(define_insn "*iordi3_cc" (define_insn "*iordi3_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (ior:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0") (compare (ior:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
(match_operand:DI 2 "general_operand" "d,m")) (match_operand:DI 2 "general_operand" "d,m"))
(const_int 0))) (const_int 0)))
...@@ -4872,7 +4890,7 @@ ...@@ -4872,7 +4890,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*iordi3_cconly" (define_insn "*iordi3_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (ior:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0") (compare (ior:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
(match_operand:DI 2 "general_operand" "d,m")) (match_operand:DI 2 "general_operand" "d,m"))
(const_int 0))) (const_int 0)))
...@@ -4888,7 +4906,7 @@ ...@@ -4888,7 +4906,7 @@
(ior:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0,0,0,0,0,0,0") (ior:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0,0,0,0,0,0,0")
(match_operand:DI 2 "general_operand" (match_operand:DI 2 "general_operand"
"N0HD0,N1HD0,N2HD0,N3HD0,d,m,NxQD0,Q"))) "N0HD0,N1HD0,N2HD0,N3HD0,d,m,NxQD0,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT && s390_logical_operator_ok_p (operands)" "TARGET_64BIT && s390_logical_operator_ok_p (operands)"
"@ "@
oihh\t%0,%i2 oihh\t%0,%i2
...@@ -4904,18 +4922,18 @@ ...@@ -4904,18 +4922,18 @@
(define_split (define_split
[(set (match_operand:DI 0 "s_operand" "") [(set (match_operand:DI 0 "s_operand" "")
(ior:DI (match_dup 0) (match_operand:DI 1 "immediate_operand" ""))) (ior:DI (match_dup 0) (match_operand:DI 1 "immediate_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"reload_completed" "reload_completed"
[(parallel [(parallel
[(set (match_dup 0) (ior:QI (match_dup 0) (match_dup 1))) [(set (match_dup 0) (ior:QI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"s390_narrow_logical_operator (IOR, &operands[0], &operands[1]);") "s390_narrow_logical_operator (IOR, &operands[0], &operands[1]);")
(define_expand "iordi3" (define_expand "iordi3"
[(set (match_operand:DI 0 "nonimmediate_operand" "") [(set (match_operand:DI 0 "nonimmediate_operand" "")
(ior:DI (match_operand:DI 1 "nonimmediate_operand" "") (ior:DI (match_operand:DI 1 "nonimmediate_operand" "")
(match_operand:DI 2 "general_operand" ""))) (match_operand:DI 2 "general_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"s390_expand_logical_operator (IOR, DImode, operands); DONE;") "s390_expand_logical_operator (IOR, DImode, operands); DONE;")
...@@ -4924,7 +4942,7 @@ ...@@ -4924,7 +4942,7 @@
; ;
(define_insn "*iorsi3_cc" (define_insn "*iorsi3_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0") (compare (ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T")) (match_operand:SI 2 "general_operand" "d,R,T"))
(const_int 0))) (const_int 0)))
...@@ -4938,7 +4956,7 @@ ...@@ -4938,7 +4956,7 @@
[(set_attr "op_type" "RR,RX,RXY")]) [(set_attr "op_type" "RR,RX,RXY")])
(define_insn "*iorsi3_cconly" (define_insn "*iorsi3_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0") (compare (ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T")) (match_operand:SI 2 "general_operand" "d,R,T"))
(const_int 0))) (const_int 0)))
...@@ -4954,7 +4972,7 @@ ...@@ -4954,7 +4972,7 @@
[(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,d,d,AQ,Q") [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,d,d,AQ,Q")
(ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0,0,0,0,0") (ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0,0,0,0,0")
(match_operand:SI 2 "general_operand" "N0HS0,N1HS0,d,R,T,NxQS0,Q"))) (match_operand:SI 2 "general_operand" "N0HS0,N1HS0,d,R,T,NxQS0,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
"@ "@
oilh\t%0,%i2 oilh\t%0,%i2
...@@ -4970,7 +4988,7 @@ ...@@ -4970,7 +4988,7 @@
[(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,AQ,Q") [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,AQ,Q")
(ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0,0") (ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0,0")
(match_operand:SI 2 "general_operand" "d,R,NxQS0,Q"))) (match_operand:SI 2 "general_operand" "d,R,NxQS0,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
"@ "@
or\t%0,%2 or\t%0,%2
...@@ -4982,18 +5000,18 @@ ...@@ -4982,18 +5000,18 @@
(define_split (define_split
[(set (match_operand:SI 0 "s_operand" "") [(set (match_operand:SI 0 "s_operand" "")
(ior:SI (match_dup 0) (match_operand:SI 1 "immediate_operand" ""))) (ior:SI (match_dup 0) (match_operand:SI 1 "immediate_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"reload_completed" "reload_completed"
[(parallel [(parallel
[(set (match_dup 0) (ior:QI (match_dup 0) (match_dup 1))) [(set (match_dup 0) (ior:QI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"s390_narrow_logical_operator (IOR, &operands[0], &operands[1]);") "s390_narrow_logical_operator (IOR, &operands[0], &operands[1]);")
(define_expand "iorsi3" (define_expand "iorsi3"
[(set (match_operand:SI 0 "nonimmediate_operand" "") [(set (match_operand:SI 0 "nonimmediate_operand" "")
(ior:SI (match_operand:SI 1 "nonimmediate_operand" "") (ior:SI (match_operand:SI 1 "nonimmediate_operand" "")
(match_operand:SI 2 "general_operand" ""))) (match_operand:SI 2 "general_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"s390_expand_logical_operator (IOR, SImode, operands); DONE;") "s390_expand_logical_operator (IOR, SImode, operands); DONE;")
...@@ -5005,7 +5023,7 @@ ...@@ -5005,7 +5023,7 @@
[(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,AQ,Q") [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,AQ,Q")
(ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0,0") (ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0,0")
(match_operand:HI 2 "general_operand" "d,n,NxQH0,Q"))) (match_operand:HI 2 "general_operand" "d,n,NxQH0,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
"@ "@
or\t%0,%2 or\t%0,%2
...@@ -5018,7 +5036,7 @@ ...@@ -5018,7 +5036,7 @@
[(set (match_operand:HI 0 "nonimmediate_operand" "=d,AQ,Q") [(set (match_operand:HI 0 "nonimmediate_operand" "=d,AQ,Q")
(ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0") (ior:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:HI 2 "general_operand" "d,NxQH0,Q"))) (match_operand:HI 2 "general_operand" "d,NxQH0,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
"@ "@
or\t%0,%2 or\t%0,%2
...@@ -5029,18 +5047,18 @@ ...@@ -5029,18 +5047,18 @@
(define_split (define_split
[(set (match_operand:HI 0 "s_operand" "") [(set (match_operand:HI 0 "s_operand" "")
(ior:HI (match_dup 0) (match_operand:HI 1 "immediate_operand" ""))) (ior:HI (match_dup 0) (match_operand:HI 1 "immediate_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"reload_completed" "reload_completed"
[(parallel [(parallel
[(set (match_dup 0) (ior:QI (match_dup 0) (match_dup 1))) [(set (match_dup 0) (ior:QI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"s390_narrow_logical_operator (IOR, &operands[0], &operands[1]);") "s390_narrow_logical_operator (IOR, &operands[0], &operands[1]);")
(define_expand "iorhi3" (define_expand "iorhi3"
[(set (match_operand:HI 0 "nonimmediate_operand" "") [(set (match_operand:HI 0 "nonimmediate_operand" "")
(ior:HI (match_operand:HI 1 "nonimmediate_operand" "") (ior:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:HI 2 "general_operand" ""))) (match_operand:HI 2 "general_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"s390_expand_logical_operator (IOR, HImode, operands); DONE;") "s390_expand_logical_operator (IOR, HImode, operands); DONE;")
...@@ -5052,7 +5070,7 @@ ...@@ -5052,7 +5070,7 @@
[(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,Q,S,Q") [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,Q,S,Q")
(ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,0,0") (ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,0,0")
(match_operand:QI 2 "general_operand" "d,n,n,n,Q"))) (match_operand:QI 2 "general_operand" "d,n,n,n,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
"@ "@
or\t%0,%2 or\t%0,%2
...@@ -5066,7 +5084,7 @@ ...@@ -5066,7 +5084,7 @@
[(set (match_operand:QI 0 "nonimmediate_operand" "=d,Q,Q") [(set (match_operand:QI 0 "nonimmediate_operand" "=d,Q,Q")
(ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0") (ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:QI 2 "general_operand" "d,n,Q"))) (match_operand:QI 2 "general_operand" "d,n,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_ZARCH && s390_logical_operator_ok_p (operands)" "!TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
"@ "@
or\t%0,%2 or\t%0,%2
...@@ -5078,7 +5096,7 @@ ...@@ -5078,7 +5096,7 @@
[(set (match_operand:QI 0 "nonimmediate_operand" "") [(set (match_operand:QI 0 "nonimmediate_operand" "")
(ior:QI (match_operand:QI 1 "nonimmediate_operand" "") (ior:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "general_operand" ""))) (match_operand:QI 2 "general_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"s390_expand_logical_operator (IOR, QImode, operands); DONE;") "s390_expand_logical_operator (IOR, QImode, operands); DONE;")
...@@ -5091,7 +5109,7 @@ ...@@ -5091,7 +5109,7 @@
(ior:BLK (match_dup 0) (ior:BLK (match_dup 0)
(match_operand:BLK 1 "memory_operand" "Q"))) (match_operand:BLK 1 "memory_operand" "Q")))
(use (match_operand 2 "const_int_operand" "n")) (use (match_operand 2 "const_int_operand" "n"))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 256" "INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 256"
"oc\t%O0(%2,%R0),%S1" "oc\t%O0(%2,%R0),%S1"
[(set_attr "op_type" "SS")]) [(set_attr "op_type" "SS")])
...@@ -5100,14 +5118,14 @@ ...@@ -5100,14 +5118,14 @@
[(set (match_operand 0 "memory_operand" "") [(set (match_operand 0 "memory_operand" "")
(ior (match_dup 0) (ior (match_dup 0)
(match_operand 1 "memory_operand" ""))) (match_operand 1 "memory_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"reload_completed "reload_completed
&& GET_MODE (operands[0]) == GET_MODE (operands[1]) && GET_MODE (operands[0]) == GET_MODE (operands[1])
&& GET_MODE_SIZE (GET_MODE (operands[0])) > 0" && GET_MODE_SIZE (GET_MODE (operands[0])) > 0"
[(parallel [(parallel
[(set (match_dup 0) (ior:BLK (match_dup 0) (match_dup 1))) [(set (match_dup 0) (ior:BLK (match_dup 0) (match_dup 1)))
(use (match_dup 2)) (use (match_dup 2))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
{ {
operands[2] = GEN_INT (GET_MODE_SIZE (GET_MODE (operands[0]))); operands[2] = GEN_INT (GET_MODE_SIZE (GET_MODE (operands[0])));
operands[0] = adjust_address (operands[0], BLKmode, 0); operands[0] = adjust_address (operands[0], BLKmode, 0);
...@@ -5120,20 +5138,20 @@ ...@@ -5120,20 +5138,20 @@
(ior:BLK (match_dup 0) (ior:BLK (match_dup 0)
(match_operand:BLK 1 "memory_operand" ""))) (match_operand:BLK 1 "memory_operand" "")))
(use (match_operand 2 "const_int_operand" "")) (use (match_operand 2 "const_int_operand" ""))
(clobber (reg:CC 33))]) (clobber (reg:CC CC_REGNUM))])
(parallel (parallel
[(set (match_operand:BLK 3 "memory_operand" "") [(set (match_operand:BLK 3 "memory_operand" "")
(ior:BLK (match_dup 3) (ior:BLK (match_dup 3)
(match_operand:BLK 4 "memory_operand" ""))) (match_operand:BLK 4 "memory_operand" "")))
(use (match_operand 5 "const_int_operand" "")) (use (match_operand 5 "const_int_operand" ""))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"s390_offset_p (operands[0], operands[3], operands[2]) "s390_offset_p (operands[0], operands[3], operands[2])
&& s390_offset_p (operands[1], operands[4], operands[2]) && s390_offset_p (operands[1], operands[4], operands[2])
&& INTVAL (operands[2]) + INTVAL (operands[5]) <= 256" && INTVAL (operands[2]) + INTVAL (operands[5]) <= 256"
[(parallel [(parallel
[(set (match_dup 6) (ior:BLK (match_dup 6) (match_dup 7))) [(set (match_dup 6) (ior:BLK (match_dup 6) (match_dup 7)))
(use (match_dup 8)) (use (match_dup 8))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"operands[6] = gen_rtx_MEM (BLKmode, XEXP (operands[0], 0)); "operands[6] = gen_rtx_MEM (BLKmode, XEXP (operands[0], 0));
operands[7] = gen_rtx_MEM (BLKmode, XEXP (operands[1], 0)); operands[7] = gen_rtx_MEM (BLKmode, XEXP (operands[1], 0));
operands[8] = GEN_INT (INTVAL (operands[2]) + INTVAL (operands[5]));") operands[8] = GEN_INT (INTVAL (operands[2]) + INTVAL (operands[5]));")
...@@ -5148,7 +5166,7 @@ ...@@ -5148,7 +5166,7 @@
; ;
(define_insn "*xordi3_cc" (define_insn "*xordi3_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (xor:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0") (compare (xor:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
(match_operand:DI 2 "general_operand" "d,m")) (match_operand:DI 2 "general_operand" "d,m"))
(const_int 0))) (const_int 0)))
...@@ -5161,7 +5179,7 @@ ...@@ -5161,7 +5179,7 @@
[(set_attr "op_type" "RRE,RXY")]) [(set_attr "op_type" "RRE,RXY")])
(define_insn "*xordi3_cconly" (define_insn "*xordi3_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (xor:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0") (compare (xor:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0")
(match_operand:DI 2 "general_operand" "d,m")) (match_operand:DI 2 "general_operand" "d,m"))
(const_int 0))) (const_int 0)))
...@@ -5176,7 +5194,7 @@ ...@@ -5176,7 +5194,7 @@
[(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,AQ,Q") [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,AQ,Q")
(xor:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0,0,0") (xor:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0,0,0")
(match_operand:DI 2 "general_operand" "d,m,NxQD0,Q"))) (match_operand:DI 2 "general_operand" "d,m,NxQD0,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT && s390_logical_operator_ok_p (operands)" "TARGET_64BIT && s390_logical_operator_ok_p (operands)"
"@ "@
xgr\t%0,%2 xgr\t%0,%2
...@@ -5188,18 +5206,18 @@ ...@@ -5188,18 +5206,18 @@
(define_split (define_split
[(set (match_operand:DI 0 "s_operand" "") [(set (match_operand:DI 0 "s_operand" "")
(xor:DI (match_dup 0) (match_operand:DI 1 "immediate_operand" ""))) (xor:DI (match_dup 0) (match_operand:DI 1 "immediate_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"reload_completed" "reload_completed"
[(parallel [(parallel
[(set (match_dup 0) (xor:QI (match_dup 0) (match_dup 1))) [(set (match_dup 0) (xor:QI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"s390_narrow_logical_operator (XOR, &operands[0], &operands[1]);") "s390_narrow_logical_operator (XOR, &operands[0], &operands[1]);")
(define_expand "xordi3" (define_expand "xordi3"
[(set (match_operand:DI 0 "nonimmediate_operand" "") [(set (match_operand:DI 0 "nonimmediate_operand" "")
(xor:DI (match_operand:DI 1 "nonimmediate_operand" "") (xor:DI (match_operand:DI 1 "nonimmediate_operand" "")
(match_operand:DI 2 "general_operand" ""))) (match_operand:DI 2 "general_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"s390_expand_logical_operator (XOR, DImode, operands); DONE;") "s390_expand_logical_operator (XOR, DImode, operands); DONE;")
...@@ -5208,7 +5226,7 @@ ...@@ -5208,7 +5226,7 @@
; ;
(define_insn "*xorsi3_cc" (define_insn "*xorsi3_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0") (compare (xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T")) (match_operand:SI 2 "general_operand" "d,R,T"))
(const_int 0))) (const_int 0)))
...@@ -5222,7 +5240,7 @@ ...@@ -5222,7 +5240,7 @@
[(set_attr "op_type" "RR,RX,RXY")]) [(set_attr "op_type" "RR,RX,RXY")])
(define_insn "*xorsi3_cconly" (define_insn "*xorsi3_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0") (compare (xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T")) (match_operand:SI 2 "general_operand" "d,R,T"))
(const_int 0))) (const_int 0)))
...@@ -5238,7 +5256,7 @@ ...@@ -5238,7 +5256,7 @@
[(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,AQ,Q") [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,AQ,Q")
(xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0,0,0") (xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,0,0,0")
(match_operand:SI 2 "general_operand" "d,R,T,NxQS0,Q"))) (match_operand:SI 2 "general_operand" "d,R,T,NxQS0,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"s390_logical_operator_ok_p (operands)" "s390_logical_operator_ok_p (operands)"
"@ "@
xr\t%0,%2 xr\t%0,%2
...@@ -5251,18 +5269,18 @@ ...@@ -5251,18 +5269,18 @@
(define_split (define_split
[(set (match_operand:SI 0 "s_operand" "") [(set (match_operand:SI 0 "s_operand" "")
(xor:SI (match_dup 0) (match_operand:SI 1 "immediate_operand" ""))) (xor:SI (match_dup 0) (match_operand:SI 1 "immediate_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"reload_completed" "reload_completed"
[(parallel [(parallel
[(set (match_dup 0) (xor:QI (match_dup 0) (match_dup 1))) [(set (match_dup 0) (xor:QI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"s390_narrow_logical_operator (XOR, &operands[0], &operands[1]);") "s390_narrow_logical_operator (XOR, &operands[0], &operands[1]);")
(define_expand "xorsi3" (define_expand "xorsi3"
[(set (match_operand:SI 0 "nonimmediate_operand" "") [(set (match_operand:SI 0 "nonimmediate_operand" "")
(xor:SI (match_operand:SI 1 "nonimmediate_operand" "") (xor:SI (match_operand:SI 1 "nonimmediate_operand" "")
(match_operand:SI 2 "general_operand" ""))) (match_operand:SI 2 "general_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"s390_expand_logical_operator (XOR, SImode, operands); DONE;") "s390_expand_logical_operator (XOR, SImode, operands); DONE;")
...@@ -5274,7 +5292,7 @@ ...@@ -5274,7 +5292,7 @@
[(set (match_operand:HI 0 "nonimmediate_operand" "=d,AQ,Q") [(set (match_operand:HI 0 "nonimmediate_operand" "=d,AQ,Q")
(xor:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0") (xor:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:HI 2 "general_operand" "d,NxQH0,Q"))) (match_operand:HI 2 "general_operand" "d,NxQH0,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"s390_logical_operator_ok_p (operands)" "s390_logical_operator_ok_p (operands)"
"@ "@
xr\t%0,%2 xr\t%0,%2
...@@ -5285,18 +5303,18 @@ ...@@ -5285,18 +5303,18 @@
(define_split (define_split
[(set (match_operand:HI 0 "s_operand" "") [(set (match_operand:HI 0 "s_operand" "")
(xor:HI (match_dup 0) (match_operand:HI 1 "immediate_operand" ""))) (xor:HI (match_dup 0) (match_operand:HI 1 "immediate_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"reload_completed" "reload_completed"
[(parallel [(parallel
[(set (match_dup 0) (xor:QI (match_dup 0) (match_dup 1))) [(set (match_dup 0) (xor:QI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"s390_narrow_logical_operator (XOR, &operands[0], &operands[1]);") "s390_narrow_logical_operator (XOR, &operands[0], &operands[1]);")
(define_expand "xorhi3" (define_expand "xorhi3"
[(set (match_operand:HI 0 "nonimmediate_operand" "") [(set (match_operand:HI 0 "nonimmediate_operand" "")
(xor:HI (match_operand:HI 1 "nonimmediate_operand" "") (xor:HI (match_operand:HI 1 "nonimmediate_operand" "")
(match_operand:HI 2 "general_operand" ""))) (match_operand:HI 2 "general_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"s390_expand_logical_operator (XOR, HImode, operands); DONE;") "s390_expand_logical_operator (XOR, HImode, operands); DONE;")
...@@ -5308,7 +5326,7 @@ ...@@ -5308,7 +5326,7 @@
[(set (match_operand:QI 0 "nonimmediate_operand" "=d,Q,S,Q") [(set (match_operand:QI 0 "nonimmediate_operand" "=d,Q,S,Q")
(xor:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,0") (xor:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,0")
(match_operand:QI 2 "general_operand" "d,n,n,Q"))) (match_operand:QI 2 "general_operand" "d,n,n,Q")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"s390_logical_operator_ok_p (operands)" "s390_logical_operator_ok_p (operands)"
"@ "@
xr\t%0,%2 xr\t%0,%2
...@@ -5321,7 +5339,7 @@ ...@@ -5321,7 +5339,7 @@
[(set (match_operand:QI 0 "nonimmediate_operand" "") [(set (match_operand:QI 0 "nonimmediate_operand" "")
(xor:QI (match_operand:QI 1 "nonimmediate_operand" "") (xor:QI (match_operand:QI 1 "nonimmediate_operand" "")
(match_operand:QI 2 "general_operand" ""))) (match_operand:QI 2 "general_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"s390_expand_logical_operator (XOR, QImode, operands); DONE;") "s390_expand_logical_operator (XOR, QImode, operands); DONE;")
...@@ -5334,7 +5352,7 @@ ...@@ -5334,7 +5352,7 @@
(xor:BLK (match_dup 0) (xor:BLK (match_dup 0)
(match_operand:BLK 1 "memory_operand" "Q"))) (match_operand:BLK 1 "memory_operand" "Q")))
(use (match_operand 2 "const_int_operand" "n")) (use (match_operand 2 "const_int_operand" "n"))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 256" "INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 256"
"xc\t%O0(%2,%R0),%S1" "xc\t%O0(%2,%R0),%S1"
[(set_attr "op_type" "SS")]) [(set_attr "op_type" "SS")])
...@@ -5343,14 +5361,14 @@ ...@@ -5343,14 +5361,14 @@
[(set (match_operand 0 "memory_operand" "") [(set (match_operand 0 "memory_operand" "")
(xor (match_dup 0) (xor (match_dup 0)
(match_operand 1 "memory_operand" ""))) (match_operand 1 "memory_operand" "")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"reload_completed "reload_completed
&& GET_MODE (operands[0]) == GET_MODE (operands[1]) && GET_MODE (operands[0]) == GET_MODE (operands[1])
&& GET_MODE_SIZE (GET_MODE (operands[0])) > 0" && GET_MODE_SIZE (GET_MODE (operands[0])) > 0"
[(parallel [(parallel
[(set (match_dup 0) (xor:BLK (match_dup 0) (match_dup 1))) [(set (match_dup 0) (xor:BLK (match_dup 0) (match_dup 1)))
(use (match_dup 2)) (use (match_dup 2))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
{ {
operands[2] = GEN_INT (GET_MODE_SIZE (GET_MODE (operands[0]))); operands[2] = GEN_INT (GET_MODE_SIZE (GET_MODE (operands[0])));
operands[0] = adjust_address (operands[0], BLKmode, 0); operands[0] = adjust_address (operands[0], BLKmode, 0);
...@@ -5363,20 +5381,20 @@ ...@@ -5363,20 +5381,20 @@
(xor:BLK (match_dup 0) (xor:BLK (match_dup 0)
(match_operand:BLK 1 "memory_operand" ""))) (match_operand:BLK 1 "memory_operand" "")))
(use (match_operand 2 "const_int_operand" "")) (use (match_operand 2 "const_int_operand" ""))
(clobber (reg:CC 33))]) (clobber (reg:CC CC_REGNUM))])
(parallel (parallel
[(set (match_operand:BLK 3 "memory_operand" "") [(set (match_operand:BLK 3 "memory_operand" "")
(xor:BLK (match_dup 3) (xor:BLK (match_dup 3)
(match_operand:BLK 4 "memory_operand" ""))) (match_operand:BLK 4 "memory_operand" "")))
(use (match_operand 5 "const_int_operand" "")) (use (match_operand 5 "const_int_operand" ""))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"s390_offset_p (operands[0], operands[3], operands[2]) "s390_offset_p (operands[0], operands[3], operands[2])
&& s390_offset_p (operands[1], operands[4], operands[2]) && s390_offset_p (operands[1], operands[4], operands[2])
&& INTVAL (operands[2]) + INTVAL (operands[5]) <= 256" && INTVAL (operands[2]) + INTVAL (operands[5]) <= 256"
[(parallel [(parallel
[(set (match_dup 6) (xor:BLK (match_dup 6) (match_dup 7))) [(set (match_dup 6) (xor:BLK (match_dup 6) (match_dup 7)))
(use (match_dup 8)) (use (match_dup 8))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"operands[6] = gen_rtx_MEM (BLKmode, XEXP (operands[0], 0)); "operands[6] = gen_rtx_MEM (BLKmode, XEXP (operands[0], 0));
operands[7] = gen_rtx_MEM (BLKmode, XEXP (operands[1], 0)); operands[7] = gen_rtx_MEM (BLKmode, XEXP (operands[1], 0));
operands[8] = GEN_INT (INTVAL (operands[2]) + INTVAL (operands[5]));") operands[8] = GEN_INT (INTVAL (operands[2]) + INTVAL (operands[5]));")
...@@ -5389,7 +5407,7 @@ ...@@ -5389,7 +5407,7 @@
[(set (match_operand:BLK 0 "memory_operand" "=Q") [(set (match_operand:BLK 0 "memory_operand" "=Q")
(const_int 0)) (const_int 0))
(use (match_operand 1 "const_int_operand" "n")) (use (match_operand 1 "const_int_operand" "n"))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"INTVAL (operands[1]) >= 1 && INTVAL (operands[1]) <= 256" "INTVAL (operands[1]) >= 1 && INTVAL (operands[1]) <= 256"
"xc\t%O0(%1,%R0),%S0" "xc\t%O0(%1,%R0),%S0"
[(set_attr "op_type" "SS")]) [(set_attr "op_type" "SS")])
...@@ -5399,18 +5417,18 @@ ...@@ -5399,18 +5417,18 @@
[(set (match_operand:BLK 0 "memory_operand" "") [(set (match_operand:BLK 0 "memory_operand" "")
(const_int 0)) (const_int 0))
(use (match_operand 1 "const_int_operand" "")) (use (match_operand 1 "const_int_operand" ""))
(clobber (reg:CC 33))]) (clobber (reg:CC CC_REGNUM))])
(parallel (parallel
[(set (match_operand:BLK 2 "memory_operand" "") [(set (match_operand:BLK 2 "memory_operand" "")
(const_int 0)) (const_int 0))
(use (match_operand 3 "const_int_operand" "")) (use (match_operand 3 "const_int_operand" ""))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"s390_offset_p (operands[0], operands[2], operands[1]) "s390_offset_p (operands[0], operands[2], operands[1])
&& INTVAL (operands[1]) + INTVAL (operands[3]) <= 256" && INTVAL (operands[1]) + INTVAL (operands[3]) <= 256"
[(parallel [(parallel
[(set (match_dup 4) (const_int 0)) [(set (match_dup 4) (const_int 0))
(use (match_dup 5)) (use (match_dup 5))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"operands[4] = gen_rtx_MEM (BLKmode, XEXP (operands[0], 0)); "operands[4] = gen_rtx_MEM (BLKmode, XEXP (operands[0], 0));
operands[5] = GEN_INT (INTVAL (operands[1]) + INTVAL (operands[3]));") operands[5] = GEN_INT (INTVAL (operands[1]) + INTVAL (operands[3]));")
...@@ -5427,12 +5445,12 @@ ...@@ -5427,12 +5445,12 @@
[(parallel [(parallel
[(set (match_operand:DSI 0 "register_operand" "=d") [(set (match_operand:DSI 0 "register_operand" "=d")
(neg:DSI (match_operand:DSI 1 "register_operand" "d"))) (neg:DSI (match_operand:DSI 1 "register_operand" "d")))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"" ""
"") "")
(define_insn "*negdi2_sign_cc" (define_insn "*negdi2_sign_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (neg:DI (ashiftrt:DI (ashift:DI (subreg:DI (compare (neg:DI (ashiftrt:DI (ashift:DI (subreg:DI
(match_operand:SI 1 "register_operand" "d") 0) (match_operand:SI 1 "register_operand" "d") 0)
(const_int 32)) (const_int 32))) (const_int 32)) (const_int 32)))
...@@ -5446,13 +5464,13 @@ ...@@ -5446,13 +5464,13 @@
(define_insn "*negdi2_sign" (define_insn "*negdi2_sign"
[(set (match_operand:DI 0 "register_operand" "=d") [(set (match_operand:DI 0 "register_operand" "=d")
(neg:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "d")))) (neg:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "d"))))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"lcgfr\t%0,%1" "lcgfr\t%0,%1"
[(set_attr "op_type" "RRE")]) [(set_attr "op_type" "RRE")])
(define_insn "*neg<mode>2_cc" (define_insn "*neg<mode>2_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (neg:GPR (match_operand:GPR 1 "register_operand" "d")) (compare (neg:GPR (match_operand:GPR 1 "register_operand" "d"))
(const_int 0))) (const_int 0)))
(set (match_operand:GPR 0 "register_operand" "=d") (set (match_operand:GPR 0 "register_operand" "=d")
...@@ -5462,7 +5480,7 @@ ...@@ -5462,7 +5480,7 @@
[(set_attr "op_type" "RR<E>")]) [(set_attr "op_type" "RR<E>")])
(define_insn "*neg<mode>2_cconly" (define_insn "*neg<mode>2_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (neg:GPR (match_operand:GPR 1 "register_operand" "d")) (compare (neg:GPR (match_operand:GPR 1 "register_operand" "d"))
(const_int 0))) (const_int 0)))
(clobber (match_scratch:GPR 0 "=d"))] (clobber (match_scratch:GPR 0 "=d"))]
...@@ -5473,7 +5491,7 @@ ...@@ -5473,7 +5491,7 @@
(define_insn "*neg<mode>2" (define_insn "*neg<mode>2"
[(set (match_operand:GPR 0 "register_operand" "=d") [(set (match_operand:GPR 0 "register_operand" "=d")
(neg:GPR (match_operand:GPR 1 "register_operand" "d"))) (neg:GPR (match_operand:GPR 1 "register_operand" "d")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"lc<g>r\t%0,%1" "lc<g>r\t%0,%1"
[(set_attr "op_type" "RR<E>")]) [(set_attr "op_type" "RR<E>")])
...@@ -5481,24 +5499,24 @@ ...@@ -5481,24 +5499,24 @@
(define_insn_and_split "*negdi2_31" (define_insn_and_split "*negdi2_31"
[(set (match_operand:DI 0 "register_operand" "=d") [(set (match_operand:DI 0 "register_operand" "=d")
(neg:DI (match_operand:DI 1 "register_operand" "d"))) (neg:DI (match_operand:DI 1 "register_operand" "d")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_64BIT" "!TARGET_64BIT"
"#" "#"
"&& reload_completed" "&& reload_completed"
[(parallel [(parallel
[(set (match_dup 2) (neg:SI (match_dup 3))) [(set (match_dup 2) (neg:SI (match_dup 3)))
(clobber (reg:CC 33))]) (clobber (reg:CC CC_REGNUM))])
(parallel (parallel
[(set (reg:CCAP 33) [(set (reg:CCAP CC_REGNUM)
(compare:CCAP (neg:SI (match_dup 5)) (const_int 0))) (compare:CCAP (neg:SI (match_dup 5)) (const_int 0)))
(set (match_dup 4) (neg:SI (match_dup 5)))]) (set (match_dup 4) (neg:SI (match_dup 5)))])
(set (pc) (set (pc)
(if_then_else (ne (reg:CCAP 33) (const_int 0)) (if_then_else (ne (reg:CCAP CC_REGNUM) (const_int 0))
(pc) (pc)
(label_ref (match_dup 6)))) (label_ref (match_dup 6))))
(parallel (parallel
[(set (match_dup 2) (plus:SI (match_dup 2) (const_int -1))) [(set (match_dup 2) (plus:SI (match_dup 2) (const_int -1)))
(clobber (reg:CC 33))]) (clobber (reg:CC CC_REGNUM))])
(match_dup 6)] (match_dup 6)]
"operands[2] = operand_subword (operands[0], 0, 0, DImode); "operands[2] = operand_subword (operands[0], 0, 0, DImode);
operands[3] = operand_subword (operands[1], 0, 0, DImode); operands[3] = operand_subword (operands[1], 0, 0, DImode);
...@@ -5514,12 +5532,12 @@ ...@@ -5514,12 +5532,12 @@
[(parallel [(parallel
[(set (match_operand:FPR 0 "register_operand" "=f") [(set (match_operand:FPR 0 "register_operand" "=f")
(neg:FPR (match_operand:FPR 1 "register_operand" "f"))) (neg:FPR (match_operand:FPR 1 "register_operand" "f")))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"TARGET_HARD_FLOAT" "TARGET_HARD_FLOAT"
"") "")
(define_insn "*neg<mode>2_cc" (define_insn "*neg<mode>2_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (neg:FPR (match_operand:FPR 1 "register_operand" "f")) (compare (neg:FPR (match_operand:FPR 1 "register_operand" "f"))
(match_operand:FPR 2 "const0_operand" ""))) (match_operand:FPR 2 "const0_operand" "")))
(set (match_operand:FPR 0 "register_operand" "=f") (set (match_operand:FPR 0 "register_operand" "=f")
...@@ -5530,7 +5548,7 @@ ...@@ -5530,7 +5548,7 @@
(set_attr "type" "fsimp<mode>")]) (set_attr "type" "fsimp<mode>")])
(define_insn "*neg<mode>2_cconly" (define_insn "*neg<mode>2_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (neg:FPR (match_operand:FPR 1 "register_operand" "f")) (compare (neg:FPR (match_operand:FPR 1 "register_operand" "f"))
(match_operand:FPR 2 "const0_operand" ""))) (match_operand:FPR 2 "const0_operand" "")))
(clobber (match_scratch:FPR 0 "=f"))] (clobber (match_scratch:FPR 0 "=f"))]
...@@ -5542,7 +5560,7 @@ ...@@ -5542,7 +5560,7 @@
(define_insn "*neg<mode>2" (define_insn "*neg<mode>2"
[(set (match_operand:FPR 0 "register_operand" "=f") [(set (match_operand:FPR 0 "register_operand" "=f")
(neg:FPR (match_operand:FPR 1 "register_operand" "f"))) (neg:FPR (match_operand:FPR 1 "register_operand" "f")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"lc<de>br\t%0,%1" "lc<de>br\t%0,%1"
[(set_attr "op_type" "RRE") [(set_attr "op_type" "RRE")
...@@ -5551,7 +5569,7 @@ ...@@ -5551,7 +5569,7 @@
(define_insn "*neg<mode>2_ibm" (define_insn "*neg<mode>2_ibm"
[(set (match_operand:FPR 0 "register_operand" "=f") [(set (match_operand:FPR 0 "register_operand" "=f")
(neg:FPR (match_operand:FPR 1 "register_operand" "f"))) (neg:FPR (match_operand:FPR 1 "register_operand" "f")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT"
"lc<de>r\t%0,%1" "lc<de>r\t%0,%1"
[(set_attr "op_type" "RR") [(set_attr "op_type" "RR")
...@@ -5567,7 +5585,7 @@ ...@@ -5567,7 +5585,7 @@
; ;
(define_insn "*absdi2_sign_cc" (define_insn "*absdi2_sign_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (abs:DI (ashiftrt:DI (ashift:DI (subreg:DI (compare (abs:DI (ashiftrt:DI (ashift:DI (subreg:DI
(match_operand:SI 1 "register_operand" "d") 0) (match_operand:SI 1 "register_operand" "d") 0)
(const_int 32)) (const_int 32))) (const_int 32)) (const_int 32)))
...@@ -5581,13 +5599,13 @@ ...@@ -5581,13 +5599,13 @@
(define_insn "*absdi2_sign" (define_insn "*absdi2_sign"
[(set (match_operand:DI 0 "register_operand" "=d") [(set (match_operand:DI 0 "register_operand" "=d")
(abs:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "d")))) (abs:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "d"))))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"lpgfr\t%0,%1" "lpgfr\t%0,%1"
[(set_attr "op_type" "RRE")]) [(set_attr "op_type" "RRE")])
(define_insn "*abs<mode>2_cc" (define_insn "*abs<mode>2_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (abs:GPR (match_operand:DI 1 "register_operand" "d")) (compare (abs:GPR (match_operand:DI 1 "register_operand" "d"))
(const_int 0))) (const_int 0)))
(set (match_operand:GPR 0 "register_operand" "=d") (set (match_operand:GPR 0 "register_operand" "=d")
...@@ -5597,7 +5615,7 @@ ...@@ -5597,7 +5615,7 @@
[(set_attr "op_type" "RR<E>")]) [(set_attr "op_type" "RR<E>")])
(define_insn "*abs<mode>2_cconly" (define_insn "*abs<mode>2_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (abs:GPR (match_operand:GPR 1 "register_operand" "d")) (compare (abs:GPR (match_operand:GPR 1 "register_operand" "d"))
(const_int 0))) (const_int 0)))
(clobber (match_scratch:GPR 0 "=d"))] (clobber (match_scratch:GPR 0 "=d"))]
...@@ -5608,7 +5626,7 @@ ...@@ -5608,7 +5626,7 @@
(define_insn "abs<mode>2" (define_insn "abs<mode>2"
[(set (match_operand:GPR 0 "register_operand" "=d") [(set (match_operand:GPR 0 "register_operand" "=d")
(abs:GPR (match_operand:GPR 1 "register_operand" "d"))) (abs:GPR (match_operand:GPR 1 "register_operand" "d")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"lp<g>r\t%0,%1" "lp<g>r\t%0,%1"
[(set_attr "op_type" "RR<E>")]) [(set_attr "op_type" "RR<E>")])
...@@ -5621,12 +5639,12 @@ ...@@ -5621,12 +5639,12 @@
[(parallel [(parallel
[(set (match_operand:FPR 0 "register_operand" "=f") [(set (match_operand:FPR 0 "register_operand" "=f")
(abs:FPR (match_operand:FPR 1 "register_operand" "f"))) (abs:FPR (match_operand:FPR 1 "register_operand" "f")))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"TARGET_HARD_FLOAT" "TARGET_HARD_FLOAT"
"") "")
(define_insn "*abs<mode>2_cc" (define_insn "*abs<mode>2_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (abs:FPR (match_operand:FPR 1 "register_operand" "f")) (compare (abs:FPR (match_operand:FPR 1 "register_operand" "f"))
(match_operand:FPR 2 "const0_operand" ""))) (match_operand:FPR 2 "const0_operand" "")))
(set (match_operand:FPR 0 "register_operand" "=f") (set (match_operand:FPR 0 "register_operand" "=f")
...@@ -5637,7 +5655,7 @@ ...@@ -5637,7 +5655,7 @@
(set_attr "type" "fsimp<mode>")]) (set_attr "type" "fsimp<mode>")])
(define_insn "*abs<mode>2_cconly" (define_insn "*abs<mode>2_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (abs:FPR (match_operand:FPR 1 "register_operand" "f")) (compare (abs:FPR (match_operand:FPR 1 "register_operand" "f"))
(match_operand:FPR 2 "const0_operand" ""))) (match_operand:FPR 2 "const0_operand" "")))
(clobber (match_scratch:FPR 0 "=f"))] (clobber (match_scratch:FPR 0 "=f"))]
...@@ -5649,7 +5667,7 @@ ...@@ -5649,7 +5667,7 @@
(define_insn "*abs<mode>2" (define_insn "*abs<mode>2"
[(set (match_operand:FPR 0 "register_operand" "=f") [(set (match_operand:FPR 0 "register_operand" "=f")
(abs:FPR (match_operand:FPR 1 "register_operand" "f"))) (abs:FPR (match_operand:FPR 1 "register_operand" "f")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"lp<de>br\t%0,%1" "lp<de>br\t%0,%1"
[(set_attr "op_type" "RRE") [(set_attr "op_type" "RRE")
...@@ -5658,7 +5676,7 @@ ...@@ -5658,7 +5676,7 @@
(define_insn "*abs<mode>2_ibm" (define_insn "*abs<mode>2_ibm"
[(set (match_operand:FPR 0 "register_operand" "=f") [(set (match_operand:FPR 0 "register_operand" "=f")
(abs:FPR (match_operand:FPR 1 "register_operand" "f"))) (abs:FPR (match_operand:FPR 1 "register_operand" "f")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT"
"lp<de>r\t%0,%1" "lp<de>r\t%0,%1"
[(set_attr "op_type" "RR") [(set_attr "op_type" "RR")
...@@ -5673,7 +5691,7 @@ ...@@ -5673,7 +5691,7 @@
; ;
(define_insn "*negabsdi2_sign_cc" (define_insn "*negabsdi2_sign_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (neg:DI (abs:DI (ashiftrt:DI (ashift:DI (subreg:DI (compare (neg:DI (abs:DI (ashiftrt:DI (ashift:DI (subreg:DI
(match_operand:SI 1 "register_operand" "d") 0) (match_operand:SI 1 "register_operand" "d") 0)
(const_int 32)) (const_int 32)))) (const_int 32)) (const_int 32))))
...@@ -5688,13 +5706,13 @@ ...@@ -5688,13 +5706,13 @@
[(set (match_operand:DI 0 "register_operand" "=d") [(set (match_operand:DI 0 "register_operand" "=d")
(neg:DI (abs:DI (sign_extend:DI (neg:DI (abs:DI (sign_extend:DI
(match_operand:SI 1 "register_operand" "d"))))) (match_operand:SI 1 "register_operand" "d")))))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"lngfr\t%0,%1" "lngfr\t%0,%1"
[(set_attr "op_type" "RRE")]) [(set_attr "op_type" "RRE")])
(define_insn "*negabs<mode>2_cc" (define_insn "*negabs<mode>2_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (neg:GPR (abs:GPR (match_operand:GPR 1 "register_operand" "d"))) (compare (neg:GPR (abs:GPR (match_operand:GPR 1 "register_operand" "d")))
(const_int 0))) (const_int 0)))
(set (match_operand:GPR 0 "register_operand" "=d") (set (match_operand:GPR 0 "register_operand" "=d")
...@@ -5704,7 +5722,7 @@ ...@@ -5704,7 +5722,7 @@
[(set_attr "op_type" "RR<E>")]) [(set_attr "op_type" "RR<E>")])
(define_insn "*negabs<mode>2_cconly" (define_insn "*negabs<mode>2_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (neg:GPR (abs:GPR (match_operand:GPR 1 "register_operand" "d"))) (compare (neg:GPR (abs:GPR (match_operand:GPR 1 "register_operand" "d")))
(const_int 0))) (const_int 0)))
(clobber (match_scratch:GPR 0 "=d"))] (clobber (match_scratch:GPR 0 "=d"))]
...@@ -5715,7 +5733,7 @@ ...@@ -5715,7 +5733,7 @@
(define_insn "*negabs<mode>2" (define_insn "*negabs<mode>2"
[(set (match_operand:GPR 0 "register_operand" "=d") [(set (match_operand:GPR 0 "register_operand" "=d")
(neg:GPR (abs:GPR (match_operand:GPR 1 "register_operand" "d")))) (neg:GPR (abs:GPR (match_operand:GPR 1 "register_operand" "d"))))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"ln<g>r\t%0,%1" "ln<g>r\t%0,%1"
[(set_attr "op_type" "RR<E>")]) [(set_attr "op_type" "RR<E>")])
...@@ -5725,7 +5743,7 @@ ...@@ -5725,7 +5743,7 @@
; ;
(define_insn "*negabs<mode>2_cc" (define_insn "*negabs<mode>2_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (neg:FPR (abs:FPR (match_operand:FPR 1 "register_operand" "f"))) (compare (neg:FPR (abs:FPR (match_operand:FPR 1 "register_operand" "f")))
(match_operand:FPR 2 "const0_operand" ""))) (match_operand:FPR 2 "const0_operand" "")))
(set (match_operand:FPR 0 "register_operand" "=f") (set (match_operand:FPR 0 "register_operand" "=f")
...@@ -5736,7 +5754,7 @@ ...@@ -5736,7 +5754,7 @@
(set_attr "type" "fsimp<mode>")]) (set_attr "type" "fsimp<mode>")])
(define_insn "*negabs<mode>2_cconly" (define_insn "*negabs<mode>2_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (neg:FPR (abs:FPR (match_operand:FPR 1 "register_operand" "f"))) (compare (neg:FPR (abs:FPR (match_operand:FPR 1 "register_operand" "f")))
(match_operand:FPR 2 "const0_operand" ""))) (match_operand:FPR 2 "const0_operand" "")))
(clobber (match_scratch:FPR 0 "=f"))] (clobber (match_scratch:FPR 0 "=f"))]
...@@ -5748,7 +5766,7 @@ ...@@ -5748,7 +5766,7 @@
(define_insn "*negabs<mode>2" (define_insn "*negabs<mode>2"
[(set (match_operand:FPR 0 "register_operand" "=f") [(set (match_operand:FPR 0 "register_operand" "=f")
(neg:FPR (abs:FPR (match_operand:FPR 1 "register_operand" "f")))) (neg:FPR (abs:FPR (match_operand:FPR 1 "register_operand" "f"))))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"ln<de>br\t%0,%1" "ln<de>br\t%0,%1"
[(set_attr "op_type" "RRE") [(set_attr "op_type" "RRE")
...@@ -5786,7 +5804,7 @@ ...@@ -5786,7 +5804,7 @@
[(set (match_operand:INT 0 "register_operand" "") [(set (match_operand:INT 0 "register_operand" "")
(xor:INT (match_operand:INT 1 "register_operand" "") (xor:INT (match_operand:INT 1 "register_operand" "")
(const_int -1))) (const_int -1)))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"" ""
"") "")
...@@ -5851,12 +5869,12 @@ ...@@ -5851,12 +5869,12 @@
[(set (match_operand:DI 0 "register_operand" "") [(set (match_operand:DI 0 "register_operand" "")
(ashiftrt:DI (match_operand:DI 1 "register_operand" "") (ashiftrt:DI (match_operand:DI 1 "register_operand" "")
(match_operand:SI 2 "shift_count_operand" ""))) (match_operand:SI 2 "shift_count_operand" "")))
(clobber (reg:CC 33))])] (clobber (reg:CC CC_REGNUM))])]
"" ""
"") "")
(define_insn "*ashrdi3_cc_31" (define_insn "*ashrdi3_cc_31"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (ashiftrt:DI (match_operand:DI 1 "register_operand" "0") (compare (ashiftrt:DI (match_operand:DI 1 "register_operand" "0")
(match_operand:SI 2 "shift_count_operand" "Y")) (match_operand:SI 2 "shift_count_operand" "Y"))
(const_int 0))) (const_int 0)))
...@@ -5868,7 +5886,7 @@ ...@@ -5868,7 +5886,7 @@
(set_attr "atype" "reg")]) (set_attr "atype" "reg")])
(define_insn "*ashrdi3_cconly_31" (define_insn "*ashrdi3_cconly_31"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (ashiftrt:DI (match_operand:DI 1 "register_operand" "0") (compare (ashiftrt:DI (match_operand:DI 1 "register_operand" "0")
(match_operand:SI 2 "shift_count_operand" "Y")) (match_operand:SI 2 "shift_count_operand" "Y"))
(const_int 0))) (const_int 0)))
...@@ -5882,14 +5900,14 @@ ...@@ -5882,14 +5900,14 @@
[(set (match_operand:DI 0 "register_operand" "=d") [(set (match_operand:DI 0 "register_operand" "=d")
(ashiftrt:DI (match_operand:DI 1 "register_operand" "0") (ashiftrt:DI (match_operand:DI 1 "register_operand" "0")
(match_operand:SI 2 "shift_count_operand" "Y"))) (match_operand:SI 2 "shift_count_operand" "Y")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_64BIT" "!TARGET_64BIT"
"srda\t%0,%Y2" "srda\t%0,%Y2"
[(set_attr "op_type" "RS") [(set_attr "op_type" "RS")
(set_attr "atype" "reg")]) (set_attr "atype" "reg")])
(define_insn "*ashrdi3_cc_64" (define_insn "*ashrdi3_cc_64"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (ashiftrt:DI (match_operand:DI 1 "register_operand" "d") (compare (ashiftrt:DI (match_operand:DI 1 "register_operand" "d")
(match_operand:SI 2 "shift_count_operand" "Y")) (match_operand:SI 2 "shift_count_operand" "Y"))
(const_int 0))) (const_int 0)))
...@@ -5901,7 +5919,7 @@ ...@@ -5901,7 +5919,7 @@
(set_attr "atype" "reg")]) (set_attr "atype" "reg")])
(define_insn "*ashrdi3_cconly_64" (define_insn "*ashrdi3_cconly_64"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (ashiftrt:DI (match_operand:DI 1 "register_operand" "d") (compare (ashiftrt:DI (match_operand:DI 1 "register_operand" "d")
(match_operand:SI 2 "shift_count_operand" "Y")) (match_operand:SI 2 "shift_count_operand" "Y"))
(const_int 0))) (const_int 0)))
...@@ -5915,7 +5933,7 @@ ...@@ -5915,7 +5933,7 @@
[(set (match_operand:DI 0 "register_operand" "=d") [(set (match_operand:DI 0 "register_operand" "=d")
(ashiftrt:DI (match_operand:DI 1 "register_operand" "d") (ashiftrt:DI (match_operand:DI 1 "register_operand" "d")
(match_operand:SI 2 "shift_count_operand" "Y"))) (match_operand:SI 2 "shift_count_operand" "Y")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"srag\t%0,%1,%Y2" "srag\t%0,%1,%Y2"
[(set_attr "op_type" "RSE") [(set_attr "op_type" "RSE")
...@@ -5940,7 +5958,7 @@ ...@@ -5940,7 +5958,7 @@
; ;
(define_insn "*ashrsi3_cc" (define_insn "*ashrsi3_cc"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (ashiftrt:SI (match_operand:SI 1 "register_operand" "0") (compare (ashiftrt:SI (match_operand:SI 1 "register_operand" "0")
(match_operand:SI 2 "shift_count_operand" "Y")) (match_operand:SI 2 "shift_count_operand" "Y"))
(const_int 0))) (const_int 0)))
...@@ -5953,7 +5971,7 @@ ...@@ -5953,7 +5971,7 @@
(define_insn "*ashrsi3_cconly" (define_insn "*ashrsi3_cconly"
[(set (reg 33) [(set (reg CC_REGNUM)
(compare (ashiftrt:SI (match_operand:SI 1 "register_operand" "0") (compare (ashiftrt:SI (match_operand:SI 1 "register_operand" "0")
(match_operand:SI 2 "shift_count_operand" "Y")) (match_operand:SI 2 "shift_count_operand" "Y"))
(const_int 0))) (const_int 0)))
...@@ -5967,7 +5985,7 @@ ...@@ -5967,7 +5985,7 @@
[(set (match_operand:SI 0 "register_operand" "=d") [(set (match_operand:SI 0 "register_operand" "=d")
(ashiftrt:SI (match_operand:SI 1 "register_operand" "0") (ashiftrt:SI (match_operand:SI 1 "register_operand" "0")
(match_operand:SI 2 "shift_count_operand" "Y"))) (match_operand:SI 2 "shift_count_operand" "Y")))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"" ""
"sra\t%0,%Y2" "sra\t%0,%Y2"
[(set_attr "op_type" "RS") [(set_attr "op_type" "RS")
...@@ -5996,7 +6014,7 @@ ...@@ -5996,7 +6014,7 @@
(define_insn "*cjump_64" (define_insn "*cjump_64"
[(set (pc) [(set (pc)
(if_then_else (if_then_else
(match_operator 1 "s390_comparison" [(reg 33) (const_int 0)]) (match_operator 1 "s390_comparison" [(reg CC_REGNUM) (const_int 0)])
(label_ref (match_operand 0 "" "")) (label_ref (match_operand 0 "" ""))
(pc)))] (pc)))]
"TARGET_CPU_ZARCH" "TARGET_CPU_ZARCH"
...@@ -6015,7 +6033,7 @@ ...@@ -6015,7 +6033,7 @@
(define_insn "*cjump_31" (define_insn "*cjump_31"
[(set (pc) [(set (pc)
(if_then_else (if_then_else
(match_operator 1 "s390_comparison" [(reg 33) (const_int 0)]) (match_operator 1 "s390_comparison" [(reg CC_REGNUM) (const_int 0)])
(label_ref (match_operand 0 "" "")) (label_ref (match_operand 0 "" ""))
(pc)))] (pc)))]
"!TARGET_CPU_ZARCH" "!TARGET_CPU_ZARCH"
...@@ -6037,7 +6055,7 @@ ...@@ -6037,7 +6055,7 @@
(define_insn "*cjump_long" (define_insn "*cjump_long"
[(set (pc) [(set (pc)
(if_then_else (if_then_else
(match_operator 1 "s390_comparison" [(reg 33) (const_int 0)]) (match_operator 1 "s390_comparison" [(reg CC_REGNUM) (const_int 0)])
(match_operand 0 "address_operand" "U") (match_operand 0 "address_operand" "U")
(pc)))] (pc)))]
"" ""
...@@ -6061,7 +6079,7 @@ ...@@ -6061,7 +6079,7 @@
(define_insn "*icjump_64" (define_insn "*icjump_64"
[(set (pc) [(set (pc)
(if_then_else (if_then_else
(match_operator 1 "s390_comparison" [(reg 33) (const_int 0)]) (match_operator 1 "s390_comparison" [(reg CC_REGNUM) (const_int 0)])
(pc) (pc)
(label_ref (match_operand 0 "" ""))))] (label_ref (match_operand 0 "" ""))))]
"TARGET_CPU_ZARCH" "TARGET_CPU_ZARCH"
...@@ -6080,7 +6098,7 @@ ...@@ -6080,7 +6098,7 @@
(define_insn "*icjump_31" (define_insn "*icjump_31"
[(set (pc) [(set (pc)
(if_then_else (if_then_else
(match_operator 1 "s390_comparison" [(reg 33) (const_int 0)]) (match_operator 1 "s390_comparison" [(reg CC_REGNUM) (const_int 0)])
(pc) (pc)
(label_ref (match_operand 0 "" ""))))] (label_ref (match_operand 0 "" ""))))]
"!TARGET_CPU_ZARCH" "!TARGET_CPU_ZARCH"
...@@ -6102,7 +6120,7 @@ ...@@ -6102,7 +6120,7 @@
(define_insn "*icjump_long" (define_insn "*icjump_long"
[(set (pc) [(set (pc)
(if_then_else (if_then_else
(match_operator 1 "s390_comparison" [(reg 33) (const_int 0)]) (match_operator 1 "s390_comparison" [(reg CC_REGNUM) (const_int 0)])
(pc) (pc)
(match_operand 0 "address_operand" "U")))] (match_operand 0 "address_operand" "U")))]
"" ""
...@@ -6140,7 +6158,7 @@ ...@@ -6140,7 +6158,7 @@
}) })
(define_insn "*trap" (define_insn "*trap"
[(trap_if (match_operator 0 "s390_comparison" [(reg 33) (const_int 0)]) [(trap_if (match_operator 0 "s390_comparison" [(reg CC_REGNUM) (const_int 0)])
(const_int 0))] (const_int 0))]
"" ""
"j%C0\t.+2"; "j%C0\t.+2";
...@@ -6183,7 +6201,7 @@ ...@@ -6183,7 +6201,7 @@
(set (match_operand:SI 2 "nonimmediate_operand" "=1,?*m*d") (set (match_operand:SI 2 "nonimmediate_operand" "=1,?*m*d")
(plus:SI (match_dup 1) (const_int -1))) (plus:SI (match_dup 1) (const_int -1)))
(clobber (match_scratch:SI 3 "=X,&1")) (clobber (match_scratch:SI 3 "=X,&1"))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_CPU_ZARCH" "TARGET_CPU_ZARCH"
{ {
if (which_alternative != 0) if (which_alternative != 0)
...@@ -6196,12 +6214,12 @@ ...@@ -6196,12 +6214,12 @@
"&& reload_completed "&& reload_completed
&& (! REG_P (operands[2]) && (! REG_P (operands[2])
|| ! rtx_equal_p (operands[1], operands[2]))" || ! rtx_equal_p (operands[1], operands[2]))"
[(parallel [(set (reg:CCAN 33) [(parallel [(set (reg:CCAN CC_REGNUM)
(compare:CCAN (plus:SI (match_dup 3) (const_int -1)) (compare:CCAN (plus:SI (match_dup 3) (const_int -1))
(const_int 0))) (const_int 0)))
(set (match_dup 3) (plus:SI (match_dup 3) (const_int -1)))]) (set (match_dup 3) (plus:SI (match_dup 3) (const_int -1)))])
(set (match_dup 2) (match_dup 3)) (set (match_dup 2) (match_dup 3))
(set (pc) (if_then_else (ne (reg:CCAN 33) (const_int 0)) (set (pc) (if_then_else (ne (reg:CCAN CC_REGNUM) (const_int 0))
(label_ref (match_dup 0)) (label_ref (match_dup 0))
(pc)))] (pc)))]
"" ""
...@@ -6221,7 +6239,7 @@ ...@@ -6221,7 +6239,7 @@
(set (match_operand:SI 2 "nonimmediate_operand" "=1,?*m*d") (set (match_operand:SI 2 "nonimmediate_operand" "=1,?*m*d")
(plus:SI (match_dup 1) (const_int -1))) (plus:SI (match_dup 1) (const_int -1)))
(clobber (match_scratch:SI 3 "=X,&1")) (clobber (match_scratch:SI 3 "=X,&1"))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_CPU_ZARCH" "!TARGET_CPU_ZARCH"
{ {
if (which_alternative != 0) if (which_alternative != 0)
...@@ -6234,12 +6252,12 @@ ...@@ -6234,12 +6252,12 @@
"&& reload_completed "&& reload_completed
&& (! REG_P (operands[2]) && (! REG_P (operands[2])
|| ! rtx_equal_p (operands[1], operands[2]))" || ! rtx_equal_p (operands[1], operands[2]))"
[(parallel [(set (reg:CCAN 33) [(parallel [(set (reg:CCAN CC_REGNUM)
(compare:CCAN (plus:SI (match_dup 3) (const_int -1)) (compare:CCAN (plus:SI (match_dup 3) (const_int -1))
(const_int 0))) (const_int 0)))
(set (match_dup 3) (plus:SI (match_dup 3) (const_int -1)))]) (set (match_dup 3) (plus:SI (match_dup 3) (const_int -1)))])
(set (match_dup 2) (match_dup 3)) (set (match_dup 2) (match_dup 3))
(set (pc) (if_then_else (ne (reg:CCAN 33) (const_int 0)) (set (pc) (if_then_else (ne (reg:CCAN CC_REGNUM) (const_int 0))
(label_ref (match_dup 0)) (label_ref (match_dup 0))
(pc)))] (pc)))]
"" ""
...@@ -6262,7 +6280,7 @@ ...@@ -6262,7 +6280,7 @@
(set (match_operand:SI 2 "register_operand" "=1,?*m*d") (set (match_operand:SI 2 "register_operand" "=1,?*m*d")
(plus:SI (match_dup 1) (const_int -1))) (plus:SI (match_dup 1) (const_int -1)))
(clobber (match_scratch:SI 3 "=X,&1")) (clobber (match_scratch:SI 3 "=X,&1"))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"!TARGET_CPU_ZARCH" "!TARGET_CPU_ZARCH"
{ {
if (get_attr_op_type (insn) == OP_TYPE_RR) if (get_attr_op_type (insn) == OP_TYPE_RR)
...@@ -6286,7 +6304,7 @@ ...@@ -6286,7 +6304,7 @@
(set (match_operand:DI 2 "nonimmediate_operand" "=1,?*m*d") (set (match_operand:DI 2 "nonimmediate_operand" "=1,?*m*d")
(plus:DI (match_dup 1) (const_int -1))) (plus:DI (match_dup 1) (const_int -1)))
(clobber (match_scratch:DI 3 "=X,&1")) (clobber (match_scratch:DI 3 "=X,&1"))
(clobber (reg:CC 33))] (clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
{ {
if (which_alternative != 0) if (which_alternative != 0)
...@@ -6299,12 +6317,12 @@ ...@@ -6299,12 +6317,12 @@
"&& reload_completed "&& reload_completed
&& (! REG_P (operands[2]) && (! REG_P (operands[2])
|| ! rtx_equal_p (operands[1], operands[2]))" || ! rtx_equal_p (operands[1], operands[2]))"
[(parallel [(set (reg:CCAN 33) [(parallel [(set (reg:CCAN CC_REGNUM)
(compare:CCAN (plus:DI (match_dup 3) (const_int -1)) (compare:CCAN (plus:DI (match_dup 3) (const_int -1))
(const_int 0))) (const_int 0)))
(set (match_dup 3) (plus:DI (match_dup 3) (const_int -1)))]) (set (match_dup 3) (plus:DI (match_dup 3) (const_int -1)))])
(set (match_dup 2) (match_dup 3)) (set (match_dup 2) (match_dup 3))
(set (pc) (if_then_else (ne (reg:CCAN 33) (const_int 0)) (set (pc) (if_then_else (ne (reg:CCAN CC_REGNUM) (const_int 0))
(label_ref (match_dup 0)) (label_ref (match_dup 0))
(pc)))] (pc)))]
"" ""
...@@ -6499,7 +6517,7 @@ ...@@ -6499,7 +6517,7 @@
}) })
(define_insn "*sibcall_br" (define_insn "*sibcall_br"
[(call (mem:QI (reg 1)) [(call (mem:QI (reg SIBCALL_REGNUM))
(match_operand 0 "const_int_operand" "n"))] (match_operand 0 "const_int_operand" "n"))]
"SIBLING_CALL_P (insn) "SIBLING_CALL_P (insn)
&& GET_MODE (XEXP (XEXP (PATTERN (insn), 0), 0)) == Pmode" && GET_MODE (XEXP (XEXP (PATTERN (insn), 0), 0)) == Pmode"
...@@ -6540,7 +6558,7 @@ ...@@ -6540,7 +6558,7 @@
(define_insn "*sibcall_value_br" (define_insn "*sibcall_value_br"
[(set (match_operand 0 "" "") [(set (match_operand 0 "" "")
(call (mem:QI (reg 1)) (call (mem:QI (reg SIBCALL_REGNUM))
(match_operand 1 "const_int_operand" "n")))] (match_operand 1 "const_int_operand" "n")))]
"SIBLING_CALL_P (insn) "SIBLING_CALL_P (insn)
&& GET_MODE (XEXP (XEXP (XEXP (PATTERN (insn), 1), 0), 0)) == Pmode" && GET_MODE (XEXP (XEXP (XEXP (PATTERN (insn), 1), 0), 0)) == Pmode"
...@@ -6685,29 +6703,29 @@ ...@@ -6685,29 +6703,29 @@
;; ;;
(define_expand "get_tp_64" (define_expand "get_tp_64"
[(set (match_operand:DI 0 "nonimmediate_operand" "") (reg:DI 36))] [(set (match_operand:DI 0 "nonimmediate_operand" "") (reg:DI TP_REGNUM))]
"TARGET_64BIT" "TARGET_64BIT"
"") "")
(define_expand "get_tp_31" (define_expand "get_tp_31"
[(set (match_operand:SI 0 "nonimmediate_operand" "") (reg:SI 36))] [(set (match_operand:SI 0 "nonimmediate_operand" "") (reg:SI TP_REGNUM))]
"!TARGET_64BIT" "!TARGET_64BIT"
"") "")
(define_expand "set_tp_64" (define_expand "set_tp_64"
[(set (reg:DI 36) (match_operand:DI 0 "nonimmediate_operand" "")) [(set (reg:DI TP_REGNUM) (match_operand:DI 0 "nonimmediate_operand" ""))
(set (reg:DI 36) (unspec_volatile:DI [(reg:DI 36)] UNSPECV_SET_TP))] (set (reg:DI TP_REGNUM) (unspec_volatile:DI [(reg:DI TP_REGNUM)] UNSPECV_SET_TP))]
"TARGET_64BIT" "TARGET_64BIT"
"") "")
(define_expand "set_tp_31" (define_expand "set_tp_31"
[(set (reg:SI 36) (match_operand:SI 0 "nonimmediate_operand" "")) [(set (reg:SI TP_REGNUM) (match_operand:SI 0 "nonimmediate_operand" ""))
(set (reg:SI 36) (unspec_volatile:SI [(reg:SI 36)] UNSPECV_SET_TP))] (set (reg:SI TP_REGNUM) (unspec_volatile:SI [(reg:SI TP_REGNUM)] UNSPECV_SET_TP))]
"!TARGET_64BIT" "!TARGET_64BIT"
"") "")
(define_insn "*set_tp" (define_insn "*set_tp"
[(set (reg 36) (unspec_volatile [(reg 36)] UNSPECV_SET_TP))] [(set (reg TP_REGNUM) (unspec_volatile [(reg TP_REGNUM)] UNSPECV_SET_TP))]
"" ""
"" ""
[(set_attr "type" "none") [(set_attr "type" "none")
......
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