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riscv-gcc-1
Commit ac62a60e by Jan Hubicka Committed by Jan Hubicka
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i386.md (movdi_1_rex64): Allow SSE->SSE reg move. 

	* i386.md (movdi_1_rex64): Allow SSE->SSE reg move.
	(lea_0): Rename to lea_1.
	(lea_1_zext, lea_1_rex64, lea_2_rex64): New patterns.
	(lea_general_?): Allow SImodes on TARGET_64BIT
	(lea_general_?_zext): New patterns.
	(call_1, call_1_rex64): Fix.

From-SVN: r41122
parent b47b4f21
Showing with 111 additions and 8 deletions
gcc/ChangeLog
Thu Apr 5 19:02:15 CEST 2001 Jan Hubicka <jh@suse.cz>
* i386.md (movdi_1_rex64): Allow SSE->SSE reg move.
(lea_0): Rename to lea_1.
(lea_1_zext, lea_1_rex64, lea_2_rex64): New patterns.
(lea_general_?): Allow SImodes on TARGET_64BIT
(lea_general_?_zext): New patterns.
(call_1, call_1_rex64): Fix.
Thu Apr 5 19:00:15 CEST 2001 Jan Hubicka <jh@suse.cz> Thu Apr 5 19:00:15 CEST 2001 Jan Hubicka <jh@suse.cz>
* i386.c (ix86_split_long_move): Use PUT_MODE instead of change_address. * i386.c (ix86_split_long_move): Use PUT_MODE instead of change_address.
......
gcc/config/i386/i386.md
...@@ -2473,7 +2473,7 @@ ...@@ -2473,7 +2473,7 @@
"ix86_split_long_move (operands); DONE;") "ix86_split_long_move (operands); DONE;")
(define_insn "*movdi_1_rex64" (define_insn "*movdi_1_rex64"
[(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r,mr,!mr,!m*y,!*y,*m,*Y") [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r,mr,!mr,!m*y,!*y,m*Y,*Y")
(match_operand:DI 1 "general_operand" "Z,rem,i,re,n,*y,m,*Y,*m"))] (match_operand:DI 1 "general_operand" "Z,rem,i,re,n,*y,m,*Y,*m"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM) "(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& TARGET_64BIT" && TARGET_64BIT"
...@@ -5250,14 +5250,38 @@ ...@@ -5250,14 +5250,38 @@
"" ""
"ix86_expand_binary_operator (PLUS, SImode, operands); DONE;") "ix86_expand_binary_operator (PLUS, SImode, operands); DONE;")
(define_insn "*lea_0" (define_insn "*lea_1"
[(set (match_operand:SI 0 "register_operand" "=r") [(set (match_operand:SI 0 "register_operand" "=r")
(match_operand:SI 1 "address_operand" "p"))] (match_operand:SI 1 "address_operand" "p"))]
"" "!TARGET_64BIT"
"lea{l}\\t{%a1, %0|%0, %a1}" "lea{l}\\t{%a1, %0|%0, %a1}"
[(set_attr "type" "lea") [(set_attr "type" "lea")
(set_attr "mode" "SI")]) (set_attr "mode" "SI")])
(define_insn "*lea_1_rex64"
[(set (match_operand:SI 0 "register_operand" "=r")
(subreg:SI (match_operand:DI 1 "address_operand" "p") 0))]
"TARGET_64BIT"
"lea{l}\\t{%a1, %0|%0, %a1}"
[(set_attr "type" "lea")
(set_attr "mode" "SI")])
(define_insn "*lea_1_zext"
[(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI (subreg:SI (match_operand:DI 1 "address_operand" "p") 0)))]
"TARGET_64BIT && TARGET_64BIT"
"lea{l}\\t{%a1, %k0|%k0, %a1}"
[(set_attr "type" "lea")
(set_attr "mode" "SI")])
(define_insn "*lea_2_rex64"
[(set (match_operand:DI 0 "register_operand" "=r")
(match_operand:DI 1 "address_operand" "p"))]
"TARGET_64BIT"
"lea{q}\\t{%a1, %0|%0, %a1}"
[(set_attr "type" "lea")
(set_attr "mode" "DI")])
;; The lea patterns for non-Pmodes needs to be matched by several ;; The lea patterns for non-Pmodes needs to be matched by several
;; insns converted to real lea by splitters. ;; insns converted to real lea by splitters.
...@@ -5266,7 +5290,8 @@ ...@@ -5266,7 +5290,8 @@
(plus (plus (match_operand 1 "register_operand" "r") (plus (plus (match_operand 1 "register_operand" "r")
(match_operand 2 "register_operand" "r")) (match_operand 2 "register_operand" "r"))
(match_operand 3 "immediate_operand" "i")))] (match_operand 3 "immediate_operand" "i")))]
"(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode) "(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode
|| (TARGET_64BIT && GET_MODE (operands[0]) == SImode))
&& (!TARGET_PARTIAL_REG_STALL || optimize_size) && (!TARGET_PARTIAL_REG_STALL || optimize_size)
&& GET_MODE (operands[0]) == GET_MODE (operands[1]) && GET_MODE (operands[0]) == GET_MODE (operands[1])
&& GET_MODE (operands[0]) == GET_MODE (operands[2]) && GET_MODE (operands[0]) == GET_MODE (operands[2])
...@@ -5292,12 +5317,35 @@ ...@@ -5292,12 +5317,35 @@
[(set_attr "type" "lea") [(set_attr "type" "lea")
(set_attr "mode" "SI")]) (set_attr "mode" "SI")])
(define_insn_and_split "*lea_general_1_zext"
[(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI
(plus:SI (plus:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "register_operand" "r"))
(match_operand:SI 3 "immediate_operand" "i"))))]
"TARGET_64BIT"
"#"
"&& reload_completed"
[(set (match_dup 0)
(zero_extend:DI (subreg:SI (plus:DI (plus:DI (match_dup 1)
(match_dup 2))
(match_dup 3)) 0)))]
"
{
operands[1] = gen_lowpart (Pmode, operands[1]);
operands[2] = gen_lowpart (Pmode, operands[2]);
operands[3] = gen_lowpart (Pmode, operands[3]);
}"
[(set_attr "type" "lea")
(set_attr "mode" "SI")])
(define_insn_and_split "*lea_general_2" (define_insn_and_split "*lea_general_2"
[(set (match_operand 0 "register_operand" "=r") [(set (match_operand 0 "register_operand" "=r")
(plus (mult (match_operand 1 "register_operand" "r") (plus (mult (match_operand 1 "register_operand" "r")
(match_operand 2 "const248_operand" "i")) (match_operand 2 "const248_operand" "i"))
(match_operand 3 "nonmemory_operand" "ri")))] (match_operand 3 "nonmemory_operand" "ri")))]
"(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode) "(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode
|| (TARGET_64BIT && GET_MODE (operands[0]) == SImode))
&& (!TARGET_PARTIAL_REG_STALL || optimize_size) && (!TARGET_PARTIAL_REG_STALL || optimize_size)
&& GET_MODE (operands[0]) == GET_MODE (operands[1]) && GET_MODE (operands[0]) == GET_MODE (operands[1])
&& (GET_MODE (operands[0]) == GET_MODE (operands[3]) && (GET_MODE (operands[0]) == GET_MODE (operands[3])
...@@ -5321,13 +5369,35 @@ ...@@ -5321,13 +5369,35 @@
[(set_attr "type" "lea") [(set_attr "type" "lea")
(set_attr "mode" "SI")]) (set_attr "mode" "SI")])
(define_insn_and_split "*lea_general_2_zext"
[(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI
(plus:SI (mult:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "const248_operand" "n"))
(match_operand:SI 3 "nonmemory_operand" "ri"))))]
"TARGET_64BIT"
"#"
"&& reload_completed"
[(set (match_dup 0)
(zero_extend:DI (subreg:SI (plus:DI (mult:DI (match_dup 1)
(match_dup 2))
(match_dup 3)) 0)))]
"
{
operands[1] = gen_lowpart (Pmode, operands[1]);
operands[3] = gen_lowpart (Pmode, operands[3]);
}"
[(set_attr "type" "lea")
(set_attr "mode" "SI")])
(define_insn_and_split "*lea_general_3" (define_insn_and_split "*lea_general_3"
[(set (match_operand 0 "register_operand" "=r") [(set (match_operand 0 "register_operand" "=r")
(plus (plus (mult (match_operand 1 "register_operand" "r") (plus (plus (mult (match_operand 1 "register_operand" "r")
(match_operand 2 "const248_operand" "i")) (match_operand 2 "const248_operand" "i"))
(match_operand 3 "register_operand" "r")) (match_operand 3 "register_operand" "r"))
(match_operand 4 "immediate_operand" "i")))] (match_operand 4 "immediate_operand" "i")))]
"(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode) "(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode
|| (TARGET_64BIT && GET_MODE (operands[0]) == SImode))
&& (!TARGET_PARTIAL_REG_STALL || optimize_size) && (!TARGET_PARTIAL_REG_STALL || optimize_size)
&& GET_MODE (operands[0]) == GET_MODE (operands[1]) && GET_MODE (operands[0]) == GET_MODE (operands[1])
&& GET_MODE (operands[0]) == GET_MODE (operands[3])" && GET_MODE (operands[0]) == GET_MODE (operands[3])"
...@@ -5354,6 +5424,30 @@ ...@@ -5354,6 +5424,30 @@
[(set_attr "type" "lea") [(set_attr "type" "lea")
(set_attr "mode" "SI")]) (set_attr "mode" "SI")])
(define_insn_and_split "*lea_general_3_zext"
[(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI
(plus:SI (plus:SI (mult:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "const248_operand" "n"))
(match_operand:SI 3 "register_operand" "r"))
(match_operand:SI 4 "immediate_operand" "i"))))]
"TARGET_64BIT"
"#"
"&& reload_completed"
[(set (match_dup 0)
(zero_extend:DI (subreg:SI (plus:DI (plus:DI (mult:DI (match_dup 1)
(match_dup 2))
(match_dup 3))
(match_dup 4)) 0)))]
"
{
operands[1] = gen_lowpart (Pmode, operands[1]);
operands[3] = gen_lowpart (Pmode, operands[3]);
operands[4] = gen_lowpart (Pmode, operands[4]);
}"
[(set_attr "type" "lea")
(set_attr "mode" "SI")])
(define_insn "*adddi_1_rex64" (define_insn "*adddi_1_rex64"
[(set (match_operand:DI 0 "nonimmediate_operand" "=r,rm,r") [(set (match_operand:DI 0 "nonimmediate_operand" "=r,rm,r")
(plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0,r") (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0,r")
...@@ -12835,7 +12929,7 @@ ...@@ -12835,7 +12929,7 @@
(define_insn "*call_1" (define_insn "*call_1"
[(call (mem:QI (match_operand:SI 0 "call_insn_operand" "rsm")) [(call (mem:QI (match_operand:SI 0 "call_insn_operand" "rsm"))
(match_operand 1 "" ""))] (match_operand 1 "" ""))]
"TARGET_64BIT" "!TARGET_64BIT"
"* "*
{ {
if (constant_call_address_operand (operands[0], QImode)) if (constant_call_address_operand (operands[0], QImode))
...@@ -12855,7 +12949,7 @@ ...@@ -12855,7 +12949,7 @@
(define_insn "*call_1_rex64" (define_insn "*call_1_rex64"
[(call (mem:QI (match_operand:DI 0 "call_insn_operand" "rsm")) [(call (mem:QI (match_operand:DI 0 "call_insn_operand" "rsm"))
(match_operand 1 "" ""))] (match_operand 1 "" ""))]
"!TARGET_64BIT" "TARGET_64BIT"
"* "*
{ {
if (constant_call_address_operand (operands[0], QImode)) if (constant_call_address_operand (operands[0], QImode))
......
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