powerpcfold-vec-neg-longlong.h: New.

[testsuite]

2018-01-23  Will Schmidt  <will_schmidt@vnet.ibm.com>

	* gcc.target/powerpcfold-vec-neg-longlong.h:  New.
	* gcc.target/powerpc/fold-vec-neg-longlong.p8.c:  New.
	* gcc.target/powerpc/fold-vec-neg-longlong.p9.c:  New.
	* gcc.target/powerpc/fold-vec-neg-longlong.c:  Delete.

	* gcc.target/powerpc/fold-vec-neg-int.c: Remove scan-assembler stanzas.
	* gcc.target/powerpc/fold-vec-neg-int.p7.c: New.
	* gcc.target/powerpc/fold-vec-neg-int.p8.c: New.
	* gcc.target/powerpc/fold-vec-neg-int.p9.c: New.

From-SVN: r257092

gcc/testsuite/ChangeLog

+2018-01-26  Will Schmidt  <will_schmidt@vnet.ibm.com>
+
+	* gcc.target/powerpc/fold-vec-neg-longlong.h:  New.
+	* gcc.target/powerpc/fold-vec-neg-longlong.p8.c:  New.
+	* gcc.target/powerpc/fold-vec-neg-longlong.p9.c:  New.
+	* gcc.target/powerpc/fold-vec-neg-longlong.c:  Delete.
+	* gcc.target/powerpc/fold-vec-neg-int.c: Remove scan-assembler stanzas.
+	* gcc.target/powerpc/fold-vec-neg-int.p7.c: New.
+	* gcc.target/powerpc/fold-vec-neg-int.p8.c: New.
+	* gcc.target/powerpc/fold-vec-neg-int.p9.c: New.
+
 2018-01-26  Richard Biener  <rguenther@suse.de>
 
 	PR rtl-optimization/84003

gcc/testsuite/gcc.target/powerpc/fold-vec-neg-int.c

@@ -13,6 +13,4 @@ test1 (vector signed int x)
   return vec_neg (x);
 }
 
-/* { dg-final { scan-assembler-times "xxspltib|vspltisw|vxor" 1 } } */
-/* { dg-final { scan-assembler-times "vsubuwm" 1 } } */
-/* { dg-final { scan-assembler-times "vmaxsw" 0 } } */
+/* Scan-assembler stanzas have been moved to fold-vec-neg-int.p*.c tests. */

gcc/testsuite/gcc.target/powerpc/fold-vec-neg-int.p7.c

+/* Verify that overloaded built-ins for vec_neg with int
+   inputs produce the right code when -mcpu=power7 is specified.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -O2 -mcpu=power7" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
+
+#include <altivec.h>
+
+vector signed int
+test1 (vector signed int x)
+{
+  return vec_neg (x);
+}
+
+/* { dg-final { scan-assembler-times "xxspltib|vspltisw|vxor" 1 } } */
+/* { dg-final { scan-assembler-times "vsubuwm" 1 } } */
+/* { dg-final { scan-assembler-times "vmaxsw" 0 } } */

gcc/testsuite/gcc.target/powerpc/fold-vec-neg-int.p8.c

+/* Verify that overloaded built-ins for vec_neg with int
+   inputs produce the right code when -mcpu=power8 is specified.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -O2 -mcpu=power8" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+
+vector signed int
+test1 (vector signed int x)
+{
+  return vec_neg (x);
+}
+
+/* { dg-final { scan-assembler-times "xxspltib|vspltisw|vxor" 1 } } */
+/* { dg-final { scan-assembler-times "vsubuwm" 1 } } */
+/* { dg-final { scan-assembler-times "vmaxsw" 0 } } */

gcc/testsuite/gcc.target/powerpc/fold-vec-neg-int.p9.c

+/* Verify that overloaded built-ins for vec_neg with int
+   inputs produce the right code when -mcpu=power9 is specified.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -O2 -mcpu=power9" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+
+#include <altivec.h>
+
+vector signed int
+test1 (vector signed int x)
+{
+  return vec_neg (x);
+}
+
+/* { dg-final { scan-assembler-times "vnegw" 1 } } */
+

gcc/testsuite/gcc.target/powerpc/fold-vec-neg-longlong.c → gcc/testsuite/gcc.target/powerpc/fold-vec-neg-longlong.h

 /* Verify that overloaded built-ins for vec_neg with long long
    inputs produce the right code.  */
 
+/* vec_neg testcase, included by fold-vec-neg-longlong.p*.c */
+
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_p8vector_ok } */
 /* { dg-options "-mpower8-vector -O2" } */
@@ -13,6 +15,3 @@ test3 (vector signed long long x)
   return vec_neg (x);
 }
 
-/* { dg-final { scan-assembler-times "xxspltib|vspltisw" 1 } } */
-/* { dg-final { scan-assembler-times "vsubudm" 1 } } */
-/* { dg-final { scan-assembler-times "vmaxsd" 0 } } */

gcc/testsuite/gcc.target/powerpc/fold-vec-neg-longlong.p8.c

+/* Verify that overloaded built-ins for vec_neg with long long
+   inputs produce the right code.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mpower8-vector -mcpu=power8 -O2" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+
+#include "fold-vec-neg-longlong.h"
+
+/* { dg-final { scan-assembler-times "xxspltib|vspltisw" 1 } } */
+/* { dg-final { scan-assembler-times "vsubudm" 1 } } */
+/* { dg-final { scan-assembler-times "vmaxsd" 0 } } */

gcc/testsuite/gcc.target/powerpc/fold-vec-neg-longlong.p9.c

+/* Verify that overloaded built-ins for vec_neg with long long
+   inputs produce the right code.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mcpu=power9 -O2" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+
+#include "fold-vec-neg-longlong.h"
+
+
+/* { dg-final { scan-assembler-times "vnegd" 1 } } */
+/* { dg-final { scan-assembler-times "vmaxsd" 0 } } */
+