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riscv-gcc-1
Commit a8b4881f by Richard Sandiford Committed by Richard Sandiford
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mips.c (mips_add_large_offset_to_sp): Remove FILE arg. 

	* config/mips/mips.c (mips_add_large_offset_to_sp): Remove FILE arg.
	(save_restore_insns): Likewise.
	(mips_expand_prologue, mips_expand_epilogue): Update callers.
	(highpart_shift_operator): Attach ATTRIBUTE_UNUSED to mode argument.

From-SVN: r53341
parent b70b3534
Showing with 20 additions and 109 deletions
gcc/ChangeLog
2002-05-09 Richard Sandiford <rsandifo@redhat.com>
* config/mips/mips.c (mips_add_large_offset_to_sp): Remove FILE arg.
(save_restore_insns): Likewise.
(mips_expand_prologue, mips_expand_epilogue): Update callers.
(highpart_shift_operator): Attach ATTRIBUTE_UNUSED to mode argument.
Thu May 9 11:50:09 2002 Jeffrey A Law (law@cygnus.com)
* i386.md (type attribute): Add "rotate" for rotate insns.
......
gcc/config/mips/mips.c
......@@ -104,15 +104,13 @@ static void mips_arg_info PARAMS ((const CUMULATIVE_ARGS *,
enum machine_mode,
tree, int,
struct mips_arg_info *));
static rtx mips_add_large_offset_to_sp PARAMS ((HOST_WIDE_INT,
FILE *));
static rtx mips_add_large_offset_to_sp PARAMS ((HOST_WIDE_INT));
static void mips_annotate_frame_insn PARAMS ((rtx, rtx));
static rtx mips_frame_set PARAMS ((enum machine_mode,
int, int));
static void mips_emit_frame_related_store PARAMS ((rtx, rtx,
HOST_WIDE_INT));
static void save_restore_insns PARAMS ((int, rtx,
long, FILE *));
static void save_restore_insns PARAMS ((int, rtx, long));
static void mips16_output_gp_offset PARAMS ((FILE *, rtx));
static void mips16_fp_args PARAMS ((FILE *, int, int));
static void build_mips16_function_stub PARAMS ((FILE *));
......@@ -6719,21 +6717,16 @@ compute_frame_size (size)
#define BITSET_P(VALUE,BIT) (((VALUE) & (1L << (BIT))) != 0)
/* Emit instructions to load the value (SP + OFFSET) into MIPS_TEMP2_REGNUM
and return an rtl expression for the register. Write the assembly
instructions directly to FILE if it is not null, otherwise emit them as
rtl.
and return an rtl expression for the register.
This function is a subroutine of save_restore_insns. It is used when
OFFSET is too large to add in a single instruction. */
static rtx
mips_add_large_offset_to_sp (offset, file)
mips_add_large_offset_to_sp (offset)
HOST_WIDE_INT offset;
FILE *file;
{
rtx reg = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM);
if (file == 0)
{
rtx offset_rtx = GEN_INT (offset);
emit_move_insn (reg, offset_rtx);
......@@ -6741,18 +6734,6 @@ mips_add_large_offset_to_sp (offset, file)
emit_insn (gen_adddi3 (reg, reg, stack_pointer_rtx));
else
emit_insn (gen_addsi3 (reg, reg, stack_pointer_rtx));
}
else
{
fprintf (file, "\tli\t%s,0x%.08lx\t# ",
reg_names[MIPS_TEMP2_REGNUM], (long) offset);
fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset);
fprintf (file, "\n\t%s\t%s,%s,%s\n",
Pmode == DImode ? "daddu" : "addu",
reg_names[MIPS_TEMP2_REGNUM],
reg_names[MIPS_TEMP2_REGNUM],
reg_names[STACK_POINTER_REGNUM]);
}
return reg;
}
......@@ -6818,11 +6799,10 @@ mips_emit_frame_related_store (mem, reg, offset)
}
static void
save_restore_insns (store_p, large_reg, large_offset, file)
save_restore_insns (store_p, large_reg, large_offset)
int store_p; /* true if this is prologue */
rtx large_reg; /* register holding large offset constant or NULL */
long large_offset; /* large constant offset value */
FILE *file; /* file to write instructions instead of making RTL */
{
long mask = current_frame_info.mask;
long fmask = current_frame_info.fmask;
......@@ -6886,8 +6866,6 @@ save_restore_insns (store_p, large_reg, large_offset, file)
{
base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM);
base_offset = large_offset;
if (file == 0)
{
if (Pmode == DImode)
insn = emit_insn (gen_adddi3 (base_reg_rtx, large_reg,
stack_pointer_rtx));
......@@ -6896,16 +6874,9 @@ save_restore_insns (store_p, large_reg, large_offset, file)
stack_pointer_rtx));
}
else
fprintf (file, "\t%s\t%s,%s,%s\n",
Pmode == DImode ? "daddu" : "addu",
reg_names[MIPS_TEMP2_REGNUM],
reg_names[REGNO (large_reg)],
reg_names[STACK_POINTER_REGNUM]);
}
else
{
base_offset = gp_offset;
base_reg_rtx = mips_add_large_offset_to_sp (base_offset, file);
base_reg_rtx = mips_add_large_offset_to_sp (base_offset);
}
/* When we restore the registers in MIPS16 mode, then if we are
......@@ -6922,9 +6893,8 @@ save_restore_insns (store_p, large_reg, large_offset, file)
base_offset += current_function_outgoing_args_size;
for (regno = GP_REG_LAST; regno >= GP_REG_FIRST; regno--)
if (BITSET_P (mask, regno - GP_REG_FIRST))
{
if (file == 0)
if (BITSET_P (mask, regno - GP_REG_FIRST))
{
rtx reg_rtx;
rtx mem_rtx
......@@ -6969,50 +6939,9 @@ save_restore_insns (store_p, large_reg, large_offset, file)
reg_rtx);
}
}
else
{
int r = regno;
/* The mips16 does not have an instruction to
load $31, so we load $7 instead, and work
things out in the caller. */
if (TARGET_MIPS16 && ! store_p && r == GP_REG_FIRST + 31)
r = GP_REG_FIRST + 7;
/* The mips16 sometimes needs to save $18. */
if (TARGET_MIPS16
&& regno != GP_REG_FIRST + 31
&& ! M16_REG_P (regno))
{
if (! store_p)
r = GP_REG_FIRST + 6;
else
{
r = GP_REG_FIRST + 3;
fprintf (file, "\tmove\t%s,%s\n",
reg_names[r], reg_names[regno]);
}
}
fprintf (file, "\t%s\t%s,",
(TARGET_64BIT
? (store_p) ? "sd" : "ld"
: (store_p) ? "sw" : "lw"),
reg_names[r]);
fprintf (file, HOST_WIDE_INT_PRINT_DEC,
gp_offset - base_offset);
fprintf (file, "(%s)\n", reg_names[REGNO(base_reg_rtx)]);
if (! store_p
&& TARGET_MIPS16
&& regno != GP_REG_FIRST + 31
&& ! M16_REG_P (regno))
fprintf (file, "\tmove\t%s,%s\n",
reg_names[regno], reg_names[r]);
}
gp_offset -= GET_MODE_SIZE (gpr_mode);
}
/* If the restore is being supressed, still take into account
the offset at which it is stored. */
else if (BITSET_P (real_mask, regno - GP_REG_FIRST))
{
if (BITSET_P (real_mask, regno - GP_REG_FIRST))
gp_offset -= GET_MODE_SIZE (gpr_mode);
}
}
......@@ -7046,8 +6975,6 @@ save_restore_insns (store_p, large_reg, large_offset, file)
{
base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM);
base_offset = large_offset;
if (file == 0)
{
if (Pmode == DImode)
insn = emit_insn (gen_adddi3 (base_reg_rtx, large_reg,
stack_pointer_rtx));
......@@ -7055,18 +6982,10 @@ save_restore_insns (store_p, large_reg, large_offset, file)
insn = emit_insn (gen_addsi3 (base_reg_rtx, large_reg,
stack_pointer_rtx));
}
else
fprintf (file, "\t%s\t%s,%s,%s\n",
Pmode == DImode ? "daddu" : "addu",
reg_names[MIPS_TEMP2_REGNUM],
reg_names[REGNO (large_reg)],
reg_names[STACK_POINTER_REGNUM]);
}
else
{
base_offset = fp_offset;
base_reg_rtx = mips_add_large_offset_to_sp (fp_offset, file);
base_reg_rtx = mips_add_large_offset_to_sp (fp_offset);
}
/* This loop must iterate over the same space as its companion in
......@@ -7076,10 +6995,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
regno -= FP_INC)
if (BITSET_P (fmask, regno - FP_REG_FIRST))
{
if (file == 0)
{
enum machine_mode sz
= TARGET_SINGLE_FLOAT ? SFmode : DFmode;
enum machine_mode sz = TARGET_SINGLE_FLOAT ? SFmode : DFmode;
rtx reg_rtx = gen_rtx (REG, sz, regno);
rtx mem_rtx = gen_rtx (MEM, sz,
gen_rtx (PLUS, Pmode, base_reg_rtx,
......@@ -7092,18 +7008,6 @@ save_restore_insns (store_p, large_reg, large_offset, file)
mips_emit_frame_related_store (mem_rtx, reg_rtx, fp_offset);
else
emit_move_insn (reg_rtx, mem_rtx);
}
else
{
fprintf (file, "\t%s\t%s,",
(TARGET_SINGLE_FLOAT
? (store_p ? "s.s" : "l.s")
: (store_p ? "s.d" : "l.d")),
reg_names[regno]);
fprintf (file, HOST_WIDE_INT_PRINT_DEC,
fp_offset - base_offset);
fprintf (file, "(%s)\n", reg_names[REGNO(base_reg_rtx)]);
}
fp_offset -= UNITS_PER_FPVALUE;
}
......@@ -7593,7 +7497,7 @@ mips_expand_prologue ()
}
if (! mips_entry)
save_restore_insns (1, tmp_rtx, tsize, (FILE *)0);
save_restore_insns (1, tmp_rtx, tsize);
else if (reg_18_save != NULL_RTX)
emit_insn (reg_18_save);
......@@ -7862,7 +7766,7 @@ mips_expand_epilogue ()
& (1L << (PIC_OFFSET_TABLE_REGNUM - GP_REG_FIRST))))
emit_insn (gen_blockage ());
save_restore_insns (0, tmp_rtx, orig_tsize, (FILE *)0);
save_restore_insns (0, tmp_rtx, orig_tsize);
/* In mips16 mode with a large frame, we adjust the stack
pointer before restoring the registers. In this case, we
......@@ -9743,7 +9647,7 @@ highpart_shift_operator (x, mode)
int
mips_register_move_cost (mode, to, from)
enum machine_mode mode;
enum machine_mode mode ATTRIBUTE_UNUSED;
enum reg_class to, from;
{
if (from == M16_REGS && GR_REG_CLASS_P (to))
......
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