Commit a67a3220 by Jan Hubicka Committed by Jan Hubicka

re PR inline-asm/8808 (Internal compiler error in extract_constrain_insn_cached)


	PR inline-asm/8088
	* i386.c (ix86_hard_regno_mode_ok):  Return 0 for MMX/SSE registers
	when MMX/SSE is not available.

From-SVN: r65181
parent 11292480
Thu Apr 3 00:31:21 CEST 2003 Jan Hubicka <jh@suse.cz>
PR inline-asm/8088
* i386.c (ix86_hard_regno_mode_ok): Return 0 for MMX/SSE registers
when MMX/SSE is not available.
2003-04-02 Mike Stump <mrs@apple.com> 2003-04-02 Mike Stump <mrs@apple.com>
* doc/install.texi (Specific): Update pointers to apple.com. * doc/install.texi (Specific): Update pointers to apple.com.
......
...@@ -6080,13 +6080,11 @@ legitimate_address_p (mode, addr, strict) ...@@ -6080,13 +6080,11 @@ legitimate_address_p (mode, addr, strict)
that never results in lea, this seems to be easier and that never results in lea, this seems to be easier and
correct fix for crash to disable this test. */ correct fix for crash to disable this test. */
} }
#if 0
else if (!CONSTANT_ADDRESS_P (disp)) else if (!CONSTANT_ADDRESS_P (disp))
{ {
reason = "displacement is not constant"; reason = "displacement is not constant";
goto report_error; goto report_error;
} }
#endif
else if (TARGET_64BIT && !x86_64_sign_extended_value (disp)) else if (TARGET_64BIT && !x86_64_sign_extended_value (disp))
{ {
reason = "displacement is out of range"; reason = "displacement is out of range";
...@@ -14817,9 +14815,10 @@ ix86_hard_regno_mode_ok (regno, mode) ...@@ -14817,9 +14815,10 @@ ix86_hard_regno_mode_ok (regno, mode)
if (FP_REGNO_P (regno)) if (FP_REGNO_P (regno))
return VALID_FP_MODE_P (mode); return VALID_FP_MODE_P (mode);
if (SSE_REGNO_P (regno)) if (SSE_REGNO_P (regno))
return VALID_SSE_REG_MODE (mode); return (TARGET_SSE ? VALID_SSE_REG_MODE (mode) : 0);
if (MMX_REGNO_P (regno)) if (MMX_REGNO_P (regno))
return VALID_MMX_REG_MODE (mode) || VALID_MMX_REG_MODE_3DNOW (mode); return (TARGET_MMX
? VALID_MMX_REG_MODE (mode) || VALID_MMX_REG_MODE_3DNOW (mode) : 0);
/* We handle both integer and floats in the general purpose registers. /* We handle both integer and floats in the general purpose registers.
In future we should be able to handle vector modes as well. */ In future we should be able to handle vector modes as well. */
if (!VALID_INT_MODE_P (mode) && !VALID_FP_MODE_P (mode)) if (!VALID_INT_MODE_P (mode) && !VALID_FP_MODE_P (mode))
......
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