Commit a1b36964 by Jeff Law

pa.c (compute_movstrsi_length): Return length in bytes.

        * pa.c (compute_movstrsi_length): Return length in bytes.
        (pa_adjust_insn_length): Return adjustment in bytes.
        (output_cbranch): Handle lengths as bytes.
        (output_bb, output_dbra, output_movb): Likewise.

From-SVN: r4890
parent 2af5b845
...@@ -1524,7 +1524,7 @@ compute_movstrsi_length (insn) ...@@ -1524,7 +1524,7 @@ compute_movstrsi_length (insn)
/* Count last store or partial store. */ /* Count last store or partial store. */
insn_count += 1; insn_count += 1;
return insn_count; return insn_count * 4;
} }
if (align >= 2 && n_bytes >= 2) if (align >= 2 && n_bytes >= 2)
...@@ -1543,7 +1543,7 @@ compute_movstrsi_length (insn) ...@@ -1543,7 +1543,7 @@ compute_movstrsi_length (insn)
/* ??? final store from loop. */ /* ??? final store from loop. */
insn_count += 1; insn_count += 1;
return insn_count; return insn_count * 4;
} }
/* First load. */ /* First load. */
...@@ -1556,7 +1556,7 @@ compute_movstrsi_length (insn) ...@@ -1556,7 +1556,7 @@ compute_movstrsi_length (insn)
/* Final store. */ /* Final store. */
insn_count += 1; insn_count += 1;
return insn_count; return insn_count * 4;
} }
if (align != 4) if (align != 4)
...@@ -1580,7 +1580,7 @@ compute_movstrsi_length (insn) ...@@ -1580,7 +1580,7 @@ compute_movstrsi_length (insn)
} }
else else
insn_count += 4; insn_count += 4;
return insn_count; return insn_count * 4;
} }
...@@ -2511,11 +2511,11 @@ pa_adjust_insn_length (insn, length) ...@@ -2511,11 +2511,11 @@ pa_adjust_insn_length (insn, length)
if (GET_CODE (XVECEXP (pat, 0, 0)) == CALL if (GET_CODE (XVECEXP (pat, 0, 0)) == CALL
&& GET_CODE (XEXP (XEXP (XVECEXP (pat, 0, 0), 0), 0)) == SYMBOL_REF) && GET_CODE (XEXP (XEXP (XVECEXP (pat, 0, 0), 0), 0)) == SYMBOL_REF)
return 1; return 4;
else if (GET_CODE (XVECEXP (pat, 0, 0)) == SET else if (GET_CODE (XVECEXP (pat, 0, 0)) == SET
&& GET_CODE (XEXP (XEXP (XEXP (XVECEXP (pat, 0, 0), 1), 0), 0)) && GET_CODE (XEXP (XEXP (XEXP (XVECEXP (pat, 0, 0), 1), 0), 0))
== SYMBOL_REF) == SYMBOL_REF)
return 1; return 4;
else else
return 0; return 0;
} }
...@@ -2525,7 +2525,7 @@ pa_adjust_insn_length (insn, length) ...@@ -2525,7 +2525,7 @@ pa_adjust_insn_length (insn, length)
&& GET_CODE (pat) != USE && GET_CODE (pat) != USE
&& GET_CODE (pat) != CLOBBER && GET_CODE (pat) != CLOBBER
&& get_attr_type (insn) == TYPE_MILLI) && get_attr_type (insn) == TYPE_MILLI)
return 1; return 4;
/* Block move pattern. */ /* Block move pattern. */
else if (GET_CODE (insn) == INSN else if (GET_CODE (insn) == INSN
&& GET_CODE (pat) == PARALLEL && GET_CODE (pat) == PARALLEL
...@@ -2533,15 +2533,15 @@ pa_adjust_insn_length (insn, length) ...@@ -2533,15 +2533,15 @@ pa_adjust_insn_length (insn, length)
&& GET_CODE (XEXP (XVECEXP (pat, 0, 0), 1)) == MEM && GET_CODE (XEXP (XVECEXP (pat, 0, 0), 1)) == MEM
&& GET_MODE (XEXP (XVECEXP (pat, 0, 0), 0)) == BLKmode && GET_MODE (XEXP (XVECEXP (pat, 0, 0), 0)) == BLKmode
&& GET_MODE (XEXP (XVECEXP (pat, 0, 0), 1)) == BLKmode) && GET_MODE (XEXP (XVECEXP (pat, 0, 0), 1)) == BLKmode)
return compute_movstrsi_length (insn) - 1; return compute_movstrsi_length (insn) - 4;
/* Conditional branch with an unfilled delay slot. */ /* Conditional branch with an unfilled delay slot. */
else if (GET_CODE (insn) == JUMP_INSN && ! simplejump_p (insn)) else if (GET_CODE (insn) == JUMP_INSN && ! simplejump_p (insn))
{ {
/* Adjust a short backwards conditional with an unfilled delay slot. */ /* Adjust a short backwards conditional with an unfilled delay slot. */
if (GET_CODE (pat) == SET if (GET_CODE (pat) == SET
&& length == 1 && length == 4
&& ! forward_branch_p (insn)) && ! forward_branch_p (insn))
return 1; return 4;
/* Adjust dbra insn with short backwards conditional branch with /* Adjust dbra insn with short backwards conditional branch with
unfilled delay slot -- only for case where counter is in a unfilled delay slot -- only for case where counter is in a
general register register. */ general register register. */
...@@ -2549,9 +2549,9 @@ pa_adjust_insn_length (insn, length) ...@@ -2549,9 +2549,9 @@ pa_adjust_insn_length (insn, length)
&& GET_CODE (XVECEXP (pat, 0, 1)) == SET && GET_CODE (XVECEXP (pat, 0, 1)) == SET
&& GET_CODE (XEXP (XVECEXP (pat, 0, 1), 0)) == REG && GET_CODE (XEXP (XVECEXP (pat, 0, 1), 0)) == REG
&& ! FP_REG_P (XEXP (XVECEXP (pat, 0, 1), 0)) && ! FP_REG_P (XEXP (XVECEXP (pat, 0, 1), 0))
&& length == 1 && length == 4
&& ! forward_branch_p (insn)) && ! forward_branch_p (insn))
return 1; return 4;
else else
return 0; return 0;
} }
...@@ -3266,20 +3266,20 @@ output_cbranch (operands, nullify, length, negated, insn) ...@@ -3266,20 +3266,20 @@ output_cbranch (operands, nullify, length, negated, insn)
/* If this is a long branch with its delay slot unfilled, set `nullify' /* If this is a long branch with its delay slot unfilled, set `nullify'
as it can nullify the delay slot and save a nop. */ as it can nullify the delay slot and save a nop. */
if (length == 2 && dbr_sequence_length () == 0) if (length == 8 && dbr_sequence_length () == 0)
nullify = 1; nullify = 1;
/* If this is a short forward conditional branch which did not get /* If this is a short forward conditional branch which did not get
its delay slot filled, the delay slot can still be nullified. */ its delay slot filled, the delay slot can still be nullified. */
if (! nullify && length == 1 && dbr_sequence_length () == 0) if (! nullify && length == 4 && dbr_sequence_length () == 0)
nullify = forward_branch_p (insn); nullify = forward_branch_p (insn);
/* A forward branch over a single nullified insn can be done with a /* A forward branch over a single nullified insn can be done with a
comclr instruction. This avoids a single cycle penalty due to comclr instruction. This avoids a single cycle penalty due to
mis-predicted branch if we fall through (branch not taken). */ mis-predicted branch if we fall through (branch not taken). */
if (length == 1 if (length == 4
&& next_real_insn (insn) != 0 && next_real_insn (insn) != 0
&& get_attr_length (next_real_insn (insn)) == 1 && get_attr_length (next_real_insn (insn)) == 4
&& JUMP_LABEL (insn) == next_nonnote_insn (next_real_insn (insn)) && JUMP_LABEL (insn) == next_nonnote_insn (next_real_insn (insn))
&& nullify) && nullify)
useskip = 1; useskip = 1;
...@@ -3288,7 +3288,7 @@ output_cbranch (operands, nullify, length, negated, insn) ...@@ -3288,7 +3288,7 @@ output_cbranch (operands, nullify, length, negated, insn)
{ {
/* All short conditional branches except backwards with an unfilled /* All short conditional branches except backwards with an unfilled
delay slot. */ delay slot. */
case 1: case 4:
if (useskip) if (useskip)
strcpy (buf, "com%I2clr,"); strcpy (buf, "com%I2clr,");
else else
...@@ -3308,7 +3308,7 @@ output_cbranch (operands, nullify, length, negated, insn) ...@@ -3308,7 +3308,7 @@ output_cbranch (operands, nullify, length, negated, insn)
/* All long conditionals. Note an short backward branch with an /* All long conditionals. Note an short backward branch with an
unfilled delay slot is treated just like a long backward branch unfilled delay slot is treated just like a long backward branch
with an unfilled delay slot. */ with an unfilled delay slot. */
case 2: case 8:
/* Handle weird backwards branch with a filled delay slot /* Handle weird backwards branch with a filled delay slot
with is nullified. */ with is nullified. */
if (dbr_sequence_length () != 0 if (dbr_sequence_length () != 0
...@@ -3367,21 +3367,21 @@ output_bb (operands, nullify, length, negated, insn, which) ...@@ -3367,21 +3367,21 @@ output_bb (operands, nullify, length, negated, insn, which)
/* If this is a long branch with its delay slot unfilled, set `nullify' /* If this is a long branch with its delay slot unfilled, set `nullify'
as it can nullify the delay slot and save a nop. */ as it can nullify the delay slot and save a nop. */
if (length == 2 && dbr_sequence_length () == 0) if (length == 8 && dbr_sequence_length () == 0)
nullify = 1; nullify = 1;
/* If this is a short forward conditional branch which did not get /* If this is a short forward conditional branch which did not get
its delay slot filled, the delay slot can still be nullified. */ its delay slot filled, the delay slot can still be nullified. */
if (! nullify && length == 1 && dbr_sequence_length () == 0) if (! nullify && length == 4 && dbr_sequence_length () == 0)
nullify = forward_branch_p (insn); nullify = forward_branch_p (insn);
/* A forward branch over a single nullified insn can be done with a /* A forward branch over a single nullified insn can be done with a
extrs instruction. This avoids a single cycle penalty due to extrs instruction. This avoids a single cycle penalty due to
mis-predicted branch if we fall through (branch not taken). */ mis-predicted branch if we fall through (branch not taken). */
if (length == 1 if (length == 4
&& next_real_insn (insn) != 0 && next_real_insn (insn) != 0
&& get_attr_length (next_real_insn (insn)) == 1 && get_attr_length (next_real_insn (insn)) == 4
&& JUMP_LABEL (insn) == next_nonnote_insn (next_real_insn (insn)) && JUMP_LABEL (insn) == next_nonnote_insn (next_real_insn (insn))
&& nullify) && nullify)
useskip = 1; useskip = 1;
...@@ -3391,7 +3391,7 @@ output_bb (operands, nullify, length, negated, insn, which) ...@@ -3391,7 +3391,7 @@ output_bb (operands, nullify, length, negated, insn, which)
/* All short conditional branches except backwards with an unfilled /* All short conditional branches except backwards with an unfilled
delay slot. */ delay slot. */
case 1: case 4:
if (useskip) if (useskip)
strcpy (buf, "extrs,"); strcpy (buf, "extrs,");
else else
...@@ -3416,7 +3416,7 @@ output_bb (operands, nullify, length, negated, insn, which) ...@@ -3416,7 +3416,7 @@ output_bb (operands, nullify, length, negated, insn, which)
/* All long conditionals. Note an short backward branch with an /* All long conditionals. Note an short backward branch with an
unfilled delay slot is treated just like a long backward branch unfilled delay slot is treated just like a long backward branch
with an unfilled delay slot. */ with an unfilled delay slot. */
case 2: case 8:
/* Handle weird backwards branch with a filled delay slot /* Handle weird backwards branch with a filled delay slot
with is nullified. */ with is nullified. */
if (dbr_sequence_length () != 0 if (dbr_sequence_length () != 0
...@@ -3498,20 +3498,20 @@ output_dbra (operands, insn, which_alternative) ...@@ -3498,20 +3498,20 @@ output_dbra (operands, insn, which_alternative)
/* If this is a long branch with its delay slot unfilled, set `nullify' /* If this is a long branch with its delay slot unfilled, set `nullify'
as it can nullify the delay slot and save a nop. */ as it can nullify the delay slot and save a nop. */
if (length == 2 && dbr_sequence_length () == 0) if (length == 8 && dbr_sequence_length () == 0)
nullify = 1; nullify = 1;
/* If this is a short forward conditional branch which did not get /* If this is a short forward conditional branch which did not get
its delay slot filled, the delay slot can still be nullified. */ its delay slot filled, the delay slot can still be nullified. */
if (! nullify && length == 1 && dbr_sequence_length () == 0) if (! nullify && length == 4 && dbr_sequence_length () == 0)
nullify = forward_branch_p (insn); nullify = forward_branch_p (insn);
/* Handle short versions first. */ /* Handle short versions first. */
if (length == 1 && nullify) if (length == 4 && nullify)
return "addib,%C2,n %1,%0,%3"; return "addib,%C2,n %1,%0,%3";
else if (length == 1 && ! nullify) else if (length == 4 && ! nullify)
return "addib,%C2 %1,%0,%3"; return "addib,%C2 %1,%0,%3";
else if (length == 2) else if (length == 8)
{ {
/* Handle weird backwards branch with a fulled delay slot /* Handle weird backwards branch with a fulled delay slot
which is nullified. */ which is nullified. */
...@@ -3537,7 +3537,7 @@ output_dbra (operands, insn, which_alternative) ...@@ -3537,7 +3537,7 @@ output_dbra (operands, insn, which_alternative)
the FP register from MEM from within the branch's delay slot. */ the FP register from MEM from within the branch's delay slot. */
output_asm_insn ("fstws %0,-16(0,%%r30)\n\tldw -16(0,%%r30),%4",operands); output_asm_insn ("fstws %0,-16(0,%%r30)\n\tldw -16(0,%%r30),%4",operands);
output_asm_insn ("ldo %1(%4),%4\n\tstw %4,-16(0,%%r30)", operands); output_asm_insn ("ldo %1(%4),%4\n\tstw %4,-16(0,%%r30)", operands);
if (get_attr_length (insn) == 6) if (get_attr_length (insn) == 24)
return "comb,%S2 0,%4,%3\n\tfldws -16(0,%%r30),%0"; return "comb,%S2 0,%4,%3\n\tfldws -16(0,%%r30),%0";
else else
return "comclr,%B2 0,%4,0\n\tbl %3,0\n\tfldws -16(0,%%r30),%0"; return "comclr,%B2 0,%4,0\n\tbl %3,0\n\tfldws -16(0,%%r30),%0";
...@@ -3548,7 +3548,7 @@ output_dbra (operands, insn, which_alternative) ...@@ -3548,7 +3548,7 @@ output_dbra (operands, insn, which_alternative)
/* Reload loop counter from memory, the store back to memory /* Reload loop counter from memory, the store back to memory
happens in the branch's delay slot. */ happens in the branch's delay slot. */
output_asm_insn ("ldw %0,%4", operands); output_asm_insn ("ldw %0,%4", operands);
if (get_attr_length (insn) == 3) if (get_attr_length (insn) == 12)
return "addib,%C2 %1,%4,%3\n\tstw %4,%0"; return "addib,%C2 %1,%4,%3\n\tstw %4,%0";
else else
return "addi,%N2 %1,%4,%0\n\tbl %3,0\n\tstw %4,%0"; return "addi,%N2 %1,%4,%0\n\tbl %3,0\n\tstw %4,%0";
...@@ -3594,20 +3594,20 @@ output_movb (operands, insn, which_alternative, reverse_comparison) ...@@ -3594,20 +3594,20 @@ output_movb (operands, insn, which_alternative, reverse_comparison)
/* If this is a long branch with its delay slot unfilled, set `nullify' /* If this is a long branch with its delay slot unfilled, set `nullify'
as it can nullify the delay slot and save a nop. */ as it can nullify the delay slot and save a nop. */
if (length == 2 && dbr_sequence_length () == 0) if (length == 8 && dbr_sequence_length () == 0)
nullify = 1; nullify = 1;
/* If this is a short forward conditional branch which did not get /* If this is a short forward conditional branch which did not get
its delay slot filled, the delay slot can still be nullified. */ its delay slot filled, the delay slot can still be nullified. */
if (! nullify && length == 1 && dbr_sequence_length () == 0) if (! nullify && length == 4 && dbr_sequence_length () == 0)
nullify = forward_branch_p (insn); nullify = forward_branch_p (insn);
/* Handle short versions first. */ /* Handle short versions first. */
if (length == 1 && nullify) if (length == 4 && nullify)
return "movb,%C2,n %1,%0,%3"; return "movb,%C2,n %1,%0,%3";
else if (length == 1 && ! nullify) else if (length == 4 && ! nullify)
return "movb,%C2 %1,%0,%3"; return "movb,%C2 %1,%0,%3";
else if (length == 2) else if (length == 8)
{ {
/* Handle weird backwards branch with a fulled delay slot /* Handle weird backwards branch with a fulled delay slot
which is nullified. */ which is nullified. */
...@@ -3632,7 +3632,7 @@ output_movb (operands, insn, which_alternative, reverse_comparison) ...@@ -3632,7 +3632,7 @@ output_movb (operands, insn, which_alternative, reverse_comparison)
increment the GR, store the GR into MEM, and finally reload increment the GR, store the GR into MEM, and finally reload
the FP register from MEM from within the branch's delay slot. */ the FP register from MEM from within the branch's delay slot. */
output_asm_insn ("fstws %1,-16(0,%%r30)",operands); output_asm_insn ("fstws %1,-16(0,%%r30)",operands);
if (get_attr_length (insn) == 3) if (get_attr_length (insn) == 12)
return "comb,%S2 0,%1,%3\n\tfldws -16(0,%%r30),%0"; return "comb,%S2 0,%1,%3\n\tfldws -16(0,%%r30),%0";
else else
return "comclr,%B2 0,%1,0\n\tbl %3,0\n\tfldws -16(0,%%r30),%0"; return "comclr,%B2 0,%1,0\n\tbl %3,0\n\tfldws -16(0,%%r30),%0";
...@@ -3642,7 +3642,7 @@ output_movb (operands, insn, which_alternative, reverse_comparison) ...@@ -3642,7 +3642,7 @@ output_movb (operands, insn, which_alternative, reverse_comparison)
{ {
/* Reload loop counter from memory, the store back to memory /* Reload loop counter from memory, the store back to memory
happens in the branch's delay slot. */ happens in the branch's delay slot. */
if (get_attr_length (insn) == 2) if (get_attr_length (insn) == 8)
return "comb,%S2 0,%1,%3\n\tstw %1,%0"; return "comb,%S2 0,%1,%3\n\tstw %1,%0";
else else
return "comclr,%B2 0,%1,0\n\tbl %3,0\n\tstw %1,%0"; return "comclr,%B2 0,%1,0\n\tbl %3,0\n\tstw %1,%0";
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment