Commit 9c872872 by Richard Earnshaw

(PROMOTE_MODE): Promote HImode integers as signed.

(BYTES_BIG_ENDIAN): Allow target description to override default.
(LOAD_EXTEND_OP): When big-endian, HImode loads are sign extended.

From-SVN: r7447
parent 88e70606
...@@ -168,6 +168,8 @@ extern enum processor_type arm_cpu; ...@@ -168,6 +168,8 @@ extern enum processor_type arm_cpu;
{ \ { \
if (MODE == QImode) \ if (MODE == QImode) \
UNSIGNEDP = 1; \ UNSIGNEDP = 1; \
else if (MODE == HImode) \
UNSIGNEDP = 0; \
(MODE) = SImode; \ (MODE) = SImode; \
} }
...@@ -197,8 +199,13 @@ extern enum processor_type arm_cpu; ...@@ -197,8 +199,13 @@ extern enum processor_type arm_cpu;
in instructions that operate on numbered bit-fields. */ in instructions that operate on numbered bit-fields. */
#define BITS_BIG_ENDIAN 0 #define BITS_BIG_ENDIAN 0
/* Define this if most significant byte of a word is the lowest numbered. */ /* Define this if most significant byte of a word is the lowest numbered.
Most ARM processors are run in little endian mode, but it should now be
possible to build the compiler to support big endian code. (Note: This
is currently a compiler-build-time option, not a run-time one. */
#ifndef BYTES_BIG_ENDIAN
#define BYTES_BIG_ENDIAN 0 #define BYTES_BIG_ENDIAN 0
#endif
/* Define this if most significant word of a multiword number is the lowest /* Define this if most significant word of a multiword number is the lowest
numbered. */ numbered. */
...@@ -1130,7 +1137,8 @@ do \ ...@@ -1130,7 +1137,8 @@ do \
be the code that says which one of the two operations is implicitly be the code that says which one of the two operations is implicitly
done, NIL if none. */ done, NIL if none. */
#define LOAD_EXTEND_OP(MODE) \ #define LOAD_EXTEND_OP(MODE) \
((MODE) == QImode ? ZERO_EXTEND : NIL) ((MODE) == QImode ? ZERO_EXTEND \
: ((BYTES_BIG_ENDIAN && (MODE) == HImode) ? SIGN_EXTEND : NIL))
/* Define this if zero-extension is slow (more than one real instruction). /* Define this if zero-extension is slow (more than one real instruction).
On the ARM, it is more than one instruction only if not fetching from On the ARM, it is more than one instruction only if not fetching from
......
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