Commit 992d08b1 by Nathan Sidwell Committed by Nathan Sidwell

darwin.c (machopic_define_symbol): Use gcc_assert or gcc_unreachable as appropriate.

	* config/darwin.c (machopic_define_symbol): Use gcc_assert or
	gcc_unreachable as appropriate.
	(machopic_function_base_name, machopic_indirect_data_reference,
	machopic_legitimize_pic_address, darwin_non_lazy_pcrel): Likewise.
	* config/host-darwin.c (darwin_gt_pch_use_address): Likewise
	* config/rs6000/altivec.md (*mov<mode>_internal,
	build_vector_mask_for_load): Likewise.
	* config/rs6000/darwin.md (movdf_low_si, movdf_low_di,
	*call_nonlocal_darwin64, *call_value_nonlocal_darwin64,
	*sibcall_symbolic_64, *sibcall_value_symbolic_64): Likewise.
	* config/rs6000/predicates.md (easy_fp_constant,
	logical_operand): Likewise.
	* config/rs6000/rs6000.c (spe_expand_predicate_builtin,
	compute_save_world_info, rs6000_emit_prologue,
	rs6000_output_mi_thunk): Reword comments to avoid 'abort'.
	* config/rs6000/host-darwin.c (segv_handler): Use fancy_abort
	directly.

From-SVN: r99152
parent 8d8e6b95
2005-05-03 Nathan Sidwell <nathan@codesourcery.com>
* config/darwin.c (machopic_define_symbol): Use gcc_assert or
gcc_unreachable as appropriate.
(machopic_function_base_name, machopic_indirect_data_reference,
machopic_legitimize_pic_address, darwin_non_lazy_pcrel): Likewise.
* config/host-darwin.c (darwin_gt_pch_use_address): Likewise
* config/rs6000/altivec.md (*mov<mode>_internal,
build_vector_mask_for_load): Likewise.
* config/rs6000/darwin.md (movdf_low_si, movdf_low_di,
*call_nonlocal_darwin64, *call_value_nonlocal_darwin64,
*sibcall_symbolic_64, *sibcall_value_symbolic_64): Likewise.
* config/rs6000/predicates.md (easy_fp_constant,
logical_operand): Likewise.
* config/rs6000/rs6000.c (spe_expand_predicate_builtin,
compute_save_world_info, rs6000_emit_prologue,
rs6000_output_mi_thunk): Reword comments to avoid 'abort'.
* config/rs6000/host-darwin.c (segv_handler): Use fancy_abort
directly.
2005-05-03 Uros Bizjak <uros@kss-loka.si> 2005-05-03 Uros Bizjak <uros@kss-loka.si>
PR middle-end/21282 PR middle-end/21282
......
...@@ -191,8 +191,8 @@ void ...@@ -191,8 +191,8 @@ void
machopic_define_symbol (rtx mem) machopic_define_symbol (rtx mem)
{ {
rtx sym_ref; rtx sym_ref;
if (GET_CODE (mem) != MEM)
abort (); gcc_assert (GET_CODE (mem) == MEM);
sym_ref = XEXP (mem, 0); sym_ref = XEXP (mem, 0);
SYMBOL_REF_FLAGS (sym_ref) |= MACHO_SYMBOL_FLAG_DEFINED; SYMBOL_REF_FLAGS (sym_ref) |= MACHO_SYMBOL_FLAG_DEFINED;
} }
...@@ -203,8 +203,7 @@ const char * ...@@ -203,8 +203,7 @@ const char *
machopic_function_base_name (void) machopic_function_base_name (void)
{ {
/* if dynamic-no-pic is on, we should not get here */ /* if dynamic-no-pic is on, we should not get here */
if (MACHO_DYNAMIC_NO_PIC_P) gcc_assert (!MACHO_DYNAMIC_NO_PIC_P);
abort ();
if (function_base == NULL) if (function_base == NULL)
function_base = function_base =
...@@ -237,8 +236,7 @@ machopic_output_function_base_name (FILE *file) ...@@ -237,8 +236,7 @@ machopic_output_function_base_name (FILE *file)
const char *current_name; const char *current_name;
/* If dynamic-no-pic is on, we should not get here. */ /* If dynamic-no-pic is on, we should not get here. */
if (MACHO_DYNAMIC_NO_PIC_P) gcc_assert (!MACHO_DYNAMIC_NO_PIC_P);
abort ();
current_name = current_name =
IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (current_function_decl)); IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (current_function_decl));
if (function_base_func_name != current_name) if (function_base_func_name != current_name)
...@@ -425,7 +423,7 @@ machopic_indirect_data_reference (rtx orig, rtx reg) ...@@ -425,7 +423,7 @@ machopic_indirect_data_reference (rtx orig, rtx reg)
emit_insn (gen_macho_low (reg, reg, orig)); emit_insn (gen_macho_low (reg, reg, orig));
#else #else
/* some other cpu -- writeme! */ /* some other cpu -- writeme! */
abort (); gcc_unreachable ();
#endif #endif
return reg; return reg;
} }
...@@ -440,8 +438,7 @@ machopic_indirect_data_reference (rtx orig, rtx reg) ...@@ -440,8 +438,7 @@ machopic_indirect_data_reference (rtx orig, rtx reg)
#if defined (TARGET_TOC) /* i.e., PowerPC */ #if defined (TARGET_TOC) /* i.e., PowerPC */
rtx hi_sum_reg = (no_new_pseudos ? reg : gen_reg_rtx (Pmode)); rtx hi_sum_reg = (no_new_pseudos ? reg : gen_reg_rtx (Pmode));
if (reg == NULL) gcc_assert (reg);
abort ();
emit_insn (gen_rtx_SET (Pmode, hi_sum_reg, emit_insn (gen_rtx_SET (Pmode, hi_sum_reg,
gen_rtx_PLUS (Pmode, pic_offset_table_rtx, gen_rtx_PLUS (Pmode, pic_offset_table_rtx,
...@@ -452,7 +449,7 @@ machopic_indirect_data_reference (rtx orig, rtx reg) ...@@ -452,7 +449,7 @@ machopic_indirect_data_reference (rtx orig, rtx reg)
orig = reg; orig = reg;
#else #else
#if defined (HAVE_lo_sum) #if defined (HAVE_lo_sum)
if (reg == 0) abort (); gcc_assert (reg);
emit_insn (gen_rtx_SET (VOIDmode, reg, emit_insn (gen_rtx_SET (VOIDmode, reg,
gen_rtx_HIGH (Pmode, offset))); gen_rtx_HIGH (Pmode, offset)));
...@@ -602,9 +599,7 @@ machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg) ...@@ -602,9 +599,7 @@ machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg)
{ {
if (reg == 0) if (reg == 0)
{ {
if (reload_in_progress) gcc_assert (!reload_in_progress);
abort ();
else
reg = gen_reg_rtx (Pmode); reg = gen_reg_rtx (Pmode);
} }
...@@ -624,7 +619,7 @@ machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg) ...@@ -624,7 +619,7 @@ machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg)
emit_insn (gen_rtx_SET (VOIDmode, reg, mem)); emit_insn (gen_rtx_SET (VOIDmode, reg, mem));
#else #else
/* Some other CPU -- WriteMe! but right now there are no other platform that can use dynamic-no-pic */ /* Some other CPU -- WriteMe! but right now there are no other platform that can use dynamic-no-pic */
abort (); gcc_unreachable ();
#endif #endif
pic_ref = reg; pic_ref = reg;
} }
...@@ -717,9 +712,7 @@ machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg) ...@@ -717,9 +712,7 @@ machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg)
if (reg == 0) if (reg == 0)
{ {
if (reload_in_progress) gcc_assert (!reload_in_progress);
abort ();
else
reg = gen_reg_rtx (Pmode); reg = gen_reg_rtx (Pmode);
} }
...@@ -1315,8 +1308,7 @@ darwin_non_lazy_pcrel (FILE *file, rtx addr) ...@@ -1315,8 +1308,7 @@ darwin_non_lazy_pcrel (FILE *file, rtx addr)
{ {
const char *nlp_name; const char *nlp_name;
if (GET_CODE (addr) != SYMBOL_REF) gcc_assert (GET_CODE (addr) == SYMBOL_REF);
abort ();
nlp_name = machopic_indirection_name (addr, /*stub_p=*/false); nlp_name = machopic_indirection_name (addr, /*stub_p=*/false);
fputs ("\t.long\t", file); fputs ("\t.long\t", file);
......
...@@ -49,9 +49,8 @@ darwin_gt_pch_use_address (void *addr, size_t sz, int fd, size_t off) ...@@ -49,9 +49,8 @@ darwin_gt_pch_use_address (void *addr, size_t sz, int fd, size_t off)
void *mmap_result; void *mmap_result;
int ret; int ret;
if ((size_t)pch_address_space % pagesize != 0 gcc_assert ((size_t)pch_address_space % pagesize == 0
|| sizeof (pch_address_space) % pagesize != 0) && sizeof (pch_address_space) % pagesize == 0);
abort ();
ret = (addr == pch_address_space && sz <= sizeof (pch_address_space)); ret = (addr == pch_address_space && sz <= sizeof (pch_address_space));
if (! ret) if (! ret)
...@@ -73,8 +72,7 @@ darwin_gt_pch_use_address (void *addr, size_t sz, int fd, size_t off) ...@@ -73,8 +72,7 @@ darwin_gt_pch_use_address (void *addr, size_t sz, int fd, size_t off)
ret = mmap_result != (void *) MAP_FAILED; ret = mmap_result != (void *) MAP_FAILED;
/* Sanity check for broken MAP_FIXED. */ /* Sanity check for broken MAP_FIXED. */
if (ret && mmap_result != addr) gcc_assert (!ret || mmap_result == addr);
abort ();
} }
return ret; return ret;
......
...@@ -102,7 +102,7 @@ ...@@ -102,7 +102,7 @@
case 4: return "#"; case 4: return "#";
case 5: return "#"; case 5: return "#";
case 6: return output_vec_const_move (operands); case 6: return output_vec_const_move (operands);
default: abort(); default: gcc_unreachable ();
} }
} }
[(set_attr "type" "vecstore,vecload,vecsimple,store,load,*,*")]) [(set_attr "type" "vecstore,vecload,vecsimple,store,load,*,*")])
...@@ -1649,8 +1649,7 @@ ...@@ -1649,8 +1649,7 @@
rtx addr; rtx addr;
rtx temp; rtx temp;
if (GET_CODE (operands[1]) != MEM) gcc_assert (GET_CODE (operands[1]) == MEM);
abort ();
addr = XEXP (operands[1], 0); addr = XEXP (operands[1], 0);
temp = gen_reg_rtx (GET_MODE (addr)); temp = gen_reg_rtx (GET_MODE (addr));
......
...@@ -63,7 +63,7 @@ Boston, MA 02111-1307, USA. */ ...@@ -63,7 +63,7 @@ Boston, MA 02111-1307, USA. */
} }
} }
default: default:
abort(); gcc_unreachable ();
} }
}" }"
[(set_attr "type" "load") [(set_attr "type" "load")
...@@ -84,7 +84,7 @@ Boston, MA 02111-1307, USA. */ ...@@ -84,7 +84,7 @@ Boston, MA 02111-1307, USA. */
case 1: case 1:
return \"ld %0,lo16(%2)(%1)\"; return \"ld %0,lo16(%2)(%1)\";
default: default:
abort(); gcc_unreachable ();
} }
}" }"
[(set_attr "type" "load") [(set_attr "type" "load")
...@@ -342,7 +342,7 @@ Boston, MA 02111-1307, USA. */ ...@@ -342,7 +342,7 @@ Boston, MA 02111-1307, USA. */
#if TARGET_MACHO #if TARGET_MACHO
return output_call(insn, operands, 0, 2); return output_call(insn, operands, 0, 2);
#else #else
abort(); gcc_unreachable ();
#endif #endif
} }
[(set_attr "type" "branch,branch") [(set_attr "type" "branch,branch")
...@@ -373,7 +373,7 @@ Boston, MA 02111-1307, USA. */ ...@@ -373,7 +373,7 @@ Boston, MA 02111-1307, USA. */
#if TARGET_MACHO #if TARGET_MACHO
return output_call(insn, operands, 1, 3); return output_call(insn, operands, 1, 3);
#else #else
abort(); gcc_unreachable ();
#endif #endif
} }
[(set_attr "type" "branch,branch") [(set_attr "type" "branch,branch")
...@@ -423,7 +423,7 @@ Boston, MA 02111-1307, USA. */ ...@@ -423,7 +423,7 @@ Boston, MA 02111-1307, USA. */
{ {
case 0: return \"b %z0\"; case 0: return \"b %z0\";
case 1: return \"b%T0\"; case 1: return \"b%T0\";
default: abort(); default: gcc_unreachable ();
} }
}" }"
[(set_attr "type" "branch") [(set_attr "type" "branch")
...@@ -443,7 +443,7 @@ Boston, MA 02111-1307, USA. */ ...@@ -443,7 +443,7 @@ Boston, MA 02111-1307, USA. */
{ {
case 0: return \"b %z1\"; case 0: return \"b %z1\";
case 1: return \"b%T1\"; case 1: return \"b%T1\";
default: abort(); default: gcc_unreachable ();
} }
}" }"
[(set_attr "type" "branch") [(set_attr "type" "branch")
......
...@@ -107,7 +107,7 @@ segv_handler (int sig ATTRIBUTE_UNUSED, ...@@ -107,7 +107,7 @@ segv_handler (int sig ATTRIBUTE_UNUSED,
} }
if (global_dc->abort_on_error) if (global_dc->abort_on_error)
abort (); fancy_abort (__FILE__, __LINE__, __FUNCTION__);
exit (FATAL_EXIT_CODE); exit (FATAL_EXIT_CODE);
} }
......
...@@ -178,6 +178,9 @@ ...@@ -178,6 +178,9 @@
(define_predicate "easy_fp_constant" (define_predicate "easy_fp_constant"
(match_code "const_double") (match_code "const_double")
{ {
long k[4];
REAL_VALUE_TYPE rv;
if (GET_MODE (op) != mode if (GET_MODE (op) != mode
|| (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode)) || (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode))
return 0; return 0;
...@@ -198,11 +201,9 @@ ...@@ -198,11 +201,9 @@
return 0; return 0;
#endif #endif
if (mode == TFmode) switch (mode)
{ {
long k[4]; case TFmode:
REAL_VALUE_TYPE rv;
REAL_VALUE_FROM_CONST_DOUBLE (rv, op); REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k); REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
...@@ -210,13 +211,8 @@ ...@@ -210,13 +211,8 @@
&& num_insns_constant_wide ((HOST_WIDE_INT) k[1]) == 1 && num_insns_constant_wide ((HOST_WIDE_INT) k[1]) == 1
&& num_insns_constant_wide ((HOST_WIDE_INT) k[2]) == 1 && num_insns_constant_wide ((HOST_WIDE_INT) k[2]) == 1
&& num_insns_constant_wide ((HOST_WIDE_INT) k[3]) == 1); && num_insns_constant_wide ((HOST_WIDE_INT) k[3]) == 1);
}
else if (mode == DFmode)
{
long k[2];
REAL_VALUE_TYPE rv;
case DFmode:
/* Force constants to memory before reload to utilize /* Force constants to memory before reload to utilize
compress_float_constant. compress_float_constant.
Avoid this when flag_unsafe_math_optimizations is enabled Avoid this when flag_unsafe_math_optimizations is enabled
...@@ -232,13 +228,8 @@ ...@@ -232,13 +228,8 @@
return (num_insns_constant_wide ((HOST_WIDE_INT) k[0]) == 1 return (num_insns_constant_wide ((HOST_WIDE_INT) k[0]) == 1
&& num_insns_constant_wide ((HOST_WIDE_INT) k[1]) == 1); && num_insns_constant_wide ((HOST_WIDE_INT) k[1]) == 1);
}
else if (mode == SFmode)
{
long l;
REAL_VALUE_TYPE rv;
case SFmode:
/* Force constants to memory before reload to utilize /* Force constants to memory before reload to utilize
compress_float_constant. compress_float_constant.
Avoid this when flag_unsafe_math_optimizations is enabled Avoid this when flag_unsafe_math_optimizations is enabled
...@@ -249,20 +240,21 @@ ...@@ -249,20 +240,21 @@
return 0; return 0;
REAL_VALUE_FROM_CONST_DOUBLE (rv, op); REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
REAL_VALUE_TO_TARGET_SINGLE (rv, l); REAL_VALUE_TO_TARGET_SINGLE (rv, k[0]);
return num_insns_constant_wide (l) == 1; return num_insns_constant_wide (k[0]) == 1;
}
else if (mode == DImode) case DImode:
return ((TARGET_POWERPC64 return ((TARGET_POWERPC64
&& GET_CODE (op) == CONST_DOUBLE && CONST_DOUBLE_LOW (op) == 0) && GET_CODE (op) == CONST_DOUBLE && CONST_DOUBLE_LOW (op) == 0)
|| (num_insns_constant (op, DImode) <= 2)); || (num_insns_constant (op, DImode) <= 2));
else if (mode == SImode) case SImode:
return 1; return 1;
else
abort (); default:
gcc_unreachable ();
}
}) })
;; Return 1 if the operand is a CONST_VECTOR and can be loaded into a ;; Return 1 if the operand is a CONST_VECTOR and can be loaded into a
...@@ -406,8 +398,7 @@ ...@@ -406,8 +398,7 @@
} }
else if (GET_CODE (op) == CONST_DOUBLE) else if (GET_CODE (op) == CONST_DOUBLE)
{ {
if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) gcc_assert (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT);
abort ();
opl = CONST_DOUBLE_LOW (op); opl = CONST_DOUBLE_LOW (op);
oph = CONST_DOUBLE_HIGH (op); oph = CONST_DOUBLE_HIGH (op);
......
...@@ -1832,9 +1832,13 @@ num_insns_constant_wide (HOST_WIDE_INT value) ...@@ -1832,9 +1832,13 @@ num_insns_constant_wide (HOST_WIDE_INT value)
int int
num_insns_constant (rtx op, enum machine_mode mode) num_insns_constant (rtx op, enum machine_mode mode)
{ {
<<<<<<< rs6000.c
switch (GET_CODE (op))
=======
HOST_WIDE_INT low, high; HOST_WIDE_INT low, high;
switch (GET_CODE (op)) switch (GET_CODE (op))
>>>>>>> 1.815
{ {
case CONST_INT: case CONST_INT:
#if HOST_BITS_PER_WIDE_INT == 64 #if HOST_BITS_PER_WIDE_INT == 64
...@@ -1856,6 +1860,54 @@ num_insns_constant (rtx op, enum machine_mode mode) ...@@ -1856,6 +1860,54 @@ num_insns_constant (rtx op, enum machine_mode mode)
return num_insns_constant_wide ((HOST_WIDE_INT) l); return num_insns_constant_wide ((HOST_WIDE_INT) l);
} }
<<<<<<< rs6000.c
{
HOST_WIDE_INT low;
HOST_WIDE_INT high;
long l[2];
REAL_VALUE_TYPE rv;
int endian = (WORDS_BIG_ENDIAN == 0);
if (mode == VOIDmode || mode == DImode)
{
high = CONST_DOUBLE_HIGH (op);
low = CONST_DOUBLE_LOW (op);
}
else
{
REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
REAL_VALUE_TO_TARGET_DOUBLE (rv, l);
high = l[endian];
low = l[1 - endian];
}
if (TARGET_32BIT)
return (num_insns_constant_wide (low)
+ num_insns_constant_wide (high));
else
{
if (high == 0 && low >= 0)
return num_insns_constant_wide (low);
else if (high == -1 && low < 0)
return num_insns_constant_wide (low);
else if (mask64_operand (op, mode))
return 2;
else if (low == 0)
return num_insns_constant_wide (high) + 1;
else
return (num_insns_constant_wide (high)
+ num_insns_constant_wide (low) + 1);
}
}
default:
gcc_unreachable ();
=======
if (mode == VOIDmode || mode == DImode) if (mode == VOIDmode || mode == DImode)
{ {
high = CONST_DOUBLE_HIGH (op); high = CONST_DOUBLE_HIGH (op);
...@@ -1894,6 +1946,7 @@ num_insns_constant (rtx op, enum machine_mode mode) ...@@ -1894,6 +1946,7 @@ num_insns_constant (rtx op, enum machine_mode mode)
default: default:
gcc_unreachable (); gcc_unreachable ();
>>>>>>> 1.815
} }
} }
...@@ -3275,10 +3328,16 @@ rs6000_emit_set_const (rtx dest, enum machine_mode mode, ...@@ -3275,10 +3328,16 @@ rs6000_emit_set_const (rtx dest, enum machine_mode mode,
gen_rtx_IOR (SImode, result, gen_rtx_IOR (SImode, result,
GEN_INT (INTVAL (source) & 0xffff)))); GEN_INT (INTVAL (source) & 0xffff))));
result = dest; result = dest;
<<<<<<< rs6000.c
case DImode:
switch (GET_CODE (source))
=======
break; break;
case DImode: case DImode:
switch (GET_CODE (source)) switch (GET_CODE (source))
>>>>>>> 1.815
{ {
case CONST_INT: case CONST_INT:
c0 = INTVAL (source); c0 = INTVAL (source);
...@@ -7058,7 +7117,7 @@ spe_expand_predicate_builtin (enum insn_code icode, tree arglist, rtx target) ...@@ -7058,7 +7117,7 @@ spe_expand_predicate_builtin (enum insn_code icode, tree arglist, rtx target)
case 0: case 0:
/* We need to get to the OV bit, which is the ORDERED bit. We /* We need to get to the OV bit, which is the ORDERED bit. We
could generate (ordered:SI (reg:CC xx) (const_int 0)), but could generate (ordered:SI (reg:CC xx) (const_int 0)), but
that's ugly and will trigger a validate_condition_mode abort. that's ugly and will make validate_condition_mode die.
So let's just use another pattern. */ So let's just use another pattern. */
emit_insn (gen_move_from_CR_ov_bit (target, scratch)); emit_insn (gen_move_from_CR_ov_bit (target, scratch));
return target; return target;
...@@ -7233,6 +7292,7 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, ...@@ -7233,6 +7292,7 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
if (d->code == fcode) if (d->code == fcode)
return rs6000_expand_binop_builtin (d->icode, arglist, target); return rs6000_expand_binop_builtin (d->icode, arglist, target);
<<<<<<< rs6000.c
/* Handle simple ternary operations. */ /* Handle simple ternary operations. */
d = (struct builtin_description *) bdesc_3arg; d = (struct builtin_description *) bdesc_3arg;
for (i = 0; i < ARRAY_SIZE (bdesc_3arg); i++, d++) for (i = 0; i < ARRAY_SIZE (bdesc_3arg); i++, d++)
...@@ -7240,6 +7300,16 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, ...@@ -7240,6 +7300,16 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
return rs6000_expand_ternop_builtin (d->icode, arglist, target); return rs6000_expand_ternop_builtin (d->icode, arglist, target);
gcc_unreachable (); gcc_unreachable ();
return NULL_RTX;
=======
/* Handle simple ternary operations. */
d = (struct builtin_description *) bdesc_3arg;
for (i = 0; i < ARRAY_SIZE (bdesc_3arg); i++, d++)
if (d->code == fcode)
return rs6000_expand_ternop_builtin (d->icode, arglist, target);
gcc_unreachable ();
>>>>>>> 1.815
} }
static tree static tree
...@@ -11718,7 +11788,7 @@ compute_save_world_info (rs6000_stack_t *info_ptr) ...@@ -11718,7 +11788,7 @@ compute_save_world_info (rs6000_stack_t *info_ptr)
/* Because the Darwin register save/restore routines only handle /* Because the Darwin register save/restore routines only handle
F14 .. F31 and V20 .. V31 as per the ABI, perform a consistency F14 .. F31 and V20 .. V31 as per the ABI, perform a consistency
check and abort if there's something worng. */ check. */
gcc_assert (info_ptr->first_fp_reg_save >= FIRST_SAVED_FP_REGNO gcc_assert (info_ptr->first_fp_reg_save >= FIRST_SAVED_FP_REGNO
&& (info_ptr->first_altivec_reg_save && (info_ptr->first_altivec_reg_save
>= FIRST_SAVED_ALTIVEC_REGNO)); >= FIRST_SAVED_ALTIVEC_REGNO));
...@@ -13126,7 +13196,7 @@ rs6000_emit_prologue (void) ...@@ -13126,7 +13196,7 @@ rs6000_emit_prologue (void)
/* The SAVE_WORLD and RESTORE_WORLD routines make a number of /* The SAVE_WORLD and RESTORE_WORLD routines make a number of
assumptions about the offsets of various bits of the stack assumptions about the offsets of various bits of the stack
frame. Abort if things aren't what they should be. */ frame. */
gcc_assert (info->gp_save_offset == -220 gcc_assert (info->gp_save_offset == -220
&& info->fp_save_offset == -144 && info->fp_save_offset == -144
&& info->lr_save_offset == 8 && info->lr_save_offset == 8
...@@ -14542,7 +14612,7 @@ rs6000_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, ...@@ -14542,7 +14612,7 @@ rs6000_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
#endif #endif
/* gen_sibcall expects reload to convert scratch pseudo to LR so we must /* gen_sibcall expects reload to convert scratch pseudo to LR so we must
generate sibcall RTL explicitly to avoid constraint abort. */ generate sibcall RTL explicitly. */
insn = emit_call_insn ( insn = emit_call_insn (
gen_rtx_PARALLEL (VOIDmode, gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (4, gen_rtvec (4,
...@@ -16882,6 +16952,20 @@ rs6000_machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, ...@@ -16882,6 +16952,20 @@ rs6000_machopic_legitimize_pic_address (rtx orig, enum machine_mode mode,
&& XEXP (XEXP (orig, 0), 0) == pic_offset_table_rtx) && XEXP (XEXP (orig, 0), 0) == pic_offset_table_rtx)
return orig; return orig;
<<<<<<< rs6000.c
gcc_assert (GET_CODE (XEXP (orig, 0)) == PLUS);
/* Use a different reg for the intermediate value, as
it will be marked UNCHANGING. */
rtx reg_temp = no_new_pseudos ? reg : gen_reg_rtx (Pmode);
base = rs6000_machopic_legitimize_pic_address (XEXP (XEXP (orig, 0), 0),
Pmode, reg_temp);
offset =
rs6000_machopic_legitimize_pic_address (XEXP (XEXP (orig, 0), 1),
Pmode, reg);
=======
gcc_assert (GET_CODE (XEXP (orig, 0)) == PLUS); gcc_assert (GET_CODE (XEXP (orig, 0)) == PLUS);
/* Use a different reg for the intermediate value, as /* Use a different reg for the intermediate value, as
...@@ -16893,6 +16977,7 @@ rs6000_machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, ...@@ -16893,6 +16977,7 @@ rs6000_machopic_legitimize_pic_address (rtx orig, enum machine_mode mode,
rs6000_machopic_legitimize_pic_address (XEXP (XEXP (orig, 0), 1), rs6000_machopic_legitimize_pic_address (XEXP (XEXP (orig, 0), 1),
Pmode, reg); Pmode, reg);
>>>>>>> 1.815
if (GET_CODE (offset) == CONST_INT) if (GET_CODE (offset) == CONST_INT)
{ {
if (SMALL_INT (offset)) if (SMALL_INT (offset))
......
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