aarch64.md (*extr_insv_lower_reg<mode>): Remove + from the read only register.

2014-07-26  Andrew Pinski  <apinski@cavium.com>

        * config/aarch64/aarch64.md (*extr_insv_lower_reg<mode>): Remove +
        from the read only register.

From-SVN: r213090

gcc/ChangeLog

+2014-07-26  Andrew Pinski  <apinski@cavium.com>
+
+	* config/aarch64/aarch64.md (*extr_insv_lower_reg<mode>): Remove +
+	from the read only register.
+
 2014-07-26  Richard Sandiford  <rdsandiford@googlemail.com>
 
 	* ira-costs.c (find_costs_and_classes): For -O0, use the best class

gcc/config/aarch64/aarch64.md

@@ -3390,7 +3390,7 @@
   [(set (zero_extract:GPI (match_operand:GPI 0 "register_operand" "+r")
 			  (match_operand 1 "const_int_operand" "n")
 			  (const_int 0))
-	(zero_extract:GPI (match_operand:GPI 2 "register_operand" "+r")
+	(zero_extract:GPI (match_operand:GPI 2 "register_operand" "r")
 			  (match_dup 1)
 			  (match_operand 3 "const_int_operand" "n")))]
   "!(UINTVAL (operands[1]) == 0