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riscv-gcc-1
Commit 981a828e by Richard Henderson Committed by Richard Henderson
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alpha.c (override_options): Move ev6 alpha_tp frobbing out of -mcpu parsing code. 

        * alpha.c (override_options): Move ev6 alpha_tp frobbing out of
        -mcpu parsing code.
        (print_operand): Notice alpha_fptm not alpha_tp for sw completion.
        * alpha.md (all fp insns): Likewise.

From-SVN: r28404
parent 0865c631
Showing with 56 additions and 46 deletions
gcc/ChangeLog
1999-08-02 Richard Henderson <rth@cygnus.com>
* alpha.c (override_options): Move ev6 alpha_tp frobbing out of
-mcpu parsing code.
(print_operand): Notice alpha_fptm not alpha_tp for sw completion.
* alpha.md (all fp insns): Likewise.
1999-08-02 Nick Clifton <nickc@cygnus.com> 1999-08-02 Nick Clifton <nickc@cygnus.com>
* config/v850/v850.h (STRICT_ALIGNMENT): Only define if not * config/v850/v850.h (STRICT_ALIGNMENT): Only define if not
......
gcc/config/alpha/alpha.c
...@@ -231,11 +231,6 @@ override_options () ...@@ -231,11 +231,6 @@ override_options ()
alpha_cpu = PROCESSOR_EV6; alpha_cpu = PROCESSOR_EV6;
target_flags |= MASK_BWX | MASK_MAX | MASK_FIX; target_flags |= MASK_BWX | MASK_MAX | MASK_FIX;
target_flags &= ~ (MASK_CIX); target_flags &= ~ (MASK_CIX);
/* Except for EV6 pass 1 (not released), we always have
precise arithmetic traps. Which means we can do
software completion without minding trap shadows. */
alpha_tp = ALPHA_TP_PROG;
} }
else else
error ("bad value `%s' for -mcpu switch", alpha_cpu_string); error ("bad value `%s' for -mcpu switch", alpha_cpu_string);
...@@ -250,6 +245,14 @@ override_options () ...@@ -250,6 +245,14 @@ override_options ()
alpha_tp = ALPHA_TP_INSN; alpha_tp = ALPHA_TP_INSN;
} }
if (alpha_cpu == PROCESSOR_EV6)
{
/* Except for EV6 pass 1 (not released), we always have precise
arithmetic traps. Which means we can do software completion
without minding trap shadows. */
alpha_tp = ALPHA_TP_PROG;
}
if (TARGET_FLOAT_VAX) if (TARGET_FLOAT_VAX)
{ {
if (alpha_fprm == ALPHA_FPRM_MINF || alpha_fprm == ALPHA_FPRM_DYN) if (alpha_fprm == ALPHA_FPRM_MINF || alpha_fprm == ALPHA_FPRM_DYN)
...@@ -2682,7 +2685,7 @@ print_operand (file, x, code) ...@@ -2682,7 +2685,7 @@ print_operand (file, x, code)
case '\'': case '\'':
/* Generates trap-mode suffix for instructions that accept the su /* Generates trap-mode suffix for instructions that accept the su
suffix only (cmpt et al). */ suffix only (cmpt et al). */
if (alpha_tp == ALPHA_TP_INSN) if (alpha_fptm >= ALPHA_FPTM_SU)
fputs ("su", file); fputs ("su", file);
break; break;
......
gcc/config/alpha/alpha.md
...@@ -1836,7 +1836,7 @@ ...@@ -1836,7 +1836,7 @@
[(set (match_operand:SF 0 "register_operand" "=&f") [(set (match_operand:SF 0 "register_operand" "=&f")
(plus:SF (match_operand:SF 1 "reg_or_fp0_operand" "%fG") (plus:SF (match_operand:SF 1 "reg_or_fp0_operand" "%fG")
(match_operand:SF 2 "reg_or_fp0_operand" "fG")))] (match_operand:SF 2 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"add%,%)%& %R1,%R2,%0" "add%,%)%& %R1,%R2,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -1854,7 +1854,7 @@ ...@@ -1854,7 +1854,7 @@
[(set (match_operand:DF 0 "register_operand" "=&f") [(set (match_operand:DF 0 "register_operand" "=&f")
(plus:DF (match_operand:DF 1 "reg_or_fp0_operand" "%fG") (plus:DF (match_operand:DF 1 "reg_or_fp0_operand" "%fG")
(match_operand:DF 2 "reg_or_fp0_operand" "fG")))] (match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"add%-%)%& %R1,%R2,%0" "add%-%)%& %R1,%R2,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -1873,7 +1873,7 @@ ...@@ -1873,7 +1873,7 @@
(plus:DF (float_extend:DF (plus:DF (float_extend:DF
(match_operand:SF 1 "reg_or_fp0_operand" "fG")) (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
(match_operand:DF 2 "reg_or_fp0_operand" "fG")))] (match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN" "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU"
"add%-%)%& %R1,%R2,%0" "add%-%)%& %R1,%R2,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -1884,7 +1884,7 @@ ...@@ -1884,7 +1884,7 @@
(match_operand:SF 1 "reg_or_fp0_operand" "%fG")) (match_operand:SF 1 "reg_or_fp0_operand" "%fG"))
(float_extend:DF (float_extend:DF
(match_operand:SF 2 "reg_or_fp0_operand" "fG"))))] (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN" "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU"
"add%-%)%& %R1,%R2,%0" "add%-%)%& %R1,%R2,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -1933,7 +1933,7 @@ ...@@ -1933,7 +1933,7 @@
(subreg:SI (fix:DI (match_operand:DF 1 "reg_or_fp0_operand" "fG")) 0)) (subreg:SI (fix:DI (match_operand:DF 1 "reg_or_fp0_operand" "fG")) 0))
(clobber (match_scratch:DI 2 "=&f")) (clobber (match_scratch:DI 2 "=&f"))
(clobber (match_scratch:SI 3 "=&f"))] (clobber (match_scratch:SI 3 "=&f"))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"#" "#"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -1942,7 +1942,7 @@ ...@@ -1942,7 +1942,7 @@
[(set (match_operand:SI 0 "memory_operand" "=m") [(set (match_operand:SI 0 "memory_operand" "=m")
(subreg:SI (fix:DI (match_operand:DF 1 "reg_or_fp0_operand" "fG")) 0)) (subreg:SI (fix:DI (match_operand:DF 1 "reg_or_fp0_operand" "fG")) 0))
(clobber (match_scratch:DI 2 "=f"))] (clobber (match_scratch:DI 2 "=f"))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN" "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU"
"#" "#"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -1950,7 +1950,7 @@ ...@@ -1950,7 +1950,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:DI 0 "reg_no_subreg_operand" "=&f") [(set (match_operand:DI 0 "reg_no_subreg_operand" "=&f")
(fix:DI (match_operand:DF 1 "reg_or_fp0_operand" "fG")))] (fix:DI (match_operand:DF 1 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"cvt%-q%(c %R1,%0" "cvt%-q%(c %R1,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -1995,7 +1995,7 @@ ...@@ -1995,7 +1995,7 @@
(match_operand:SF 1 "reg_or_fp0_operand" "fG"))) 0)) (match_operand:SF 1 "reg_or_fp0_operand" "fG"))) 0))
(clobber (match_scratch:DI 2 "=&f")) (clobber (match_scratch:DI 2 "=&f"))
(clobber (match_scratch:SI 3 "=&f"))] (clobber (match_scratch:SI 3 "=&f"))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"#" "#"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2005,7 +2005,7 @@ ...@@ -2005,7 +2005,7 @@
(subreg:SI (fix:DI (float_extend:DF (subreg:SI (fix:DI (float_extend:DF
(match_operand:SF 1 "reg_or_fp0_operand" "fG"))) 0)) (match_operand:SF 1 "reg_or_fp0_operand" "fG"))) 0))
(clobber (match_scratch:DI 2 "=f"))] (clobber (match_scratch:DI 2 "=f"))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN" "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU"
"#" "#"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2014,7 +2014,7 @@ ...@@ -2014,7 +2014,7 @@
[(set (match_operand:DI 0 "reg_no_subreg_operand" "=&f") [(set (match_operand:DI 0 "reg_no_subreg_operand" "=&f")
(fix:DI (float_extend:DF (fix:DI (float_extend:DF
(match_operand:SF 1 "reg_or_fp0_operand" "fG"))))] (match_operand:SF 1 "reg_or_fp0_operand" "fG"))))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"cvt%-q%(c %R1,%0" "cvt%-q%(c %R1,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2031,7 +2031,7 @@ ...@@ -2031,7 +2031,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:SF 0 "register_operand" "=&f") [(set (match_operand:SF 0 "register_operand" "=&f")
(float:SF (match_operand:DI 1 "reg_no_subreg_operand" "f")))] (float:SF (match_operand:DI 1 "reg_no_subreg_operand" "f")))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"cvtq%,%+%& %1,%0" "cvtq%,%+%& %1,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2047,7 +2047,7 @@ ...@@ -2047,7 +2047,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:DF 0 "register_operand" "=&f") [(set (match_operand:DF 0 "register_operand" "=&f")
(float:DF (match_operand:DI 1 "reg_no_subreg_operand" "f")))] (float:DF (match_operand:DI 1 "reg_no_subreg_operand" "f")))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"cvtq%-%+%& %1,%0" "cvtq%-%+%& %1,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2066,7 +2066,7 @@ ...@@ -2066,7 +2066,7 @@
"TARGET_FP" "TARGET_FP"
" "
{ {
if (alpha_tp == ALPHA_TP_INSN) if (alpha_fptm >= ALPHA_FPTM_SU)
emit_insn (gen_extendsfdf2_tp (operands[0], emit_insn (gen_extendsfdf2_tp (operands[0],
force_reg (SFmode, operands[1]))); force_reg (SFmode, operands[1])));
else else
...@@ -2078,7 +2078,7 @@ ...@@ -2078,7 +2078,7 @@
(define_insn "extendsfdf2_tp" (define_insn "extendsfdf2_tp"
[(set (match_operand:DF 0 "register_operand" "=&f") [(set (match_operand:DF 0 "register_operand" "=&f")
(float_extend:DF (match_operand:SF 1 "register_operand" "f")))] (float_extend:DF (match_operand:SF 1 "register_operand" "f")))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"cvtsts %1,%0" "cvtsts %1,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2086,7 +2086,7 @@ ...@@ -2086,7 +2086,7 @@
(define_insn "extendsfdf2_no_tp" (define_insn "extendsfdf2_no_tp"
[(set (match_operand:DF 0 "register_operand" "=f,f,m") [(set (match_operand:DF 0 "register_operand" "=f,f,m")
(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "f,m,f")))] (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "f,m,f")))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN" "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU"
"@ "@
fmov %1,%0 fmov %1,%0
ld%, %0,%1 ld%, %0,%1
...@@ -2097,7 +2097,7 @@ ...@@ -2097,7 +2097,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:SF 0 "register_operand" "=&f") [(set (match_operand:SF 0 "register_operand" "=&f")
(float_truncate:SF (match_operand:DF 1 "reg_or_fp0_operand" "fG")))] (float_truncate:SF (match_operand:DF 1 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"cvt%-%,%)%& %R1,%0" "cvt%-%,%)%& %R1,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2114,7 +2114,7 @@ ...@@ -2114,7 +2114,7 @@
[(set (match_operand:SF 0 "register_operand" "=&f") [(set (match_operand:SF 0 "register_operand" "=&f")
(div:SF (match_operand:SF 1 "reg_or_fp0_operand" "fG") (div:SF (match_operand:SF 1 "reg_or_fp0_operand" "fG")
(match_operand:SF 2 "reg_or_fp0_operand" "fG")))] (match_operand:SF 2 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"div%,%)%& %R1,%R2,%0" "div%,%)%& %R1,%R2,%0"
[(set_attr "type" "fdiv") [(set_attr "type" "fdiv")
(set_attr "opsize" "si") (set_attr "opsize" "si")
...@@ -2134,7 +2134,7 @@ ...@@ -2134,7 +2134,7 @@
[(set (match_operand:DF 0 "register_operand" "=&f") [(set (match_operand:DF 0 "register_operand" "=&f")
(div:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG") (div:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG")
(match_operand:DF 2 "reg_or_fp0_operand" "fG")))] (match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"div%-%)%& %R1,%R2,%0" "div%-%)%& %R1,%R2,%0"
[(set_attr "type" "fdiv") [(set_attr "type" "fdiv")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2152,7 +2152,7 @@ ...@@ -2152,7 +2152,7 @@
[(set (match_operand:DF 0 "register_operand" "=f") [(set (match_operand:DF 0 "register_operand" "=f")
(div:DF (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG")) (div:DF (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
(match_operand:DF 2 "reg_or_fp0_operand" "fG")))] (match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN" "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU"
"div%-%)%& %R1,%R2,%0" "div%-%)%& %R1,%R2,%0"
[(set_attr "type" "fdiv") [(set_attr "type" "fdiv")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2162,7 +2162,7 @@ ...@@ -2162,7 +2162,7 @@
(div:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG") (div:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG")
(float_extend:DF (float_extend:DF
(match_operand:SF 2 "reg_or_fp0_operand" "fG"))))] (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN" "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU"
"div%-%)%& %R1,%R2,%0" "div%-%)%& %R1,%R2,%0"
[(set_attr "type" "fdiv") [(set_attr "type" "fdiv")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2171,7 +2171,7 @@ ...@@ -2171,7 +2171,7 @@
[(set (match_operand:DF 0 "register_operand" "=f") [(set (match_operand:DF 0 "register_operand" "=f")
(div:DF (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG")) (div:DF (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
(float_extend:DF (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))] (float_extend:DF (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN" "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU"
"div%-%)%& %R1,%R2,%0" "div%-%)%& %R1,%R2,%0"
[(set_attr "type" "fdiv") [(set_attr "type" "fdiv")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2180,7 +2180,7 @@ ...@@ -2180,7 +2180,7 @@
[(set (match_operand:SF 0 "register_operand" "=&f") [(set (match_operand:SF 0 "register_operand" "=&f")
(mult:SF (match_operand:SF 1 "reg_or_fp0_operand" "%fG") (mult:SF (match_operand:SF 1 "reg_or_fp0_operand" "%fG")
(match_operand:SF 2 "reg_or_fp0_operand" "fG")))] (match_operand:SF 2 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"mul%,%)%& %R1,%R2,%0" "mul%,%)%& %R1,%R2,%0"
[(set_attr "type" "fmul") [(set_attr "type" "fmul")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2198,7 +2198,7 @@ ...@@ -2198,7 +2198,7 @@
[(set (match_operand:DF 0 "register_operand" "=&f") [(set (match_operand:DF 0 "register_operand" "=&f")
(mult:DF (match_operand:DF 1 "reg_or_fp0_operand" "%fG") (mult:DF (match_operand:DF 1 "reg_or_fp0_operand" "%fG")
(match_operand:DF 2 "reg_or_fp0_operand" "fG")))] (match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"mul%-%)%& %R1,%R2,%0" "mul%-%)%& %R1,%R2,%0"
[(set_attr "type" "fmul") [(set_attr "type" "fmul")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2217,7 +2217,7 @@ ...@@ -2217,7 +2217,7 @@
(mult:DF (float_extend:DF (mult:DF (float_extend:DF
(match_operand:SF 1 "reg_or_fp0_operand" "fG")) (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
(match_operand:DF 2 "reg_or_fp0_operand" "fG")))] (match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN" "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU"
"mul%-%)%& %R1,%R2,%0" "mul%-%)%& %R1,%R2,%0"
[(set_attr "type" "fmul") [(set_attr "type" "fmul")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2228,7 +2228,7 @@ ...@@ -2228,7 +2228,7 @@
(match_operand:SF 1 "reg_or_fp0_operand" "%fG")) (match_operand:SF 1 "reg_or_fp0_operand" "%fG"))
(float_extend:DF (float_extend:DF
(match_operand:SF 2 "reg_or_fp0_operand" "fG"))))] (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN" "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU"
"mul%-%)%& %R1,%R2,%0" "mul%-%)%& %R1,%R2,%0"
[(set_attr "type" "fmul") [(set_attr "type" "fmul")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2237,7 +2237,7 @@ ...@@ -2237,7 +2237,7 @@
[(set (match_operand:SF 0 "register_operand" "=&f") [(set (match_operand:SF 0 "register_operand" "=&f")
(minus:SF (match_operand:SF 1 "reg_or_fp0_operand" "fG") (minus:SF (match_operand:SF 1 "reg_or_fp0_operand" "fG")
(match_operand:SF 2 "reg_or_fp0_operand" "fG")))] (match_operand:SF 2 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"sub%,%)%& %R1,%R2,%0" "sub%,%)%& %R1,%R2,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2255,7 +2255,7 @@ ...@@ -2255,7 +2255,7 @@
[(set (match_operand:DF 0 "register_operand" "=&f") [(set (match_operand:DF 0 "register_operand" "=&f")
(minus:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG") (minus:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG")
(match_operand:DF 2 "reg_or_fp0_operand" "fG")))] (match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"sub%-%)%& %R1,%R2,%0" "sub%-%)%& %R1,%R2,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2274,7 +2274,7 @@ ...@@ -2274,7 +2274,7 @@
(minus:DF (float_extend:DF (minus:DF (float_extend:DF
(match_operand:SF 1 "reg_or_fp0_operand" "fG")) (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
(match_operand:DF 2 "reg_or_fp0_operand" "fG")))] (match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN" "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU"
"sub%-%)%& %R1,%R2,%0" "sub%-%)%& %R1,%R2,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2284,7 +2284,7 @@ ...@@ -2284,7 +2284,7 @@
(minus:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG") (minus:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG")
(float_extend:DF (float_extend:DF
(match_operand:SF 2 "reg_or_fp0_operand" "fG"))))] (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN" "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU"
"sub%-%)%& %R1,%R2,%0" "sub%-%)%& %R1,%R2,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2295,7 +2295,7 @@ ...@@ -2295,7 +2295,7 @@
(match_operand:SF 1 "reg_or_fp0_operand" "fG")) (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
(float_extend:DF (float_extend:DF
(match_operand:SF 2 "reg_or_fp0_operand" "fG"))))] (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN" "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU"
"sub%-%)%& %R1,%R2,%0" "sub%-%)%& %R1,%R2,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2303,7 +2303,7 @@ ...@@ -2303,7 +2303,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:SF 0 "register_operand" "=&f") [(set (match_operand:SF 0 "register_operand" "=&f")
(sqrt:SF (match_operand:SF 1 "reg_or_fp0_operand" "fG")))] (sqrt:SF (match_operand:SF 1 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && TARGET_FIX && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && TARGET_FIX && alpha_fptm >= ALPHA_FPTM_SU"
"sqrt%,%)%& %R1,%0" "sqrt%,%)%& %R1,%0"
[(set_attr "type" "fsqrt") [(set_attr "type" "fsqrt")
(set_attr "opsize" "si") (set_attr "opsize" "si")
...@@ -2321,7 +2321,7 @@ ...@@ -2321,7 +2321,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:DF 0 "register_operand" "=&f") [(set (match_operand:DF 0 "register_operand" "=&f")
(sqrt:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG")))] (sqrt:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG")))]
"TARGET_FP && TARGET_FIX && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && TARGET_FIX && alpha_fptm >= ALPHA_FPTM_SU"
"sqrt%-%)%& %R1,%0" "sqrt%-%)%& %R1,%0"
[(set_attr "type" "fsqrt") [(set_attr "type" "fsqrt")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2749,7 +2749,7 @@ ...@@ -2749,7 +2749,7 @@
(match_operator:DF 1 "alpha_comparison_operator" (match_operator:DF 1 "alpha_comparison_operator"
[(match_operand:DF 2 "reg_or_fp0_operand" "fG") [(match_operand:DF 2 "reg_or_fp0_operand" "fG")
(match_operand:DF 3 "reg_or_fp0_operand" "fG")]))] (match_operand:DF 3 "reg_or_fp0_operand" "fG")]))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"cmp%-%C1%' %R2,%R3,%0" "cmp%-%C1%' %R2,%R3,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2759,7 +2759,7 @@ ...@@ -2759,7 +2759,7 @@
(match_operator:DF 1 "alpha_comparison_operator" (match_operator:DF 1 "alpha_comparison_operator"
[(match_operand:DF 2 "reg_or_fp0_operand" "fG") [(match_operand:DF 2 "reg_or_fp0_operand" "fG")
(match_operand:DF 3 "reg_or_fp0_operand" "fG")]))] (match_operand:DF 3 "reg_or_fp0_operand" "fG")]))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN" "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU"
"cmp%-%C1%' %R2,%R3,%0" "cmp%-%C1%' %R2,%R3,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2770,7 +2770,7 @@ ...@@ -2770,7 +2770,7 @@
[(float_extend:DF [(float_extend:DF
(match_operand:SF 2 "reg_or_fp0_operand" "fG")) (match_operand:SF 2 "reg_or_fp0_operand" "fG"))
(match_operand:DF 3 "reg_or_fp0_operand" "fG")]))] (match_operand:DF 3 "reg_or_fp0_operand" "fG")]))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"cmp%-%C1%' %R2,%R3,%0" "cmp%-%C1%' %R2,%R3,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2781,7 +2781,7 @@ ...@@ -2781,7 +2781,7 @@
[(float_extend:DF [(float_extend:DF
(match_operand:SF 2 "reg_or_fp0_operand" "fG")) (match_operand:SF 2 "reg_or_fp0_operand" "fG"))
(match_operand:DF 3 "reg_or_fp0_operand" "fG")]))] (match_operand:DF 3 "reg_or_fp0_operand" "fG")]))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN" "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU"
"cmp%-%C1%' %R2,%R3,%0" "cmp%-%C1%' %R2,%R3,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2792,7 +2792,7 @@ ...@@ -2792,7 +2792,7 @@
[(match_operand:DF 2 "reg_or_fp0_operand" "fG") [(match_operand:DF 2 "reg_or_fp0_operand" "fG")
(float_extend:DF (float_extend:DF
(match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))] (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"cmp%-%C1%' %R2,%R3,%0" "cmp%-%C1%' %R2,%R3,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2803,7 +2803,7 @@ ...@@ -2803,7 +2803,7 @@
[(match_operand:DF 2 "reg_or_fp0_operand" "fG") [(match_operand:DF 2 "reg_or_fp0_operand" "fG")
(float_extend:DF (float_extend:DF
(match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))] (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN" "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU"
"cmp%-%C1%' %R2,%R3,%0" "cmp%-%C1%' %R2,%R3,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2815,7 +2815,7 @@ ...@@ -2815,7 +2815,7 @@
(match_operand:SF 2 "reg_or_fp0_operand" "fG")) (match_operand:SF 2 "reg_or_fp0_operand" "fG"))
(float_extend:DF (float_extend:DF
(match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))] (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN" "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU"
"cmp%-%C1%' %R2,%R3,%0" "cmp%-%C1%' %R2,%R3,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
...@@ -2827,7 +2827,7 @@ ...@@ -2827,7 +2827,7 @@
(match_operand:SF 2 "reg_or_fp0_operand" "fG")) (match_operand:SF 2 "reg_or_fp0_operand" "fG"))
(float_extend:DF (float_extend:DF
(match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))] (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN" "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU"
"cmp%-%C1%' %R2,%R3,%0" "cmp%-%C1%' %R2,%R3,%0"
[(set_attr "type" "fadd") [(set_attr "type" "fadd")
(set_attr "trap" "yes")]) (set_attr "trap" "yes")])
......
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