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lvzhengyang
riscv-gcc-1
Commits
92dcf4c8
Commit
92dcf4c8
authored
Nov 26, 1997
by
Michael Meissner
Committed by
Michael Meissner
Nov 26, 1997
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Pass 9th fp argument correctly on System V/eabi; Add @plt for -fPIC/-mrelocatable
From-SVN: r16746
parent
33e5c8c3
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3 changed files
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20 additions
and
4 deletions
+20
-4
gcc/ChangeLog
+11
-0
gcc/config/rs6000/rs6000.c
+7
-2
gcc/config/rs6000/rs6000.md
+2
-2
No files found.
gcc/ChangeLog
View file @
92dcf4c8
...
...
@@ -2,6 +2,17 @@ Wed Nov 26 11:12:26 1997 Jason Merrill <jason@yorick.cygnus.com>
* toplev.c (main): Complain about -gdwarfn.
Tue Nov 25 20:32:24 1997 Michael Meissner <meissner@cygnus.com>
(patches originally from Geoffrey Keating)
* rs6000.c (function_arg): Excess floating point arguments don't
go into GPR registers after exhausting FP registers under the
System V.4 ABI.
(function_arg_partial_nregs): Ditto.
* rs6000.md (call insns): If -fPIC or -mrelocatable, add @plt
suffix to calls.
Tue Nov 25 23:37:27 1997 Jason Merrill <jason@yorick.cygnus.com>
* integrate.c (output_inline_function): Just unset DECL_INLINE.
...
...
gcc/config/rs6000/rs6000.c
View file @
92dcf4c8
...
...
@@ -1349,9 +1349,11 @@ function_arg (cum, mode, type, named)
const0_rtx
)));
}
/* Long longs won't be split between register and stack */
/* Long longs won't be split between register and stack;
FP arguments get passed on the stack if they didn't get a register. */
else
if
((
DEFAULT_ABI
==
ABI_V4
||
DEFAULT_ABI
==
ABI_SOLARIS
)
&&
align_words
+
RS6000_ARG_SIZE
(
mode
,
type
,
named
)
>
GP_ARG_NUM_REG
)
(
align_words
+
RS6000_ARG_SIZE
(
mode
,
type
,
named
)
>
GP_ARG_NUM_REG
||
(
GET_MODE_CLASS
(
mode
)
==
MODE_FLOAT
&&
TARGET_HARD_FLOAT
)))
{
return
NULL_RTX
;
}
...
...
@@ -1385,6 +1387,9 @@ function_arg_partial_nregs (cum, mode, type, named)
return
0
;
}
if
(
GET_MODE_CLASS
(
mode
)
==
MODE_FLOAT
&&
TARGET_HARD_FLOAT
)
return
0
;
if
(
cum
->
words
<
GP_ARG_NUM_REG
&&
GP_ARG_NUM_REG
<
(
cum
->
words
+
RS6000_ARG_SIZE
(
mode
,
type
,
named
)))
{
...
...
gcc/config/rs6000/rs6000.md
View file @
92dcf4c8
...
...
@@ -7580,7 +7580,7 @@
else if (INTVAL (operands
[
2
]
) & CALL_V4_CLEAR_FP_ARGS)
output_asm_insn (
\"
creqv 6,6,6
\"
, operands);
return
(flag_pic == 1)
?
\"
bl %z0@plt
\"
:
\"
bl %z0
\"
;
return
flag_pic
?
\"
bl %z0@plt
\"
:
\"
bl %z0
\"
;
}"
[
(set_attr "type" "branch")
(set_attr "length" "4,8")])
...
...
@@ -7650,7 +7650,7 @@
else if (INTVAL (operands
[
3
]
) & CALL_V4_CLEAR_FP_ARGS)
output_asm_insn (
\"
creqv 6,6,6
\"
, operands);
return
(flag_pic == 1)
?
\"
bl %z1@plt
\"
:
\"
bl %z1
\"
;
return
flag_pic
?
\"
bl %z1@plt
\"
:
\"
bl %z1
\"
;
}"
[
(set_attr "type" "branch")
(set_attr "length" "4,8")])
...
...
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