Add support for ARMv8-R architecture

2017-07-06  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config/arm/arm-cpus.in (armv8-r): Add new entry.
    * config/arm/arm-isa.h (ISA_ARMv8r): Define macro.
    * config/arm/arm-tables.opt: Regenerate.
    * config/arm/arm.h (enum base_architecture): Add BASE_ARCH_8R
    enumerator.
    * doc/invoke.texi: Mention -march=armv8-r and its extensions.

    gcc/testsuite/
    * lib/target-supports.exp: Generate
    check_effective_target_arm_arch_v8r_ok, add_options_for_arm_arch_v8r
    and check_effective_target_arm_arch_v8r_multilib.

    libgcc/
    * config/arm/lib1funcs.S: Defined __ARM_ARCH__ to 8 for ARMv8-R.

From-SVN: r250025

gcc/ChangeLog

+2017-07-06  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* config/arm/arm-cpus.in (armv8-r): Add new entry.
+	* config/arm/arm-isa.h (ISA_ARMv8r): Define macro.
+	* config/arm/arm-tables.opt: Regenerate.
+	* config/arm/arm.h (enum base_architecture): Add BASE_ARCH_8R
+	enumerator.
+	* doc/invoke.texi: Mention -march=armv8-r and its extensions.
+
 2017-07-06  Carl Love  <cel@us.ibm.com>
 
 	* ChangeLog: Clean up from mid air collision

gcc/config/arm/arm-cpus.in

@@ -380,6 +380,22 @@ begin arch armv8-m.main
  option nodsp remove bit_ARMv7em
 end arch armv8-m.main
 
+begin arch armv8-r
+ tune for cortex-r4
+ tune flags CO_PROC
+ base 8R
+ profile R
+ isa ARMv8r
+ option crc add bit_crc32
+# fp.sp => fp-armv8 (d16); simd => simd + fp-armv8 + d32 + double precision
+# note: no fp option for fp-armv8 (d16) + double precision at the moment
+ option fp.sp add FP_ARMv8
+ option simd add FP_ARMv8 NEON
+ option crypto add FP_ARMv8 CRYPTO
+ option nocrypto remove ALL_CRYPTO
+ option nofp remove ALL_FP
+end arch armv8-r
+
 begin arch iwmmxt
  tune for iwmmxt
  tune flags LDSCHED STRONG XSCALE

gcc/config/arm/arm-isa.h

@@ -127,6 +127,7 @@ enum isa_feature
 #define ISA_ARMv8_2a	ISA_ARMv8_1a, isa_bit_ARMv8_2
 #define ISA_ARMv8m_base ISA_ARMv6m, isa_bit_ARMv8, isa_bit_cmse, isa_bit_tdiv
 #define ISA_ARMv8m_main ISA_ARMv7m, isa_bit_ARMv8, isa_bit_cmse
+#define ISA_ARMv8r	ISA_ARMv8a
 
 /* List of all cryptographic extensions to stripout if crypto is
    disabled.  Currently, that's trivial, but we define it anyway for

gcc/config/arm/arm-tables.opt

@@ -455,10 +455,13 @@ EnumValue
 Enum(arm_arch) String(armv8-m.main) Value(30)
 
 EnumValue
-Enum(arm_arch) String(iwmmxt) Value(31)
+Enum(arm_arch) String(armv8-r) Value(31)
 
 EnumValue
-Enum(arm_arch) String(iwmmxt2) Value(32)
+Enum(arm_arch) String(iwmmxt) Value(32)
+
+EnumValue
+Enum(arm_arch) String(iwmmxt2) Value(33)
 
 Enum
 Name(arm_fpu) Type(enum fpu_type)

gcc/config/arm/arm.h

@@ -384,7 +384,8 @@ enum base_architecture
   BASE_ARCH_7EM = 7,
   BASE_ARCH_8A = 8,
   BASE_ARCH_8M_BASE = 8,
-  BASE_ARCH_8M_MAIN = 8
+  BASE_ARCH_8M_MAIN = 8,
+  BASE_ARCH_8R = 8
 };
 
 /* The major revision number of the ARM Architecture implemented by the target.  */

gcc/doc/invoke.texi

@@ -15218,6 +15218,7 @@ Permissible names are:
 @samp{armv7}, @samp{armv7-a}, @samp{armv7ve}, 
 @samp{armv8-a}, @samp{armv8.1-a}, @samp{armv8.2-a},
 @samp{armv7-r},
+@samp{armv8-r},
 @samp{armv6-m}, @samp{armv6s-m},
 @samp{armv7-m}, @samp{armv7e-m},
 @samp{armv8-m.base}, @samp{armv8-m.main},
@@ -15484,7 +15485,20 @@ The single- and double-precision floating-point instructions.
 
 @item +nofp
 Disable the floating-point extension.
+@end table
 
+@item armv8-r
+@table @samp
+@item +crc
+The Cyclic Redundancy Check (CRC) instructions.
+@item +simd
+The ARMv8 Advanced SIMD and floating-point instructions.
+@item +crypto
+The cryptographic instructions.
+@item +nocrypto
+Disable the cryptographic isntructions.
+@item +nofp
+Disable the floating-point, Advanced SIMD and cryptographic instructions.
 @end table
 
 @end table

gcc/testsuite/ChangeLog

+2017-07-06  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* lib/target-supports.exp: Generate
+	check_effective_target_arm_arch_v8r_ok, add_options_for_arm_arch_v8r
+	and check_effective_target_arm_arch_v8r_multilib.
+
 2017-07-06  Carl Love  <cel@us.ibm.com>
 
 	* ChangeLog: Clean up from mid air collision

gcc/testsuite/lib/target-supports.exp

@@ -3901,7 +3901,8 @@ foreach { armfunc armflag armdefs } {
 	v8_2a "-march=armv8.2a" __ARM_ARCH_8A__
 	v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
 		__ARM_ARCH_8M_BASE__
-	v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } {
+	v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
+	v8r "-march=armv8-r" __ARM_ARCH_8R__ } {
     eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
 	proc check_effective_target_arm_arch_FUNC_ok { } {
 	    if { [ string match "*-marm*" "FLAG" ] &&

libgcc/ChangeLog

+2017-07-06  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* config/arm/lib1funcs.S: Defined __ARM_ARCH__ to 8 for ARMv8-R.
+
 2017-07-03  Olivier Hainque  <hainque@adacore.com>
 
         * config/t-vxworks7: New file, really.

libgcc/config/arm/lib1funcs.S

@@ -109,7 +109,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
 #endif
 
 #if defined(__ARM_ARCH_8A__) || defined(__ARM_ARCH_8M_BASE__) \
-	|| defined(__ARM_ARCH_8M_MAIN__)
+	|| defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8R__)
 # define __ARM_ARCH__ 8
 #endif