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riscv-gcc-1
Commit 91e736f9 by Kazuhiro Inaoka Committed by Nick Clifton
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(TARGET_M32R2). Test for TARGET_M32R2_MASK not TARGET_M32RX_MASK. 

From-SVN: r76204
parent 4043d6fb
Showing with 6 additions and 1 deletions
gcc/ChangeLog
2004-01-20 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
* config/m32r/m32r.h (TARGET_M32R2). Test for TARGET_M32R2_MASK
not TARGET_M32RX_MASK.
2004-01-20 Eric Botcazou <ebotcazou@libertysurf.fr> 2004-01-20 Eric Botcazou <ebotcazou@libertysurf.fr>
PR target/13557 PR target/13557
......
gcc/config/m32r/m32r.h
...@@ -241,7 +241,7 @@ extern int target_flags; ...@@ -241,7 +241,7 @@ extern int target_flags;
/* Support extended instruction set of m32r2. */ /* Support extended instruction set of m32r2. */
#define TARGET_M32R2_MASK (1 << 6) #define TARGET_M32R2_MASK (1 << 6)
#define TARGET_M32R2 (target_flags & TARGET_M32RX_MASK) #define TARGET_M32R2 (target_flags & TARGET_M32R2_MASK)
#undef TARGET_M32R #undef TARGET_M32R
#define TARGET_M32R (! TARGET_M32RX && ! TARGET_M32R2) #define TARGET_M32R (! TARGET_M32RX && ! TARGET_M32R2)
......
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