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Commit 9199f050 by Uros Bizjak Committed by Uros Bizjak
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re PR target/18668 (use prescott's fisttp) 

	PR target/18668
	* config/i386/i386.h (x86_fisttp): New.
	(TARGET_FISTTP): New macro.
	* config/i386/i386.c (x86_fisttp): Set for NOCONA.
	(output_fix_trunc): Add fisttp parameter.  Generate fisttp x87
	instruction when fisttp flag is set.
	* config/i386/i386-protos.h (output_fix_trunc): Change declaration.

	* config/i386/i386.md (type attribute): Add fisttp.
	(unit attribute): Set to i387 for fisttp type.
	(X87MODEF, X87MODEI, SSEMODEF, SSEMODEI24): New mode macros.
	(fix_truncxfdi2, fix_truncxfsi2): Generate fisttp patterns for
	TARGET_FISTTP.
	(fix_truncdfdi2, fix_truncsfdi2, fix_truncdfsi2, fix_truncsfsi2):
	Generate fisttp patterns for TARGET_FISTTP. Implement using mode
	macros.
	(fix_truncxfhi2, fix_truncdfhi2, fix_truncsfhi2): Generate fisttp
	patterns for TARGET_FISTTP.  Enable patterns for
	(TARGET_FISTTP && !TARGET_SSE_MATH). Implement using mode macros.
	(fix_trunc<mode>_i387_fisttp_1, fix_trunc<mode>_i387_fisttp,
	fix_trunc<mode>_i387_fisttp_with_temp): New instruction patterns to
	implement fisttp x87 insn.
	(fix_trunc*_i387_fisttp splitters): New patterns.
	(*fix_truncdi_i387, *fix_truncsi_i387, *fix_trunchi_i387):
	Rename to *fix_trunc<mode>_i387_1.  Implement using mode macros.
	Disable patterns for TARGET_FISTTP.  Add comment about FLAGS_REG
	clobber.
	(fix_truncdi_memory, fix_truncdi_nomemory, fix_trunchi_nomemory):
	Rename to fix_trunc<mode>_i387 and fix_trunc<mode>_i387_with_temp.
	Implement using mode macros. Disable patterns for TARGET_FISTTP.
	(fix_truncsi_memory, fix_truncsi_nomemory, fix_trunchi_memory,
	fix_trunchi_nomemory): Rename to fix_trunc<mode>_i387 and
	fix_trunc<mode>_i387_with_temp. Implement using mode macros.
	Disable patterns for TARGET_FISTTP.
	(fix_trunc*_i387 splitters): Implement usign mode macros.
	(fix_truncdfdi_sse, fix_truncsfdi_sse, fix_truncdfsi_sse,
	fix_truncsfsi_sse): Disable for (TARGET_FISTTP && !TARGET_SSE_MATH).
	(fix_trunx*_sse peephole2s): Implement using mode macros.

From-SVN: r96477
parent 9b12dc4f
Showing with 52 additions and 4 deletions
gcc/ChangeLog
2005-03-15 Uros Bizjak <uros@kss-loka.si>
PR target/18668
* config/i386/i386.h (x86_fisttp): New.
(TARGET_FISTTP): New macro.
* config/i386/i386.c (x86_fisttp): Set for NOCONA.
(output_fix_trunc): Add fisttp parameter. Generate fisttp x87
instruction when fisttp flag is set.
* config/i386/i386-protos.h (output_fix_trunc): Change declaration.
* config/i386/i386.md (type attribute): Add fisttp.
(unit attribute): Set to i387 for fisttp type.
(X87MODEF, X87MODEI, SSEMODEF, SSEMODEI24): New mode macros.
(fix_truncxfdi2, fix_truncxfsi2): Generate fisttp patterns for
TARGET_FISTTP.
(fix_truncdfdi2, fix_truncsfdi2, fix_truncdfsi2, fix_truncsfsi2):
Generate fisttp patterns for TARGET_FISTTP. Implement using mode
macros.
(fix_truncxfhi2, fix_truncdfhi2, fix_truncsfhi2): Generate fisttp
patterns for TARGET_FISTTP. Enable patterns for
(TARGET_FISTTP && !TARGET_SSE_MATH). Implement using mode macros.
(fix_trunc<mode>_i387_fisttp_1, fix_trunc<mode>_i387_fisttp,
fix_trunc<mode>_i387_fisttp_with_temp): New instruction patterns to
implement fisttp x87 insn.
(fix_trunc*_i387_fisttp splitters): New patterns.
(*fix_truncdi_i387, *fix_truncsi_i387, *fix_trunchi_i387):
Rename to *fix_trunc<mode>_i387_1. Implement using mode macros.
Disable patterns for TARGET_FISTTP. Add comment about FLAGS_REG
clobber.
(fix_truncdi_memory, fix_truncdi_nomemory, fix_trunchi_nomemory):
Rename to fix_trunc<mode>_i387 and fix_trunc<mode>_i387_with_temp.
Implement using mode macros. Disable patterns for TARGET_FISTTP.
(fix_truncsi_memory, fix_truncsi_nomemory, fix_trunchi_memory,
fix_trunchi_nomemory): Rename to fix_trunc<mode>_i387 and
fix_trunc<mode>_i387_with_temp. Implement using mode macros.
Disable patterns for TARGET_FISTTP.
(fix_trunc*_i387 splitters): Implement usign mode macros.
(fix_truncdfdi_sse, fix_truncsfdi_sse, fix_truncdfsi_sse,
fix_truncsfsi_sse): Disable for (TARGET_FISTTP && !TARGET_SSE_MATH).
(fix_trunx*_sse peephole2s): Implement using mode macros.
2005-03-15 J"orn Rennecke <joern.rennecke@st.com>
PR rtl-optimization/20291
......
gcc/config/i386/i386-protos.h
......@@ -117,7 +117,7 @@ extern void split_ti (rtx[], int, rtx[], rtx[]);
extern const char *output_set_got (rtx);
extern const char *output_387_binary_op (rtx, rtx*);
extern const char *output_387_reg_move (rtx, rtx*);
extern const char *output_fix_trunc (rtx, rtx*);
extern const char *output_fix_trunc (rtx, rtx*, int);
extern const char *output_fp_compare (rtx, rtx*, int, int);
extern void i386_output_dwarf_dtprel (FILE*, int, rtx);
......
gcc/config/i386/i386.c
......@@ -525,6 +525,7 @@ const int x86_double_with_add = ~m_386;
const int x86_use_bit_test = m_386;
const int x86_unroll_strlen = m_486 | m_PENT | m_PPRO | m_ATHLON_K8 | m_K6;
const int x86_cmove = m_PPRO | m_ATHLON_K8 | m_PENT4 | m_NOCONA;
const int x86_fisttp = m_NOCONA;
const int x86_3dnow_a = m_ATHLON_K8;
const int x86_deep_branch = m_PPRO | m_K6 | m_ATHLON_K8 | m_PENT4 | m_NOCONA;
/* Branch hints were put in P4 based on simulation result. But
......@@ -7282,7 +7283,7 @@ emit_i387_cw_initialization (rtx current_mode, rtx new_mode, int mode)
operand may be [SDX]Fmode. */
const char *
output_fix_trunc (rtx insn, rtx *operands)
output_fix_trunc (rtx insn, rtx *operands, int fisttp)
{
int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0;
int dimode_p = GET_MODE (operands[0]) == DImode;
......@@ -7290,7 +7291,7 @@ output_fix_trunc (rtx insn, rtx *operands)
/* Jump through a hoop or two for DImode, since the hardware has no
non-popping instruction. We used to do this a different way, but
that was somewhat fragile and broke with post-reload splitters. */
if (dimode_p && !stack_top_dies)
if ((dimode_p || fisttp) && !stack_top_dies)
output_asm_insn ("fld\t%y1", operands);
if (!STACK_TOP_P (operands[1]))
......@@ -7299,12 +7300,17 @@ output_fix_trunc (rtx insn, rtx *operands)
if (GET_CODE (operands[0]) != MEM)
abort ();
if (fisttp)
output_asm_insn ("fisttp%z0\t%0", operands);
else
{
output_asm_insn ("fldcw\t%3", operands);
if (stack_top_dies || dimode_p)
output_asm_insn ("fistp%z0\t%0", operands);
else
output_asm_insn ("fist%z0\t%0", operands);
output_asm_insn ("fldcw\t%2", operands);
}
return "";
}
......
gcc/config/i386/i386.h
......@@ -229,7 +229,7 @@ extern int target_flags;
#define TUNEMASK (1 << ix86_tune)
extern const int x86_use_leave, x86_push_memory, x86_zero_extend_with_and;
extern const int x86_use_bit_test, x86_cmove, x86_deep_branch;
extern const int x86_use_bit_test, x86_cmove, x86_fisttp, x86_deep_branch;
extern const int x86_branch_hints, x86_unroll_strlen;
extern const int x86_double_with_add, x86_partial_reg_stall, x86_movx;
extern const int x86_use_loop, x86_use_himode_fiop, x86_use_simode_fiop;
......@@ -258,6 +258,7 @@ extern int x86_prefetch_sse;
/* For sane SSE instruction set generation we need fcomi instruction. It is
safe to enable all CMOVE instructions. */
#define TARGET_CMOVE ((x86_cmove & (1 << ix86_arch)) || TARGET_SSE)
#define TARGET_FISTTP (x86_fisttp & (1 << ix86_arch))
#define TARGET_DEEP_BRANCH_PREDICTION (x86_deep_branch & TUNEMASK)
#define TARGET_BRANCH_PREDICTION_HINTS (x86_branch_hints & TUNEMASK)
#define TARGET_DOUBLE_WITH_ADD (x86_double_with_add & TUNEMASK)
......
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