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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
8abf4d69
Commit
8abf4d69
authored
Jun 29, 1994
by
Torbjorn Granlund
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(smulsi3_highpart, umulsi3_highpart): New patterns.
From-SVN: r7590
parent
47c95f50
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gcc/config/a29k/a29k.md
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8abf4d69
...
@@ -1193,6 +1193,28 @@
...
@@ -1193,6 +1193,28 @@
{ operands
[
3
]
= operand_subword (operands
[
0
]
, 1, 1, DImode);
{ operands
[
3
]
= operand_subword (operands
[
0
]
, 1, 1, DImode);
operands
[
4
]
= operand_subword (operands
[
1
]
, 0, 1, DImode); } ")
operands
[
4
]
= operand_subword (operands
[
1
]
, 0, 1, DImode); } ")
(define_insn "smulsi3_highpart"
[
(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(truncate:SI
(lshiftrt:DI
(mult:DI (sign_extend:DI (match_operand:SI 1 "gpc_reg_operand" "%r"))
(sign_extend:DI (match_operand:SI 2 "gpc_reg_operand" "r")))
(const_int 32))))
(clobber (match_scratch:SI 3 "=&q"))]
""
"multm %0,%1,%2")
(define_insn "umulsi3_highpart"
[
(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(truncate:SI
(lshiftrt:DI
(mult:DI (zero_extend:DI (match_operand:SI 1 "gpc_reg_operand" "%r"))
(zero_extend:DI (match_operand:SI 2 "gpc_reg_operand" "r")))
(const_int 32))))
(clobber (match_scratch:SI 3 "=&q"))]
""
"multmu %0,%1,%2")
;; NAND
;; NAND
(define_insn ""
(define_insn ""
[
(set (match_operand:SI 0 "gpc_reg_operand" "=r")
[
(set (match_operand:SI 0 "gpc_reg_operand" "=r")
...
...
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