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riscv-gcc-1
Commit 871c9abb by Michael Meissner Committed by Michael Meissner
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Fix 43484, swap registers if one is R0 for multiword moves 

From-SVN: r157709
parent 6d217c32
Showing with 16 additions and 0 deletions
gcc/ChangeLog
2010-03-24 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/43484
* config/rs6000/rs6000.c (rs6000_split_multireg_move): If r0 is
used in reg+reg addressing, swap registers.
2010-03-24 Jakub Jelinek <jakub@redhat.com> 2010-03-24 Jakub Jelinek <jakub@redhat.com>
PR debug/43293 PR debug/43293
......
gcc/config/rs6000/rs6000.c
...@@ -16832,6 +16832,16 @@ rs6000_split_multireg_move (rtx dst, rtx src) ...@@ -16832,6 +16832,16 @@ rs6000_split_multireg_move (rtx dst, rtx src)
{ {
rtx basereg = XEXP (XEXP (dst, 0), 0); rtx basereg = XEXP (XEXP (dst, 0), 0);
rtx offsetreg = XEXP (XEXP (dst, 0), 1); rtx offsetreg = XEXP (XEXP (dst, 0), 1);
gcc_assert (GET_CODE (XEXP (dst, 0)) == PLUS
&& REG_P (basereg)
&& REG_P (offsetreg)
&& REGNO (basereg) != REGNO (offsetreg));
if (REGNO (basereg) == 0)
{
rtx tmp = offsetreg;
offsetreg = basereg;
basereg = tmp;
}
emit_insn (gen_add3_insn (basereg, basereg, offsetreg)); emit_insn (gen_add3_insn (basereg, basereg, offsetreg));
restore_basereg = gen_sub3_insn (basereg, basereg, offsetreg); restore_basereg = gen_sub3_insn (basereg, basereg, offsetreg);
dst = replace_equiv_address (dst, basereg); dst = replace_equiv_address (dst, basereg);
......
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