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riscv-gcc-1
Commit 862e2886 by Steven Bosscher
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i386.c (x86_use_loop): Remove. 

	* config/i386/i386.c (x86_use_loop): Remove.
	* config/i386/i386.h (x86_use_loop): Remove extern decl.
	(TARGET_USE_LOOP): Remove.
	* config/i386/i386.md (doloop_end, doloop_end_internal): Remove.
	Also remove related define_splits.

From-SVN: r100618
parent 88088c03
Showing with 9 additions and 110 deletions
gcc/ChangeLog
2005-06-05 Steven Bosscher <stevenb@suse.de>
* config/i386/i386.c (x86_use_loop): Remove.
* config/i386/i386.h (x86_use_loop): Remove extern decl.
(TARGET_USE_LOOP): Remove.
* config/i386/i386.md (doloop_end, doloop_end_internal): Remove.
Also remove related define_splits.
2005-06-05 Dorit Nuzman <dorit@il.ibm.com>
* tree-flow.h (stmt_ann_d): Move aux to ...
......
gcc/config/i386/i386.c
......@@ -535,7 +535,6 @@ const int x86_deep_branch = m_PPRO | m_K6 | m_ATHLON_K8 | m_PENT4 | m_NOCONA;
const int x86_branch_hints = 0;
const int x86_use_sahf = m_PPRO | m_K6 | m_PENT4 | m_NOCONA;
const int x86_partial_reg_stall = m_PPRO;
const int x86_use_loop = m_K6;
const int x86_use_himode_fiop = m_386 | m_486 | m_K6;
const int x86_use_simode_fiop = ~(m_PPRO | m_ATHLON_K8 | m_PENT);
const int x86_use_mov0 = m_K6;
......
gcc/config/i386/i386.h
......@@ -146,7 +146,7 @@ extern const int x86_use_leave, x86_push_memory, x86_zero_extend_with_and;
extern const int x86_use_bit_test, x86_cmove, x86_fisttp, x86_deep_branch;
extern const int x86_branch_hints, x86_unroll_strlen;
extern const int x86_double_with_add, x86_partial_reg_stall, x86_movx;
extern const int x86_use_loop, x86_use_himode_fiop, x86_use_simode_fiop;
extern const int x86_use_himode_fiop, x86_use_simode_fiop;
extern const int x86_use_mov0, x86_use_cltd, x86_read_modify_write;
extern const int x86_read_modify, x86_split_long_moves;
extern const int x86_promote_QImode, x86_single_stringop, x86_fast_prefix;
......@@ -180,7 +180,6 @@ extern int x86_prefetch_sse;
#define TARGET_USE_SAHF ((x86_use_sahf & TUNEMASK) && !TARGET_64BIT)
#define TARGET_MOVX (x86_movx & TUNEMASK)
#define TARGET_PARTIAL_REG_STALL (x86_partial_reg_stall & TUNEMASK)
#define TARGET_USE_LOOP (x86_use_loop & TUNEMASK)
#define TARGET_USE_HIMODE_FIOP (x86_use_himode_fiop & TUNEMASK)
#define TARGET_USE_SIMODE_FIOP (x86_use_simode_fiop & TUNEMASK)
#define TARGET_USE_MOV0 (x86_use_mov0 & TUNEMASK)
......
gcc/config/i386/i386.md
......@@ -13066,113 +13066,6 @@
[(set_attr "type" "ibr")
(set_attr "length_immediate" "0")])
;; Loop instruction
;;
;; This is all complicated by the fact that since this is a jump insn
;; we must handle our own reloads.
(define_expand "doloop_end"
[(use (match_operand 0 "" "")) ; loop pseudo
(use (match_operand 1 "" "")) ; iterations; zero if unknown
(use (match_operand 2 "" "")) ; max iterations
(use (match_operand 3 "" "")) ; loop level
(use (match_operand 4 "" ""))] ; label
"!TARGET_64BIT && TARGET_USE_LOOP"
"
{
/* Only use cloop on innermost loops. */
if (INTVAL (operands[3]) > 1)
FAIL;
if (GET_MODE (operands[0]) != SImode)
FAIL;
emit_jump_insn (gen_doloop_end_internal (operands[4], operands[0],
operands[0]));
DONE;
}")
(define_insn "doloop_end_internal"
[(set (pc)
(if_then_else (ne (match_operand:SI 1 "register_operand" "c,?*r,?*r")
(const_int 1))
(label_ref (match_operand 0 "" ""))
(pc)))
(set (match_operand:SI 2 "nonimmediate_operand" "=1,1,*m*r")
(plus:SI (match_dup 1)
(const_int -1)))
(clobber (match_scratch:SI 3 "=X,X,r"))
(clobber (reg:CC FLAGS_REG))]
"!TARGET_64BIT && TARGET_USE_LOOP
&& (reload_in_progress || reload_completed
|| register_operand (operands[2], VOIDmode))"
{
if (which_alternative != 0)
return "#";
if (get_attr_length (insn) == 2)
return "%+loop\t%l0";
else
return "dec{l}\t%1\;%+jne\t%l0";
}
[(set (attr "length")
(if_then_else (and (eq_attr "alternative" "0")
(and (ge (minus (match_dup 0) (pc))
(const_int -126))
(lt (minus (match_dup 0) (pc))
(const_int 128))))
(const_int 2)
(const_int 16)))
;; We don't know the type before shorten branches. Optimistically expect
;; the loop instruction to match.
(set (attr "type") (const_string "ibr"))])
(define_split
[(set (pc)
(if_then_else (ne (match_operand:SI 1 "register_operand" "")
(const_int 1))
(match_operand 0 "" "")
(pc)))
(set (match_dup 1)
(plus:SI (match_dup 1)
(const_int -1)))
(clobber (match_scratch:SI 2 ""))
(clobber (reg:CC FLAGS_REG))]
"!TARGET_64BIT && TARGET_USE_LOOP
&& reload_completed
&& REGNO (operands[1]) != 2"
[(parallel [(set (reg:CCZ FLAGS_REG)
(compare:CCZ (plus:SI (match_dup 1) (const_int -1))
(const_int 0)))
(set (match_dup 1) (plus:SI (match_dup 1) (const_int -1)))])
(set (pc) (if_then_else (ne (reg:CCZ FLAGS_REG) (const_int 0))
(match_dup 0)
(pc)))]
"")
(define_split
[(set (pc)
(if_then_else (ne (match_operand:SI 1 "register_operand" "")
(const_int 1))
(match_operand 0 "" "")
(pc)))
(set (match_operand:SI 2 "nonimmediate_operand" "")
(plus:SI (match_dup 1)
(const_int -1)))
(clobber (match_scratch:SI 3 ""))
(clobber (reg:CC FLAGS_REG))]
"!TARGET_64BIT && TARGET_USE_LOOP
&& reload_completed
&& (! REG_P (operands[2])
|| ! rtx_equal_p (operands[1], operands[2]))"
[(set (match_dup 3) (match_dup 1))
(parallel [(set (reg:CCZ FLAGS_REG)
(compare:CCZ (plus:SI (match_dup 3) (const_int -1))
(const_int 0)))
(set (match_dup 3) (plus:SI (match_dup 3) (const_int -1)))])
(set (match_dup 2) (match_dup 3))
(set (pc) (if_then_else (ne (reg:CCZ FLAGS_REG) (const_int 0))
(match_dup 0)
(pc)))]
"")
;; Convert setcc + movzbl to xor + setcc if operands don't overlap.
(define_peephole2
......
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