Commit 8376061d by Catherine Moore Committed by Nick Clifton

v850.h (MULDI3_LIBCALL, [...]): Define.

    * config/v850/v850.h (MULDI3_LIBCALL, UCMPDI2_LIBCALL, CMPDI2_LIBCALL,
    NEGDI2_LIBCALL, INIT_TARGET_OPTABS, MASK_STRICT_ALIGN): Define.
    (PREDICATE_CODES): Include new predicates.
    (RTX_COSTS): Handle UMOD and UDIV.  Tune MULT for v850e.
    (TARGET_SWITCHES):  Add strict-align.
    (TARGET_STRICT_ALIGN): New.
    (MASK_DEFAULT, STRICT_ALIGNMENT):  Redefine.
    * config/v850/t-v850 (MULTILIB_OPTIONS, MULTILIB_DIRNAMES):
    Define.
    (LIB1ASMFUNCS): Add v850_negdi2, v850_cmpdi2, v850_ucmpdi2,
    v850_muldi3.
    * config/v850/lib1funcs.asm (L_callt_save_r2_r29, L_return_r2_r29,
    L_callt_save_r2_r31, L_return_r2_r31,
    L_save_all_interrupt): Change addi to add.
    (L_save_interrupt, L_return_interrupt): Rework.
    (__return_r31):  Correct .size directive.
    (mulsi3, divsi3, udivsi3, umodsi3, modsi3): Tune for v850e.
    (v850_negdi2, v850_cmpdi2, v850_ucmpdi2, v850_muldi3):
    New routines.
    * config/v850/v850.c (expand_prologue): Call
    gen_callt_save_interrupt, gen_callt_restore_all_interrupt,
    gen_callt_return_interrupt and gen_callt_save_all_interrupt.
    (reg_or_int9_operand): New predicate.
    (reg_or_const_operand): New routine.
    * config/v850/v850.md (return_interrupt): Changed from
    restore_interrupt.
    (callt_save_all_interrupt): Changed from save_all_interrupt_v850e.
    (callt_save_interrupt): Change save sequence.
    (callt_return_interrupt): New.
    (save_interrupt): Don't use runtime function for LONG_CALLS
    and TARGET_PROLOG_FUNCTION.
    (save_all_interrupt): Likewise.
    (mulsi3): Use new predicate.
    (moviscc): Disallow some combination of constants.
    Fix define_split for sasf insns, so that it will not generate bad
    code if operand0 and operand5 are the same.
    * config/v850/v850-protos.h: Prototype new predicates.

From-SVN: r56654
parent 25cf8398
2001-08-29 Catherine Moore <clm@redhat.com>
* config/v850/v850.h (MULDI3_LIBCALL, UCMPDI2_LIBCALL, CMPDI2_LIBCALL,
NEGDI2_LIBCALL, INIT_TARGET_OPTABS, MASK_STRICT_ALIGN): Define.
(PREDICATE_CODES): Include new predicates.
(RTX_COSTS): Handle UMOD and UDIV. Tune MULT for v850e.
(TARGET_SWITCHES): Add strict-align.
(TARGET_STRICT_ALIGN): New.
(MASK_DEFAULT, STRICT_ALIGNMENT): Redefine.
* config/v850/t-v850 (MULTILIB_OPTIONS, MULTILIB_DIRNAMES):
Define.
(LIB1ASMFUNCS): Add v850_negdi2, v850_cmpdi2, v850_ucmpdi2,
v850_muldi3.
* config/v850/lib1funcs.asm (L_callt_save_r2_r29, L_return_r2_r29,
L_callt_save_r2_r31, L_return_r2_r31,
L_save_all_interrupt): Change addi to add.
(L_save_interrupt, L_return_interrupt): Rework.
(__return_r31): Correct .size directive.
(mulsi3, divsi3, udivsi3, umodsi3, modsi3): Tune for v850e.
(v850_negdi2, v850_cmpdi2, v850_ucmpdi2, v850_muldi3):
New routines.
* config/v850/v850.c (expand_prologue): Call
gen_callt_save_interrupt, gen_callt_restore_all_interrupt,
gen_callt_return_interrupt and gen_callt_save_all_interrupt.
(reg_or_int9_operand): New predicate.
(reg_or_const_operand): New routine.
* config/v850/v850.md (return_interrupt): Changed from
restore_interrupt.
(callt_save_all_interrupt): Changed from save_all_interrupt_v850e.
(callt_save_interrupt): Change save sequence.
(callt_return_interrupt): New.
(save_interrupt): Don't use runtime function for LONG_CALLS
and TARGET_PROLOG_FUNCTION.
(save_all_interrupt): Likewise.
(mulsi3): Use new predicate.
(moviscc): Disallow some combination of constants.
Fix define_split for sasf insns, so that it will not generate bad
code if operand0 and operand5 are the same.
* config/v850/v850-protos.h: Prototype new predicates.
2002-08-28 Gabriel Dos Reis <gdr@integrable-solutions.net> 2002-08-28 Gabriel Dos Reis <gdr@integrable-solutions.net>
* c-common.c (builtin_define_type_precision): New function. * c-common.c (builtin_define_type_precision): New function.
......
...@@ -31,70 +31,87 @@ Boston, MA 02111-1307, USA. */ ...@@ -31,70 +31,87 @@ Boston, MA 02111-1307, USA. */
.text .text
.globl ___mulsi3 .globl ___mulsi3
.type ___mulsi3,@function .type ___mulsi3,@function
/*
* #define SHIFT 12
* #define MASK ((1 << SHIFT) - 1)
*
* #define STEP(i, j) \
* ({ \
* short a_part = (a >> (i)) & MASK; \
* short b_part = (b >> (j)) & MASK; \
* int res = (((int)a_part) * ((int)b_part)); \
* res; \
* })
*
* int
* __mulsi3 (unsigned a, unsigned b)
* {
* return STEP (0, 0) +
* ((STEP (SHIFT, 0) + STEP (0, SHIFT)) << SHIFT) +
* ((STEP (0, 2 * SHIFT) + STEP (SHIFT, SHIFT) + STEP (2 * SHIFT, 0))
* << (2 * SHIFT));
* }
*/
___mulsi3: ___mulsi3:
mov r6,r13 #ifdef __v850__
movea lo(4095),r0,r16 /*
and r16,r13 #define SHIFT 12
mov r7,r15 #define MASK ((1 << SHIFT) - 1)
and r16,r15
mov r13,r10 #define STEP(i, j) \
mulh r15,r10 ({ \
shr 12,r6 short a_part = (a >> (i)) & MASK; \
mov r6,r14 short b_part = (b >> (j)) & MASK; \
and r16,r14 int res = (((int) a_part) * ((int) b_part)); \
mov r14,r11 res; \
mulh r15,r11 })
shr 12,r7
mov r7,r12 int
and r16,r12 __mulsi3 (unsigned a, unsigned b)
shr 12,r7 {
and r16,r7 return STEP (0, 0) +
mulh r13,r7 ((STEP (SHIFT, 0) + STEP (0, SHIFT)) << SHIFT) +
shr 12,r6 ((STEP (0, 2 * SHIFT) + STEP (SHIFT, SHIFT) + STEP (2 * SHIFT, 0))
mulh r12,r13 << (2 * SHIFT));
and r16,r6 }
add r13,r11 */
shl 12,r11 mov r6, r14
add r11,r10 movea lo(32767), r0, r10
mov r14,r11 and r10, r14
mulh r12,r11 mov r7, r15
mulh r15,r6 and r10, r15
add r11,r7 shr 15, r6
add r6,r7 mov r6, r13
shl 24,r7 and r10, r13
add r7,r10 shr 15, r7
mov r7, r12
and r10, r12
shr 15, r6
shr 15, r7
mov r14, r10
mulh r15, r10
mov r14, r11
mulh r12, r11
mov r13, r16
mulh r15, r16
mulh r14, r7
mulh r15, r6
add r16, r11
mulh r13, r12
shl 15, r11
add r11, r10
add r12, r7
add r6, r7
shl 30, r7
add r7, r10
jmp [r31]
#endif /* __v850__ */
#if defined(__v850e__) || defined(__v850ea__)
/* This routine is almost unneccesarry because gcc
generates the MUL instruction for the RTX mulsi3.
But if someone wants to link his application with
previsously compiled v850 objects then they will
need this function. */
/* It isn't good to put the inst sequence as below;
mul r7, r6,
mov r6, r10, r0
In this case, there is a RAW hazard between them.
MUL inst takes 2 cycle in EX stage, then MOV inst
must wait 1cycle. */
mov r7, r10
mul r6, r10, r0
jmp [r31] jmp [r31]
#endif /* __v850e__ */
.size ___mulsi3,.-___mulsi3 .size ___mulsi3,.-___mulsi3
#endif #endif /* L_mulsi3 */
#ifdef L_udivsi3 #ifdef L_udivsi3
.text .text
.global ___udivsi3 .global ___udivsi3
.type ___udivsi3,@function .type ___udivsi3,@function
___udivsi3: ___udivsi3:
#ifdef __v850__
mov 1,r12 mov 1,r12
mov 0,r10 mov 0,r10
cmp r6,r7 cmp r6,r7
...@@ -126,6 +143,16 @@ ___udivsi3: ...@@ -126,6 +143,16 @@ ___udivsi3:
bne .L9 bne .L9
.L8: .L8:
jmp [r31] jmp [r31]
#else /* defined(__v850e__) */
/* See comments at end of __mulsi3. */
mov r6, r10
divu r7, r10, r0
jmp [r31]
#endif /* __v850e__ */
.size ___udivsi3,.-___udivsi3 .size ___udivsi3,.-___udivsi3
#endif #endif
...@@ -134,6 +161,7 @@ ___udivsi3: ...@@ -134,6 +161,7 @@ ___udivsi3:
.globl ___divsi3 .globl ___divsi3
.type ___divsi3,@function .type ___divsi3,@function
___divsi3: ___divsi3:
#ifdef __v850__
add -8,sp add -8,sp
st.w r31,4[sp] st.w r31,4[sp]
st.w r22,0[sp] st.w r22,0[sp]
...@@ -157,6 +185,16 @@ ___divsi3: ...@@ -157,6 +185,16 @@ ___divsi3:
ld.w 4[sp],r31 ld.w 4[sp],r31
add 8,sp add 8,sp
jmp [r31] jmp [r31]
#else /* defined(__v850e__) */
/* See comments at end of __mulsi3. */
mov r6, r10
div r7, r10, r0
jmp [r31]
#endif /* __v850e__ */
.size ___divsi3,.-___divsi3 .size ___divsi3,.-___divsi3
#endif #endif
...@@ -165,6 +203,7 @@ ___divsi3: ...@@ -165,6 +203,7 @@ ___divsi3:
.globl ___umodsi3 .globl ___umodsi3
.type ___umodsi3,@function .type ___umodsi3,@function
___umodsi3: ___umodsi3:
#ifdef __v850__
add -12,sp add -12,sp
st.w r31,8[sp] st.w r31,8[sp]
st.w r7,4[sp] st.w r7,4[sp]
...@@ -178,6 +217,15 @@ ___umodsi3: ...@@ -178,6 +217,15 @@ ___umodsi3:
ld.w 8[sp],r31 ld.w 8[sp],r31
add 12,sp add 12,sp
jmp [r31] jmp [r31]
#else /* defined(__v850e__) */
/* See comments at end of __mulsi3. */
divu r7, r6, r10
jmp [r31]
#endif /* __v850e__ */
.size ___umodsi3,.-___umodsi3 .size ___umodsi3,.-___umodsi3
#endif /* L_umodsi3 */ #endif /* L_umodsi3 */
...@@ -186,6 +234,7 @@ ___umodsi3: ...@@ -186,6 +234,7 @@ ___umodsi3:
.globl ___modsi3 .globl ___modsi3
.type ___modsi3,@function .type ___modsi3,@function
___modsi3: ___modsi3:
#ifdef __v850__
add -12,sp add -12,sp
st.w r31,8[sp] st.w r31,8[sp]
st.w r7,4[sp] st.w r7,4[sp]
...@@ -199,6 +248,15 @@ ___modsi3: ...@@ -199,6 +248,15 @@ ___modsi3:
ld.w 8[sp],r31 ld.w 8[sp],r31
add 12,sp add 12,sp
jmp [r31] jmp [r31]
#else /* defined(__v850e__) */
/* See comments at end of __mulsi3. */
div r7, r6, r10
jmp [r31]
#endif /* __v850e__ */
.size ___modsi3,.-___modsi3 .size ___modsi3,.-___modsi3
#endif /* L_modsi3 */ #endif /* L_modsi3 */
...@@ -1642,3 +1700,186 @@ __callt_return_r31c: .short ctoff(.L_callt_return_r31c) ...@@ -1642,3 +1700,186 @@ __callt_return_r31c: .short ctoff(.L_callt_return_r31c)
#endif #endif
#endif /* __v850e__ */ #endif /* __v850e__ */
/* libgcc2 routines for NEC V850. */
/* Double Integer Arithmetical Operation. */
#ifdef L_negdi2
.text
.global ___negdi2
.type ___negdi2, @function
___negdi2:
not r6, r10
add 1, r10
setf l, r6
not r7, r11
add r6, r11
jmp [lp]
.size ___negdi2,.-___negdi2
#endif
#ifdef L_cmpdi2
.text
.global ___cmpdi2
.type ___cmpdi2,@function
___cmpdi2:
# Signed comparison bitween each high word.
cmp r9, r7
be .L_cmpdi_cmp_low
setf ge, r10
setf gt, r6
add r6, r10
jmp [lp]
.L_cmpdi_cmp_low:
# Unsigned comparigon bitween each low word.
cmp r8, r6
setf nl, r10
setf h, r6
add r6, r10
jmp [lp]
.size ___cmpdi2, . - ___cmpdi2
#endif
#ifdef L_ucmpdi2
.text
.global ___ucmpdi2
.type ___ucmpdi2,@function
___ucmpdi2:
cmp r9, r7 # Check if each high word are same.
be .L_ucmpdi_check_psw
cmp r8, r6 # Compare the word.
.L_ucmpdi_check_psw:
setf nl, r10 #
setf h, r6 #
add r6, r10 # Add the result of comparison NL and comparison H.
jmp [lp]
.size ___ucmpdi2, . - ___ucmpdi2
#endif
#ifdef L_muldi3
.text
.global ___muldi3
.type ___muldi3,@function
___muldi3:
#ifdef __v850__
jarl __save_r26_r31, r10
addi 16, sp, sp
mov r6, r5
shr 15, r5
movea lo(32767), r0, r14
and r14, r5
mov r8, r10
shr 15, r10
and r14, r10
mov r6, r19
shr 30, r19
mov r7, r12
shl 2, r12
or r12, r19
and r14, r19
mov r8, r13
shr 30, r13
mov r9, r12
shl 2, r12
or r12, r13
and r14, r13
mov r7, r11
shr 13, r11
and r14, r11
mov r9, r31
shr 13, r31
and r14, r31
mov r7, r29
shr 28, r29
and r14, r29
mov r9, r12
shr 28, r12
and r14, r12
and r14, r6
and r14, r8
mov r6, r14
mulh r8, r14
mov r6, r16
mulh r10, r16
mov r6, r18
mulh r13, r18
mov r6, r15
mulh r31, r15
mulh r12, r6
mov r5, r17
mulh r10, r17
add -16, sp
mov r5, r12
mulh r8, r12
add r17, r18
mov r5, r17
mulh r31, r17
add r12, r16
mov r5, r12
mulh r13, r12
add r17, r6
mov r19, r17
add r12, r15
mov r19, r12
mulh r8, r12
mulh r10, r17
add r12, r18
mov r19, r12
mulh r13, r12
add r17, r15
mov r11, r13
mulh r8, r13
add r12, r6
mov r11, r12
mulh r10, r12
add r13, r15
mulh r29, r8
add r12, r6
mov r16, r13
shl 15, r13
add r14, r13
mov r18, r12
shl 30, r12
mov r13, r26
add r12, r26
shr 15, r14
movhi hi(131071), r0, r12
movea lo(131071), r12, r13
and r13, r14
mov r16, r12
and r13, r12
add r12, r14
mov r18, r12
shl 15, r12
and r13, r12
add r12, r14
shr 17, r14
shr 17, r16
add r14, r16
shl 13, r15
shr 2, r18
add r18, r15
add r15, r16
mov r16, r27
add r8, r6
shl 28, r6
add r6, r27
mov r26, r10
mov r27, r11
jr __return_r26_r31
#endif /* __v850__ */
#if defined(__v850e__) || defined(__v850ea__)
/* (Ahi << 32 + Alo) * (Bhi << 32 + Blo) */
/* r7 r6 r9 r8 */
mov r8, r10
mulu r7, r8, r0 /* Ahi * Blo */
mulu r6, r9, r0 /* Alo * Bhi */
mulu r6, r10, r11 /* Alo * Blo */
add r8, r11
add r9, r11
jmp [r31]
#endif /* defined(__v850e__) || defined(__v850ea__) */
.size ___muldi3, . - ___muldi3
#endif
...@@ -56,7 +56,11 @@ LIB1ASMFUNCS = _mulsi3 \ ...@@ -56,7 +56,11 @@ LIB1ASMFUNCS = _mulsi3 \
_callt_save_all_interrupt \ _callt_save_all_interrupt \
_callt_save_r2_r29 \ _callt_save_r2_r29 \
_callt_save_r2_r31 \ _callt_save_r2_r31 \
_callt_save_r6_r9 _callt_save_r6_r9 \
_negdi2 \
_cmpdi2 \
_ucmpdi2 \
_muldi3
# We want fine grained libraries, so use the new code to build the # We want fine grained libraries, so use the new code to build the
# floating point emulation libraries. # floating point emulation libraries.
...@@ -76,9 +80,12 @@ fp-bit.c: $(srcdir)/config/fp-bit.c ...@@ -76,9 +80,12 @@ fp-bit.c: $(srcdir)/config/fp-bit.c
echo '#endif' >> fp-bit.c echo '#endif' >> fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c cat $(srcdir)/config/fp-bit.c >> fp-bit.c
TCFLAGS = -Wa,-mwarn-signed-overflow -Wa,-mwarn-unsigned-overflow # Create target-specific versions of the libraries
# Create non-target specific versions of the libraries MULTILIB_OPTIONS = mv850/mv850e
TCFLAGS += -mno-app-regs -msmall-sld -mv850 -D__v850e__ -Wa,-mv850any MULTILIB_DIRNAMES = v850 v850e
INSTALL_LIBGCC = install-multilib
TCFLAGS = -mno-app-regs -msmall-sld -Wa,-mwarn-signed-overflow -Wa,-mwarn-unsigned-overflow
v850-c.o: $(srcdir)/config/v850/v850-c.c $(RTL_H) $(TREE_H) $(CONFIG_H) v850-c.o: $(srcdir)/config/v850/v850-c.c $(RTL_H) $(TREE_H) $(CONFIG_H)
$(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $<
......
/* Prototypes for v850.c functions used in the md file & elsewhere. /* Prototypes for v850.c functions used in the md file & elsewhere.
Copyright (C) 1999, 2000 Free Software Foundation, Inc. Copyright (C) 1999, 2000, 2002 Free Software Foundation, Inc.
This file is part of GNU CC. This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option) the Free Software Foundation; either version 2, or (at your option)
any later version. any later version.
GNU CC is distributed in the hope that it will be useful, GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330, the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */ Boston, MA 02111-1307, USA. */
/* Function prototypes that cannot exist in v850.h due to dependency /* Function prototypes that cannot exist in v850.h due to dependency
complications. */ complications. */
...@@ -53,6 +53,8 @@ extern void notice_update_cc PARAMS ((rtx, rtx)); ...@@ -53,6 +53,8 @@ extern void notice_update_cc PARAMS ((rtx, rtx));
extern char * construct_save_jarl PARAMS ((rtx)); extern char * construct_save_jarl PARAMS ((rtx));
extern char * construct_restore_jr PARAMS ((rtx)); extern char * construct_restore_jr PARAMS ((rtx));
#ifdef HAVE_MACHINE_MODES #ifdef HAVE_MACHINE_MODES
extern int reg_or_int9_operand PARAMS ((rtx, Mmode));
extern int reg_or_const_operand PARAMS ((rtx, Mmode));
extern char * construct_dispose_instruction PARAMS ((rtx)); extern char * construct_dispose_instruction PARAMS ((rtx));
extern char * construct_prepare_instruction PARAMS ((rtx)); extern char * construct_prepare_instruction PARAMS ((rtx));
extern int pattern_is_ok_for_prepare PARAMS ((rtx, Mmode)); extern int pattern_is_ok_for_prepare PARAMS ((rtx, Mmode));
......
...@@ -3,22 +3,22 @@ ...@@ -3,22 +3,22 @@
Free Software Foundation, Inc. Free Software Foundation, Inc.
Contributed by Jeff Law (law@cygnus.com). Contributed by Jeff Law (law@cygnus.com).
This file is part of GNU CC. This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify GNU CC is free software; you can redistribute it and/or modify it
it under the terms of the GNU General Public License as published by under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option) the Free Software Foundation; either version 2, or (at your option)
any later version. any later version.
GNU CC is distributed in the hope that it will be useful, GNU CC is distributed in the hope that it will be useful, but WITHOUT
but WITHOUT ANY WARRANTY; without even the implied warranty of ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
GNU General Public License for more details. for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to along with GNU CC; see the file COPYING. If not, write to the Free
the Free Software Foundation, 59 Temple Place - Suite 330, Software Foundation, 59 Temple Place - Suite 330, Boston, MA
Boston, MA 02111-1307, USA. */ 02111-1307, USA. */
#include "config.h" #include "config.h"
#include "system.h" #include "system.h"
......
...@@ -3,22 +3,22 @@ ...@@ -3,22 +3,22 @@
Free Software Foundation, Inc. Free Software Foundation, Inc.
Contributed by Jeff Law (law@cygnus.com). Contributed by Jeff Law (law@cygnus.com).
This file is part of GNU CC. This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option) the Free Software Foundation; either version 2, or (at your option)
any later version. any later version.
GNU CC is distributed in the hope that it will be useful, GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330, the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */ Boston, MA 02111-1307, USA. */
#ifndef GCC_V850_H #ifndef GCC_V850_H
#define GCC_V850_H #define GCC_V850_H
...@@ -86,6 +86,7 @@ extern int target_flags; ...@@ -86,6 +86,7 @@ extern int target_flags;
#define MASK_BIG_SWITCH 0x00000100 #define MASK_BIG_SWITCH 0x00000100
#define MASK_NO_APP_REGS 0x00000200 #define MASK_NO_APP_REGS 0x00000200
#define MASK_DISABLE_CALLT 0x00000400 #define MASK_DISABLE_CALLT 0x00000400
#define MASK_STRICT_ALIGN 0x00000800
#define MASK_US_BIT_SET 0x00001000 #define MASK_US_BIT_SET 0x00001000
#define MASK_US_MASK_SET 0x00002000 #define MASK_US_MASK_SET 0x00002000
...@@ -145,6 +146,8 @@ extern int target_flags; ...@@ -145,6 +146,8 @@ extern int target_flags;
and r5 are to be fixed registers (for compatibility with GHS). */ and r5 are to be fixed registers (for compatibility with GHS). */
#define TARGET_NO_APP_REGS (target_flags & MASK_NO_APP_REGS) #define TARGET_NO_APP_REGS (target_flags & MASK_NO_APP_REGS)
#define TARGET_STRICT_ALIGN (target_flags & MASK_STRICT_ALIGN)
/* Macro to define tables used to set the flags. /* Macro to define tables used to set the flags.
This is a list in braces of pairs in braces, This is a list in braces of pairs in braces,
each pair being { "NAME", VALUE } each pair being { "NAME", VALUE }
...@@ -182,6 +185,9 @@ extern int target_flags; ...@@ -182,6 +185,9 @@ extern int target_flags;
{ "app-regs", -MASK_NO_APP_REGS, "" }, \ { "app-regs", -MASK_NO_APP_REGS, "" }, \
{ "no-app-regs", MASK_NO_APP_REGS, \ { "no-app-regs", MASK_NO_APP_REGS, \
N_("Do not use registers r2 and r5") }, \ N_("Do not use registers r2 and r5") }, \
{ "strict-align", MASK_STRICT_ALIGN, \
N_("Enfore strict alignment") }, \
{ "no-strict-align", -MASK_STRICT_ALIGN, "" }, \
{ "big-switch", MASK_BIG_SWITCH, \ { "big-switch", MASK_BIG_SWITCH, \
N_("Use 4 byte entries in switch tables") },\ N_("Use 4 byte entries in switch tables") },\
{ "", MASK_DEFAULT, ""}} { "", MASK_DEFAULT, ""}}
...@@ -255,6 +261,7 @@ extern struct small_memory_info small_memory[(int)SMALL_MEMORY_max]; ...@@ -255,6 +261,7 @@ extern struct small_memory_info small_memory[(int)SMALL_MEMORY_max];
#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \ #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
{ \ { \
target_flags |= MASK_STRICT_ALIGN; \
if (LEVEL) \ if (LEVEL) \
target_flags |= (MASK_EP | MASK_PROLOG_FUNCTION); \ target_flags |= (MASK_EP | MASK_PROLOG_FUNCTION); \
} }
...@@ -314,7 +321,7 @@ extern struct small_memory_info small_memory[(int)SMALL_MEMORY_max]; ...@@ -314,7 +321,7 @@ extern struct small_memory_info small_memory[(int)SMALL_MEMORY_max];
/* Define this if move instructions will actually fail to work /* Define this if move instructions will actually fail to work
when given unaligned data. */ when given unaligned data. */
#define STRICT_ALIGNMENT 1 #define STRICT_ALIGNMENT TARGET_STRICT_ALIGN
/* Define this as 1 if `char' should by default be signed; else as 0. /* Define this as 1 if `char' should by default be signed; else as 0.
...@@ -1048,8 +1055,27 @@ do { \ ...@@ -1048,8 +1055,27 @@ do { \
#define RTX_COSTS(RTX,CODE,OUTER_CODE) \ #define RTX_COSTS(RTX,CODE,OUTER_CODE) \
case MOD: \ case MOD: \
case DIV: \ case DIV: \
case UMOD: \
case UDIV: \
if (TARGET_V850E && optimize_size) \
return 6; \
return 60; \ return 60; \
case MULT: \ case MULT: \
if (TARGET_V850E \
&& ( GET_MODE (RTX) == SImode \
|| GET_MODE (RTX) == HImode \
|| GET_MODE (RTX) == QImode)) \
{ \
if (GET_CODE (XEXP (RTX, 1)) == REG) \
return 4; \
else if (GET_CODE (XEXP (RTX, 1)) == CONST_INT) \
{ \
if (CONST_OK_FOR_O (INTVAL (XEXP (RTX, 1)))) \
return 6; \
else if (CONST_OK_FOR_K (INTVAL (XEXP (RTX, 1)))) \
return 10; \
} \
} \
return 20; return 20;
/* All addressing modes have the same cost on the V850 series. */ /* All addressing modes have the same cost on the V850 series. */
...@@ -1360,6 +1386,23 @@ zbss_section () \ ...@@ -1360,6 +1386,23 @@ zbss_section () \
#define STORE_FLAG_VALUE 1 #define STORE_FLAG_VALUE 1
#define MULDI3_LIBCALL "__muldi3"
#define UCMPDI2_LIBCALL "__ucmpdi2"
#define CMPDI2_LIBCALL "__cmpdi2"
#define NEGDI2_LIBCALL "__negdi2"
#define INIT_TARGET_OPTABS \
do \
{ \
cmp_optab->handlers[(int) DImode].libfunc \
= init_one_libfunc (CMPDI2_LIBCALL); \
ucmp_optab->handlers[(int) DImode].libfunc \
= init_one_libfunc (UCMPDI2_LIBCALL); \
neg_optab->handlers[(int) DImode].libfunc \
= init_one_libfunc (NEGDI2_LIBCALL); \
} \
while (0)
/* Specify the machine mode that pointers have. /* Specify the machine mode that pointers have.
After generation of rtl, the compiler makes no further distinction After generation of rtl, the compiler makes no further distinction
between pointers and any other objects of this machine mode. */ between pointers and any other objects of this machine mode. */
...@@ -1470,6 +1513,8 @@ extern union tree_node * GHS_current_section_names [(int) COUNT_OF_GHS_SECTION_K ...@@ -1470,6 +1513,8 @@ extern union tree_node * GHS_current_section_names [(int) COUNT_OF_GHS_SECTION_K
#define PREDICATE_CODES \ #define PREDICATE_CODES \
{ "reg_or_0_operand", { REG, SUBREG, CONST_INT, CONST_DOUBLE }}, \ { "reg_or_0_operand", { REG, SUBREG, CONST_INT, CONST_DOUBLE }}, \
{ "reg_or_int5_operand", { REG, SUBREG, CONST_INT }}, \ { "reg_or_int5_operand", { REG, SUBREG, CONST_INT }}, \
{ "reg_or_int9_operand", { REG, SUBREG, CONST_INT }}, \
{ "reg_or_const_operand", { REG, CONST_INT }}, \
{ "call_address_operand", { REG, SYMBOL_REF }}, \ { "call_address_operand", { REG, SYMBOL_REF }}, \
{ "movsi_source_operand", { LABEL_REF, SYMBOL_REF, CONST_INT, \ { "movsi_source_operand", { LABEL_REF, SYMBOL_REF, CONST_INT, \
CONST_DOUBLE, CONST, HIGH, MEM, \ CONST_DOUBLE, CONST, HIGH, MEM, \
......
...@@ -409,7 +409,6 @@ ...@@ -409,7 +409,6 @@
(define_insn "mulsi3" (define_insn "mulsi3"
[(set (match_operand:SI 0 "register_operand" "=r") [(set (match_operand:SI 0 "register_operand" "=r")
(mult:SI (match_operand:SI 1 "register_operand" "%0") (mult:SI (match_operand:SI 1 "register_operand" "%0")
;; %redact changeone /reg_or_int9/ 'register' unless nec-no-copyright
(match_operand:SI 2 "reg_or_int9_operand" "rO")))] (match_operand:SI 2 "reg_or_int9_operand" "rO")))]
"TARGET_V850E" "TARGET_V850E"
"mul %2,%1,%." "mul %2,%1,%."
...@@ -860,9 +859,7 @@ ...@@ -860,9 +859,7 @@
(if_then_else:SI (if_then_else:SI
(match_operator 1 "comparison_operator" (match_operator 1 "comparison_operator"
[(match_dup 4) (match_dup 5)]) [(match_dup 4) (match_dup 5)])
;; %redact changeone /const/ 'int5' unless nec-no-copyright
(match_operand:SI 2 "reg_or_const_operand" "rJ") (match_operand:SI 2 "reg_or_const_operand" "rJ")
;; %redact changeone /const/ '0' unless nec-no-copyright
(match_operand:SI 3 "reg_or_const_operand" "rI")))] (match_operand:SI 3 "reg_or_const_operand" "rI")))]
"TARGET_V850E" "TARGET_V850E"
" "
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment