Commit 82a197a2 by Zhenqiang Chen Committed by Zhenqiang Chen

arm.c (arm_v7m_tune): Set max_insns_skipped to 2.

ChangeLog:
2014-01-17  Zhenqiang Chen  <zhenqiang.chen@arm.com>

	* config/arm/arm.c (arm_v7m_tune): Set max_insns_skipped to 2.
	(thumb2_final_prescan_insn): Set max to MAX_INSN_PER_IT_BLOCK.

testsuite/ChangeLog:
2014-01-17  Zhenqiang Chen  <zhenqiang.chen@arm.com>

	* gcc.target/arm/its.c: New test.

From-SVN: r206698
parent c68b3f52
2014-01-17 Zhenqiang Chen <zhenqiang.chen@arm.com>
* config/arm/arm.c (arm_v7m_tune): Set max_insns_skipped to 2.
(thumb2_final_prescan_insn): Set max to MAX_INSN_PER_IT_BLOCK.
2014-01-16 Ilya Enkovich <ilya.enkovich@intel.com> 2014-01-16 Ilya Enkovich <ilya.enkovich@intel.com>
* ipa-ref.c (ipa_remove_stmt_references): Fix references * ipa-ref.c (ipa_remove_stmt_references): Fix references
......
...@@ -1696,7 +1696,7 @@ const struct tune_params arm_v7m_tune = ...@@ -1696,7 +1696,7 @@ const struct tune_params arm_v7m_tune =
&v7m_extra_costs, &v7m_extra_costs,
NULL, /* Sched adj cost. */ NULL, /* Sched adj cost. */
1, /* Constant limit. */ 1, /* Constant limit. */
5, /* Max cond insns. */ 2, /* Max cond insns. */
ARM_PREFETCH_NOT_BENEFICIAL, ARM_PREFETCH_NOT_BENEFICIAL,
true, /* Prefer constant pool. */ true, /* Prefer constant pool. */
arm_cortex_m_branch_cost, arm_cortex_m_branch_cost,
...@@ -22138,11 +22138,11 @@ thumb2_final_prescan_insn (rtx insn) ...@@ -22138,11 +22138,11 @@ thumb2_final_prescan_insn (rtx insn)
int mask; int mask;
int max; int max;
/* Maximum number of conditionally executed instructions in a block /* max_insns_skipped in the tune was already taken into account in the
is minimum of the two max values: maximum allowed in an IT block cost model of ifcvt pass when generating COND_EXEC insns. At this stage
and maximum that is beneficial according to the cost model and tune. */ just emit the IT blocks as we can. It does not make sense to split
max = (max_insns_skipped < MAX_INSN_PER_IT_BLOCK) ? the IT blocks. */
max_insns_skipped : MAX_INSN_PER_IT_BLOCK; max = MAX_INSN_PER_IT_BLOCK;
/* Remove the previous insn from the count of insns to be output. */ /* Remove the previous insn from the count of insns to be output. */
if (arm_condexec_count) if (arm_condexec_count)
......
2014-01-17 Zhenqiang Chen <zhenqiang.chen@arm.com>
* gcc.target/arm/its.c: New testcase.
2014-01-16 Jan Hubicka <jh@suse.cz> 2014-01-16 Jan Hubicka <jh@suse.cz>
PR ipa/59775 PR ipa/59775
......
/* { dg-do compile } */
/* { dg-options "-O2" } */
int test (int a, int b)
{
int r;
if (a > 10)
{
r = a - b;
r += 10;
}
else
{
r = b - a;
r -= 7;
}
if (r > 0)
r -= 3;
return r;
}
/* { dg-final { scan-assembler-times "\tit" 2 { target arm_thumb2 } } } */
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