lra: Clobbers in a parallel are earlyclobbers (PR83245)

The documentation (rtl.texi) says:

  When a @code{clobber} expression for a register appears inside a
  @code{parallel} with other side effects, the register allocator
  guarantees that the register is unoccupied both before and after that
  insn if it is a hard register clobber.

and at least the rs6000 backend relies on that (see PR83245).  This
patch restores that behaviour.

Registers that are also used as operands in the instruction are not
treated as earlyclobber, so such insns also still work (PR80818, an
s390 testcase).


	PR rtl-optimization/83245
	* lra.c (collect_non_operand_hard_regs): Treat clobbers of non-operand
	hard registers as earlyclobber, also if not in an asm.

From-SVN: r255377

gcc/ChangeLog

 2017-12-04  Segher Boessenkool  <segher@kernel.crashing.org>
 
+	PR rtl-optimization/83245
+	* lra.c (collect_non_operand_hard_regs): Treat clobbers of non-operand
+	hard registers as earlyclobber, also if not in an asm.
+
+2017-12-04  Segher Boessenkool  <segher@kernel.crashing.org>
+
 	PR bootstrap/83265
 	Revert
 	2017-12-01  Segher Boessenkool  <segher@kernel.crashing.org>

gcc/lra.c

@@ -888,14 +888,10 @@ collect_non_operand_hard_regs (rtx_insn *insn, rtx *x,
 					    list, OP_IN, false);
       break;
     case CLOBBER:
-      {
-	int code = INSN_CODE (insn);
-	/* We treat clobber of non-operand hard registers as early
-	   clobber (the behavior is expected from asm).  */
+      /* We treat clobber of non-operand hard registers as early clobber.  */
       list = collect_non_operand_hard_regs (insn, &XEXP (op, 0), data,
-					      list, OP_OUT, code < 0);
+					    list, OP_OUT, true);
       break;
-      }
     case PRE_INC: case PRE_DEC: case POST_INC: case POST_DEC:
       list = collect_non_operand_hard_regs (insn, &XEXP (op, 0), data,
 					    list, OP_INOUT, false);