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riscv-gcc-1
Commit 80225b66 by Torbjorn Granlund
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(emit_move_sequence): Add missing argument to symbolic_operand. 

(output_block_move): Prefer addl to add.
(print_operand): Print fp regs with L suffix when appropriate.
(output_arg_descriptor): Rewrite to accomodate new convention for
USE information.
(compute_frame_size): Update for changed register numbers.
Simplify loops over general registers to stop at register 4.
(hppa_expand_prologue): Likewise.
(hppa_expand_epilogue): Likewise.

From-SVN: r7411
parent e65f61cf
Showing with 48 additions and 100 deletions
gcc/config/pa/pa.c
...@@ -837,7 +837,7 @@ emit_move_sequence (operands, mode, scratch_reg) ...@@ -837,7 +837,7 @@ emit_move_sequence (operands, mode, scratch_reg)
|| (GET_CODE (operand1) == CONST_INT && INT_14_BITS (operand1)) || (GET_CODE (operand1) == CONST_INT && INT_14_BITS (operand1))
|| (operand1 == CONST0_RTX (mode)) || (operand1 == CONST0_RTX (mode))
|| (GET_CODE (operand1) == HIGH || (GET_CODE (operand1) == HIGH
&& !symbolic_operand (XEXP (operand1, 0))) && !symbolic_operand (XEXP (operand1, 0), VOIDmode))
/* Only `general_operands' can come here, so MEM is ok. */ /* Only `general_operands' can come here, so MEM is ok. */
|| GET_CODE (operand1) == MEM) || GET_CODE (operand1) == MEM)
{ {
...@@ -1515,7 +1515,7 @@ output_block_move (operands, size_is_constant) ...@@ -1515,7 +1515,7 @@ output_block_move (operands, size_is_constant)
output_asm_insn ("ldw 0(0,%1),%3", operands); output_asm_insn ("ldw 0(0,%1),%3", operands);
/* Make %0 point at the first byte after the destination block. */ /* Make %0 point at the first byte after the destination block. */
output_asm_insn ("add %2,%0,%0", operands); output_asm_insn ("addl %2,%0,%0", operands);
/* Store the leftmost bytes, up to, but not including, the address /* Store the leftmost bytes, up to, but not including, the address
in %0. */ in %0. */
output_asm_insn ("stbys,e %3,0(0,%0)", operands); output_asm_insn ("stbys,e %3,0(0,%0)", operands);
...@@ -1944,35 +1944,28 @@ compute_frame_size (size, fregs_live) ...@@ -1944,35 +1944,28 @@ compute_frame_size (size, fregs_live)
we need to add this in because of STARTING_FRAME_OFFSET. */ we need to add this in because of STARTING_FRAME_OFFSET. */
fsize = size + (size || frame_pointer_needed ? 8 : 0); fsize = size + (size || frame_pointer_needed ? 8 : 0);
for (i = 18; i >= 3; i--) for (i = 18; i >= 4; i--)
{ {
/* fp is stored in a special place. */ if (regs_ever_live[i])
if (regs_ever_live[i]
&& (i != FRAME_POINTER_REGNUM || !frame_pointer_needed))
fsize += 4; fsize += 4;
} }
fsize = (fsize + 7) & ~7; /* If we don't have a frame pointer, the register normally used for that
purpose is saved just like other registers, not in the "frame marker". */
if (!TARGET_SNAKE) if (! frame_pointer_needed)
{
for (i = 43; i >= 40; i--)
if (regs_ever_live[i])
{ {
fsize += 8; if (regs_ever_live[FRAME_POINTER_REGNUM])
if (fregs_live) fsize += 4;
*fregs_live = 1;
}
} }
else fsize = (fsize + 7) & ~7;
{
for (i = 78; i >= 60; i -= 2) for (i = 66; i >= 48; i -= 2)
if (regs_ever_live[i] || regs_ever_live[i + 1]) if (regs_ever_live[i] || regs_ever_live[i + 1])
{ {
fsize += 8; fsize += 8;
if (fregs_live) if (fregs_live)
*fregs_live = 1; *fregs_live = 1;
} }
}
fsize += current_function_outgoing_args_size; fsize += current_function_outgoing_args_size;
if (! leaf_function_p () || fsize) if (! leaf_function_p () || fsize)
fsize += 32; fsize += 32;
...@@ -2030,14 +2023,12 @@ output_function_prologue (file, size) ...@@ -2030,14 +2023,12 @@ output_function_prologue (file, size)
void void
hppa_expand_prologue() hppa_expand_prologue()
{ {
extern char call_used_regs[]; extern char call_used_regs[];
int size = get_frame_size (); int size = get_frame_size ();
int merge_sp_adjust_with_store = 0; int merge_sp_adjust_with_store = 0;
int i, offset; int i, offset;
rtx tmpreg, size_rtx; rtx tmpreg, size_rtx;
gr_saved = 0; gr_saved = 0;
fr_saved = 0; fr_saved = 0;
save_fregs = 0; save_fregs = 0;
...@@ -2165,9 +2156,8 @@ hppa_expand_prologue() ...@@ -2165,9 +2156,8 @@ hppa_expand_prologue()
was done earlier. */ was done earlier. */
if (frame_pointer_needed) if (frame_pointer_needed)
{ {
for (i = 18, offset = local_fsize; i >= 3; i--) for (i = 18, offset = local_fsize; i >= 4; i--)
if (regs_ever_live[i] && ! call_used_regs[i] if (regs_ever_live[i] && ! call_used_regs[i])
&& i != FRAME_POINTER_REGNUM)
{ {
store_reg (i, offset, FRAME_POINTER_REGNUM); store_reg (i, offset, FRAME_POINTER_REGNUM);
offset += 4; offset += 4;
...@@ -2221,20 +2211,7 @@ hppa_expand_prologue() ...@@ -2221,20 +2211,7 @@ hppa_expand_prologue()
set_reg_plus_d (1, STACK_POINTER_REGNUM, offset); set_reg_plus_d (1, STACK_POINTER_REGNUM, offset);
/* Now actually save the FP registers. */ /* Now actually save the FP registers. */
if (! TARGET_SNAKE) for (i = 66; i >= 48; i -= 2)
{
for (i = 43; i >= 40; i--)
if (regs_ever_live[i])
{
emit_move_insn (gen_rtx (MEM, DFmode,
gen_rtx (POST_INC, DFmode, tmpreg)),
gen_rtx (REG, DFmode, i));
fr_saved++;
}
}
else
{
for (i = 78; i >= 60; i -= 2)
if (regs_ever_live[i] || regs_ever_live[i + 1]) if (regs_ever_live[i] || regs_ever_live[i + 1])
{ {
emit_move_insn (gen_rtx (MEM, DFmode, emit_move_insn (gen_rtx (MEM, DFmode,
...@@ -2243,7 +2220,6 @@ hppa_expand_prologue() ...@@ -2243,7 +2220,6 @@ hppa_expand_prologue()
fr_saved++; fr_saved++;
} }
} }
}
} }
...@@ -2306,9 +2282,8 @@ hppa_expand_epilogue () ...@@ -2306,9 +2282,8 @@ hppa_expand_epilogue ()
/* General register restores. */ /* General register restores. */
if (frame_pointer_needed) if (frame_pointer_needed)
{ {
for (i = 18, offset = local_fsize; i >= 3; i--) for (i = 18, offset = local_fsize; i >= 4; i--)
if (regs_ever_live[i] && ! call_used_regs[i] if (regs_ever_live[i] && ! call_used_regs[i])
&& i != FRAME_POINTER_REGNUM)
{ {
load_reg (i, offset, FRAME_POINTER_REGNUM); load_reg (i, offset, FRAME_POINTER_REGNUM);
offset += 4; offset += 4;
...@@ -2345,23 +2320,12 @@ hppa_expand_epilogue () ...@@ -2345,23 +2320,12 @@ hppa_expand_epilogue ()
set_reg_plus_d (1, STACK_POINTER_REGNUM, offset); set_reg_plus_d (1, STACK_POINTER_REGNUM, offset);
/* Actually do the restores now. */ /* Actually do the restores now. */
if (! TARGET_SNAKE) for (i = 66; i >= 48; i -= 2)
{
for (i = 43; i >= 40; i--)
if (regs_ever_live[i])
emit_move_insn (gen_rtx (REG, DFmode, i),
gen_rtx (MEM, DFmode,
gen_rtx (POST_INC, DFmode, tmpreg)));
}
else
{
for (i = 78; i >= 60; i -= 2)
if (regs_ever_live[i] || regs_ever_live[i + 1]) if (regs_ever_live[i] || regs_ever_live[i + 1])
emit_move_insn (gen_rtx (REG, DFmode, i), emit_move_insn (gen_rtx (REG, DFmode, i),
gen_rtx (MEM, DFmode, gen_rtx (MEM, DFmode,
gen_rtx (POST_INC, DFmode, tmpreg))); gen_rtx (POST_INC, DFmode, tmpreg)));
} }
}
/* No frame pointer, but we have a stack greater than 8k. We restore /* No frame pointer, but we have a stack greater than 8k. We restore
%r2 very late in this case. (All other cases are restored as early %r2 very late in this case. (All other cases are restored as early
...@@ -2878,7 +2842,12 @@ print_operand (file, x, code) ...@@ -2878,7 +2842,12 @@ print_operand (file, x, code)
abort (); abort ();
} }
if (GET_CODE (x) == REG) if (GET_CODE (x) == REG)
{
if (FP_REG_P (x) && GET_MODE_SIZE (GET_MODE (x)) <= 4 && (REGNO (x) & 1) == 0)
fprintf (file, "%sL", reg_names [REGNO (x)]);
else
fprintf (file, "%s", reg_names [REGNO (x)]); fprintf (file, "%s", reg_names [REGNO (x)]);
}
else if (GET_CODE (x) == MEM) else if (GET_CODE (x) == MEM)
{ {
int size = GET_MODE_SIZE (GET_MODE (x)); int size = GET_MODE_SIZE (GET_MODE (x));
...@@ -3164,12 +3133,12 @@ output_mod_insn (unsignedp, insn) ...@@ -3164,12 +3133,12 @@ output_mod_insn (unsignedp, insn)
} }
void void
output_arg_descriptor (insn) output_arg_descriptor (call_insn)
rtx insn; rtx call_insn;
{ {
char *arg_regs[4]; char *arg_regs[4];
enum machine_mode arg_mode; enum machine_mode arg_mode;
rtx prev_insn; rtx link;
int i, output_flag = 0; int i, output_flag = 0;
int regno; int regno;
...@@ -3185,64 +3154,43 @@ output_arg_descriptor (insn) ...@@ -3185,64 +3154,43 @@ output_arg_descriptor (insn)
return; return;
} }
for (prev_insn = PREV_INSN (insn); GET_CODE (prev_insn) == INSN; if (GET_CODE (call_insn) != CALL_INSN)
prev_insn = PREV_INSN (prev_insn)) abort ();
for (link = CALL_INSN_FUNCTION_USAGE (call_insn); link; link = XEXP (link, 1))
{ {
/* Terminate search for arguments if a non-USE insn is encountered rtx use = XEXP (link, 0);
or a USE insn which does not specify an argument, STATIC_CHAIN,
or STRUCT_VALUE register. */
if (!(GET_CODE (PATTERN (prev_insn)) == USE
&& GET_CODE (XEXP (PATTERN (prev_insn), 0)) == REG
&& (FUNCTION_ARG_REGNO_P (REGNO (XEXP (PATTERN (prev_insn), 0)))
|| REGNO (XEXP (PATTERN (prev_insn), 0)) == STATIC_CHAIN_REGNUM
|| REGNO (XEXP (PATTERN (prev_insn), 0))
== STRUCT_VALUE_REGNUM)))
break;
/* If this is a USE for the STATIC_CHAIN or STRUCT_VALUE register, if (! (GET_CODE (use) == USE
then skip it and continue the loop since those are not encoded && GET_CODE (XEXP (use, 0)) == REG
in the argument relocation bits. */ && FUNCTION_ARG_REGNO_P (REGNO (XEXP (use, 0)))))
if (REGNO (XEXP (PATTERN (prev_insn), 0)) == STATIC_CHAIN_REGNUM
|| REGNO (XEXP (PATTERN (prev_insn), 0)) == STRUCT_VALUE_REGNUM)
continue; continue;
arg_mode = GET_MODE (XEXP (PATTERN (prev_insn), 0)); arg_mode = GET_MODE (XEXP (use, 0));
regno = REGNO (XEXP (PATTERN (prev_insn), 0)); regno = REGNO (XEXP (use, 0));
if (regno >= 23 && regno <= 26) if (regno >= 23 && regno <= 26)
{ {
arg_regs[26 - regno] = "GR"; arg_regs[26 - regno] = "GR";
if (arg_mode == DImode) if (arg_mode == DImode)
arg_regs[25 - regno] = "GR"; arg_regs[25 - regno] = "GR";
} }
else if (!TARGET_SNAKE) /* fp args */ else if (regno >= 32 && regno <= 39)
{ {
if ((regno & 1) != 0)
abort ();
if (arg_mode == SFmode) if (arg_mode == SFmode)
arg_regs[regno - 32] = "FR"; arg_regs[(regno - 32) / 2] = "FR";
else else if (arg_mode == DFmode)
{ {
#ifndef HP_FP_ARG_DESCRIPTOR_REVERSED #ifndef HP_FP_ARG_DESCRIPTOR_REVERSED
arg_regs[regno - 33] = "FR"; arg_regs[(regno - 34) / 2] = "FR";
arg_regs[regno - 32] = "FU"; arg_regs[(regno - 34) / 2 + 1] = "FU";
#else #else
arg_regs[regno - 33] = "FU"; arg_regs[(regno - 34) / 2] = "FU";
arg_regs[regno - 32] = "FR"; arg_regs[(regno - 34) / 2 + 1] = "FR";
#endif #endif
} }
}
else else
{ abort ();
if (arg_mode == SFmode)
arg_regs[(regno - 44) / 2] = "FR";
else
{
#ifndef HP_FP_ARG_DESCRIPTOR_REVERSED
arg_regs[(regno - 46) / 2] = "FR";
arg_regs[(regno - 46) / 2 + 1] = "FU";
#else
arg_regs[(regno - 46) / 2] = "FU";
arg_regs[(regno - 46) / 2 + 1] = "FR";
#endif
}
} }
} }
fputs ("\t.CALL ", asm_out_file); fputs ("\t.CALL ", asm_out_file);
...@@ -3848,7 +3796,7 @@ function_label_operand (op, mode) ...@@ -3848,7 +3796,7 @@ function_label_operand (op, mode)
/* Returns 1 if the 6 operands specified in OPERANDS are suitable for /* Returns 1 if the 6 operands specified in OPERANDS are suitable for
use in fmpyadd instructions. */ use in fmpyadd instructions. */
int int
fmpyaddoperands(operands) fmpyaddoperands (operands)
rtx *operands; rtx *operands;
{ {
enum machine_mode mode = GET_MODE (operands[0]); enum machine_mode mode = GET_MODE (operands[0]);
...@@ -3890,7 +3838,7 @@ fmpyaddoperands(operands) ...@@ -3890,7 +3838,7 @@ fmpyaddoperands(operands)
/* Returns 1 if the 6 operands specified in OPERANDS are suitable for /* Returns 1 if the 6 operands specified in OPERANDS are suitable for
use in fmpysub instructions. */ use in fmpysub instructions. */
int int
fmpysuboperands(operands) fmpysuboperands (operands)
rtx *operands; rtx *operands;
{ {
enum machine_mode mode = GET_MODE (operands[0]); enum machine_mode mode = GET_MODE (operands[0]);
......
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