re PR target/43067 (ICE: SIGSEGV with -fschedule-insns -mxop)

	PR target/43067
	* config/i386/sse.md (xop_mulv2div2di3_low): Change type
	attribute to ssemul.
	(xop_mulv2div2di3_high): Ditto.

testsuite/ChangeLog:

	PR target/43067
	* gcc.target/i386/pr43067.c: New test.

From-SVN: r156929

gcc/ChangeLog

+2010-02-20  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/43067
+	* config/i386/sse.md (xop_mulv2div2di3_low): Change type
+	attribute to ssemul.
+	(xop_mulv2div2di3_high): Ditto.
+
 2010-02-20  Manuel López-Ibáñez  <manu@gcc.gnu.org>
 
 	PR c++/35669

gcc/config/i386/sse.md

@@ -10422,7 +10422,7 @@
 {
   operands[3] = CONST0_RTX (V2DImode);
 }
-  [(set_attr "type" "ssemuladd")
+  [(set_attr "type" "ssemul")
    (set_attr "mode" "TI")])
 
 (define_insn "xop_pmacsdqh"
@@ -10484,7 +10484,7 @@
 {
   operands[3] = CONST0_RTX (V2DImode);
 }
-  [(set_attr "type" "ssemuladd")
+  [(set_attr "type" "ssemul")
    (set_attr "mode" "TI")])
 
 ;; XOP parallel integer multiply/add instructions for the intrinisics

gcc/testsuite/ChangeLog

+2010-02-20  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/43067
+	* gcc.target/i386/pr43067.c: New test.
+
 2010-02-20  Manuel López-Ibáñez  <manu@gcc.gnu.org>
 
 	PR c++/35669

gcc/testsuite/gcc.target/i386/pr43067.c

+/* { dg-do compile } */
+/* { dg-options "-O1 -mxop -ftree-vectorize -fschedule-insns" } */
+
+union {
+  int i32[10240];
+  long long i64[10240];
+} a, b, c;
+
+void imul32_to_64 (void)
+{
+  int i;
+
+  for (i = 0; i < 10240; i++)
+    a.i64[i] = (long long) b.i32[i] * c.i32[i];
+}