Commit 78a5d727 by Richard Earnshaw Committed by Richard Earnshaw

arm.md (movqi): On thumb when optimizing...

	* arm.md (movqi): On thumb when optimizing, handle loading from
	memory by describing this as taking a subreg of a zero-extended load
	into an SImode register.
	(movhi): Likewise.

From-SVN: r104836
parent 3c993f84
2005-09-30 Richard Earnshaw <richard.earnshaw@arm.com>
* arm.md (movqi): On thumb when optimizing, handle loading from
memory by describing this as taking a subreg of a zero-extended load
into an SImode register.
(movhi): Likewise.
2005-09-30 Daniel Jacobowitz <dan@codesourcery.com> 2005-09-30 Daniel Jacobowitz <dan@codesourcery.com>
* reload1.c (merge_assigned_reloads): Do not change any * reload1.c (merge_assigned_reloads): Do not change any
......
...@@ -4729,8 +4729,13 @@ ...@@ -4729,8 +4729,13 @@
{ {
if (!no_new_pseudos) if (!no_new_pseudos)
{ {
if (GET_CODE (operands[0]) != REG) if (GET_CODE (operands[1]) == CONST_INT)
operands[1] = force_reg (HImode, operands[1]); {
rtx reg = gen_reg_rtx (SImode);
emit_insn (gen_movsi (reg, operands[1]));
operands[1] = gen_lowpart (HImode, reg);
}
/* ??? We shouldn't really get invalid addresses here, but this can /* ??? We shouldn't really get invalid addresses here, but this can
happen if we are passed a SP (never OK for HImode/QImode) or happen if we are passed a SP (never OK for HImode/QImode) or
...@@ -4753,11 +4758,23 @@ ...@@ -4753,11 +4758,23 @@
operands[1] operands[1]
= replace_equiv_address (operands[1], = replace_equiv_address (operands[1],
copy_to_reg (XEXP (operands[1], 0))); copy_to_reg (XEXP (operands[1], 0)));
if (GET_CODE (operands[1]) == MEM && optimize > 0)
{
rtx reg = gen_reg_rtx (SImode);
emit_insn (gen_zero_extendhisi2 (reg, operands[1]));
operands[1] = gen_lowpart (HImode, reg);
}
if (GET_CODE (operands[0]) == MEM)
operands[1] = force_reg (HImode, operands[1]);
} }
/* Handle loading a large integer during reload. */
else if (GET_CODE (operands[1]) == CONST_INT else if (GET_CODE (operands[1]) == CONST_INT
&& !CONST_OK_FOR_THUMB_LETTER (INTVAL (operands[1]), 'I')) && !CONST_OK_FOR_THUMB_LETTER (INTVAL (operands[1]), 'I'))
{ {
/* Handle loading a large integer during reload. */
/* Writing a constant to memory needs a scratch, which should /* Writing a constant to memory needs a scratch, which should
be handled with SECONDARY_RELOADs. */ be handled with SECONDARY_RELOADs. */
gcc_assert (GET_CODE (operands[0]) == REG); gcc_assert (GET_CODE (operands[0]) == REG);
...@@ -4938,8 +4955,6 @@ ...@@ -4938,8 +4955,6 @@
(match_operand:QI 1 "general_operand" ""))] (match_operand:QI 1 "general_operand" ""))]
"TARGET_EITHER" "TARGET_EITHER"
" "
if (TARGET_ARM)
{
/* Everything except mem = const or mem = mem can be done easily */ /* Everything except mem = const or mem = mem can be done easily */
if (!no_new_pseudos) if (!no_new_pseudos)
...@@ -4951,24 +4966,9 @@ ...@@ -4951,24 +4966,9 @@
emit_insn (gen_movsi (reg, operands[1])); emit_insn (gen_movsi (reg, operands[1]));
operands[1] = gen_lowpart (QImode, reg); operands[1] = gen_lowpart (QImode, reg);
} }
if (GET_CODE (operands[1]) == MEM && optimize > 0)
{
rtx reg = gen_reg_rtx (SImode);
emit_insn (gen_zero_extendqisi2 (reg, operands[1])); if (TARGET_THUMB)
operands[1] = gen_lowpart (QImode, reg);
}
if (GET_CODE (operands[0]) == MEM)
operands[1] = force_reg (QImode, operands[1]);
}
}
else /* TARGET_THUMB */
{
if (!no_new_pseudos)
{ {
if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (QImode, operands[1]);
/* ??? We shouldn't really get invalid addresses here, but this can /* ??? We shouldn't really get invalid addresses here, but this can
happen if we are passed a SP (never OK for HImode/QImode) or happen if we are passed a SP (never OK for HImode/QImode) or
virtual register (rejected by GO_IF_LEGITIMATE_ADDRESS for virtual register (rejected by GO_IF_LEGITIMATE_ADDRESS for
...@@ -4990,10 +4990,24 @@ ...@@ -4990,10 +4990,24 @@
= replace_equiv_address (operands[1], = replace_equiv_address (operands[1],
copy_to_reg (XEXP (operands[1], 0))); copy_to_reg (XEXP (operands[1], 0)));
} }
/* Handle loading a large integer during reload. */
else if (GET_CODE (operands[1]) == CONST_INT if (GET_CODE (operands[1]) == MEM && optimize > 0)
{
rtx reg = gen_reg_rtx (SImode);
emit_insn (gen_zero_extendqisi2 (reg, operands[1]));
operands[1] = gen_lowpart (QImode, reg);
}
if (GET_CODE (operands[0]) == MEM)
operands[1] = force_reg (QImode, operands[1]);
}
else if (TARGET_THUMB
&& GET_CODE (operands[1]) == CONST_INT
&& !CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'I')) && !CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'I'))
{ {
/* Handle loading a large integer during reload. */
/* Writing a constant to memory needs a scratch, which should /* Writing a constant to memory needs a scratch, which should
be handled with SECONDARY_RELOADs. */ be handled with SECONDARY_RELOADs. */
gcc_assert (GET_CODE (operands[0]) == REG); gcc_assert (GET_CODE (operands[0]) == REG);
...@@ -5002,7 +5016,6 @@ ...@@ -5002,7 +5016,6 @@
emit_insn (gen_movsi (operands[0], operands[1])); emit_insn (gen_movsi (operands[0], operands[1]));
DONE; DONE;
} }
}
" "
) )
......
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