Skip to content
Projects
Groups
Snippets
Help
This project
Loading...
Sign in / Register
Toggle navigation
R
riscv-gcc-1
Overview
Overview
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
lvzhengyang
riscv-gcc-1
Commits
78872ad9
Commit
78872ad9
authored
Oct 01, 2002
by
Nick Clifton
Committed by
Nick Clifton
Oct 01, 2002
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
(spe_evrlwi): Add missing third operand to assembler template.
From-SVN: r57707
parent
3c655f42
Show whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
6 additions
and
1 deletions
+6
-1
gcc/ChangeLog
+5
-0
gcc/config/rs6000/spe.md
+1
-1
No files found.
gcc/ChangeLog
View file @
78872ad9
2002
-
10
-
01
Nick
Clifton
<
nickc
@redhat
.
com
>
*
config
/
rs6000
/
spe
.
md
(
spe_evrlwi
)
:
Add
missing
third
operand
to
assembler
template
.
2002
-
10
-
01
Richard
Henderson
<
rth
@redhat
.
com
>
*
dwarf2out
.
c
(
loc_descriptor_from_tree
)
:
Relax
requirement
...
...
gcc/config/rs6000/spe.md
View file @
78872ad9
...
...
@@ -483,7 +483,7 @@
(unspec:V2SI
[
(match_operand:V2SI 1 "gpc_reg_operand" "r")
(match_operand:QI 2 "immediate_operand" "i")] 519))]
"TARGET_SPE"
"evrlwi %0,%1"
"evrlwi %0,%1
,%2
"
[
(set_attr "type" "vecsimple")
(set_attr "length" "4")])
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment