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Commit 76d06edc by Stephane Carrez Committed by Stephane Carrez
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Fix operand numbers in m68hc11.md 

From-SVN: r38924
parent 1594c6bc
Showing with 53 additions and 45 deletions
gcc/ChangeLog
2001-01-11 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* config/m68hc11/m68hc11.md (*adcq, *subcq): Fix operand numbers.
(*ashlsi3_const16_zexthi, *ashlsi3_const1): Likewise.
(*lshrsi3_const, *lshrsi3_const1, *lshrsi3_const16): Likewise.
(*ashrsi3, *ashrsi3_const, *ashlsi3, *ashlsi3_const): Likewise.
(*ashlsi3_const1, *lshrsi3, *ashlsi3_const16): Likewise.
(cmphi_z_used): Don't use '@' for the output.
(tstqi_z_used): Likewise.
(cmpqi_z_used): Likewise.
(one_cmplsi2): Likewise.
2001-01-11 Alexandre Oliva <aoliva@redhat.com> 2001-01-11 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.c (barrier_align): Recognize branch around far * config/sh/sh.c (barrier_align): Recognize branch around far
......
gcc/config/m68hc11/m68hc11.md
;;- Machine description file for Motorola 68HC11 and 68HC12. ;;- Machine description file for Motorola 68HC11 and 68HC12.
;;- Copyright (C) 1999, 2000 Free Software Foundation, Inc. ;;- Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
;;- Contributed by Stephane Carrez (stcarrez@worldnet.fr) ;;- Contributed by Stephane Carrez (stcarrez@worldnet.fr)
;; This file is part of GNU CC. ;; This file is part of GNU CC.
...@@ -214,8 +214,7 @@ ...@@ -214,8 +214,7 @@
(use (match_operand:HI 1 "hard_reg_operand" "dxy")) (use (match_operand:HI 1 "hard_reg_operand" "dxy"))
(use (reg:HI 11))] (use (reg:HI 11))]
"" ""
"@ "#")
#")
(define_split /* "tstqi_z_used" */ (define_split /* "tstqi_z_used" */
[(set (cc0) [(set (cc0)
...@@ -305,8 +304,7 @@ ...@@ -305,8 +304,7 @@
(use (match_operand:HI 2 "hard_reg_operand" "dxy")) (use (match_operand:HI 2 "hard_reg_operand" "dxy"))
(use (reg:HI 11))] (use (reg:HI 11))]
"" ""
"@ "#")
#")
(define_split /* "cmphi_z_used" */ (define_split /* "cmphi_z_used" */
[(set (cc0) [(set (cc0)
...@@ -385,8 +383,7 @@ ...@@ -385,8 +383,7 @@
(use (match_operand:HI 2 "hard_reg_operand" "dxy")) (use (match_operand:HI 2 "hard_reg_operand" "dxy"))
(use (reg:HI 11))] (use (reg:HI 11))]
"" ""
"@ "#")
#")
(define_split /* cmpqi_z_used */ (define_split /* cmpqi_z_used */
[(set (cc0) [(set (cc0)
...@@ -2113,10 +2110,10 @@ ...@@ -2113,10 +2110,10 @@
(define_insn "*adcq" (define_insn "*adcq"
[(set (match_operand:QI 0 "register_operand" "=q") [(set (match_operand:QI 0 "register_operand" "=q")
(plus:QI (plus:QI (reg:QI 7) (plus:QI (plus:QI (reg:QI 7)
(match_operand:QI 2 "register_operand" "%0")) (match_operand:QI 1 "register_operand" "%0"))
(match_operand:QI 3 "general_operand" "ium")))] (match_operand:QI 2 "general_operand" "ium")))]
"" ""
"adc%0\\t%b3") "adc%0\\t%b2")
;;-------------------------------------------------------------------- ;;--------------------------------------------------------------------
;;- Subtract instructions. ;;- Subtract instructions.
...@@ -2368,10 +2365,10 @@ ...@@ -2368,10 +2365,10 @@
(define_insn "*subcq" (define_insn "*subcq"
[(set (match_operand:QI 0 "register_operand" "=q") [(set (match_operand:QI 0 "register_operand" "=q")
(minus:QI (minus:QI (reg:QI 7) (minus:QI (minus:QI (reg:QI 7)
(match_operand:QI 2 "register_operand" "0")) (match_operand:QI 1 "register_operand" "0"))
(match_operand:QI 3 "general_operand" "ium")))] (match_operand:QI 2 "general_operand" "ium")))]
"" ""
"sbc%0\\t%b3") "sbc%0\\t%b2")
;;-------------------------------------------------------------------- ;;--------------------------------------------------------------------
;;- Multiply instructions. ;;- Multiply instructions.
...@@ -3504,8 +3501,7 @@ ...@@ -3504,8 +3501,7 @@
[(set (match_operand:SI 0 "non_push_operand" "=D") [(set (match_operand:SI 0 "non_push_operand" "=D")
(not:SI (match_operand:SI 1 "general_operand" "0")))] (not:SI (match_operand:SI 1 "general_operand" "0")))]
"" ""
"@ "bsr\\t___one_cmplsi2")
bsr\\t___one_cmplsi2")
(define_insn "one_cmplhi2" (define_insn "one_cmplhi2"
[(set (match_operand:HI 0 "non_push_operand" "=d,!um,*A") [(set (match_operand:HI 0 "non_push_operand" "=d,!um,*A")
...@@ -3746,7 +3742,7 @@ ...@@ -3746,7 +3742,7 @@
[(set (match_operand:SI 0 "nonimmediate_operand" "=D,*um") [(set (match_operand:SI 0 "nonimmediate_operand" "=D,*um")
(ashift:SI (match_operand:SI 1 "general_operand" "Duim,D") (ashift:SI (match_operand:SI 1 "general_operand" "Duim,D")
(const_int 16))) (const_int 16)))
(clobber (match_scratch:HI 3 "=X,X"))] (clobber (match_scratch:HI 2 "=X,X"))]
"" ""
"#") "#")
...@@ -3755,7 +3751,7 @@ ...@@ -3755,7 +3751,7 @@
(ashift:SI (zero_extend:HI (ashift:SI (zero_extend:HI
(match_operand:HI 1 "general_operand" "duim*A")) (match_operand:HI 1 "general_operand" "duim*A"))
(const_int 16))) (const_int 16)))
(clobber (match_scratch:HI 3 "=X"))] (clobber (match_scratch:HI 2 "=X"))]
"" ""
"#") "#")
...@@ -3764,7 +3760,7 @@ ...@@ -3764,7 +3760,7 @@
(ashift:SI (zero_extend:HI (ashift:SI (zero_extend:HI
(match_operand:HI 1 "general_operand" "duim*a")) (match_operand:HI 1 "general_operand" "duim*a"))
(const_int 16))) (const_int 16)))
(clobber (match_scratch:HI 3 "=X"))] (clobber (match_scratch:HI 2 "=X"))]
"reload_completed" "reload_completed"
[(set (reg:HI 0) (match_dup 1)) [(set (reg:HI 0) (match_dup 1))
(set (reg:HI 1) (const_int 0))] (set (reg:HI 1) (const_int 0))]
...@@ -3774,7 +3770,7 @@ ...@@ -3774,7 +3770,7 @@
[(set (match_operand:SI 0 "non_push_operand" "=D,D,*um,?*um") [(set (match_operand:SI 0 "non_push_operand" "=D,D,*um,?*um")
(ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0,*um,0,*um") (ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0,*um,0,*um")
(const_int 1))) (const_int 1)))
(clobber (match_scratch:HI 3 "=X,X,&d,&d"))] (clobber (match_scratch:HI 2 "=X,X,&d,&d"))]
"" ""
"* "*
{ {
...@@ -3828,20 +3824,20 @@ ...@@ -3828,20 +3824,20 @@
(define_insn "*ashlsi3_const" (define_insn "*ashlsi3_const"
[(set (match_operand:SI 0 "register_operand" "+D") [(set (match_operand:SI 0 "register_operand" "+D")
(ashift:SI (match_dup 0) (ashift:SI (match_dup 0)
(match_operand:HI 2 "const_int_operand" ""))) (match_operand:HI 1 "const_int_operand" "")))
(clobber (match_scratch:HI 3 "=y"))] (clobber (match_scratch:HI 2 "=y"))]
"" ""
"* "*
{ {
CC_STATUS_INIT; CC_STATUS_INIT;
return \"ldy\\t%2\\n\\tbsr\\t___ashlsi3\"; return \"ldy\\t%1\\n\\tbsr\\t___ashlsi3\";
}") }")
(define_insn "*ashlsi3" (define_insn "*ashlsi3"
[(set (match_operand:SI 0 "register_operand" "+D,D") [(set (match_operand:SI 0 "register_operand" "+D,D")
(ashift:SI (match_dup 0) (ashift:SI (match_dup 0)
(match_operand:HI 2 "general_operand" "y,m"))) (match_operand:HI 1 "general_operand" "y,m")))
(clobber (match_scratch:HI 3 "=2,X"))] (clobber (match_scratch:HI 2 "=1,X"))]
"" ""
"* "*
{ {
...@@ -3852,12 +3848,12 @@ ...@@ -3852,12 +3848,12 @@
and this conflicts with all reloads. Since X, Y, Z are used there and this conflicts with all reloads. Since X, Y, Z are used there
is not enough register in class A_REGS. is not enough register in class A_REGS.
Assuming that 'operands[2]' does not refer to the stack (which Assuming that 'operands[1]' does not refer to the stack (which
is true for 68hc11 only, we save temporary the value of Y. */ is true for 68hc11 only, we save temporary the value of Y. */
if (!Y_REG_P (operands[3])) if (!Y_REG_P (operands[2]))
{ {
output_asm_insn (\"pshy\", operands); output_asm_insn (\"pshy\", operands);
output_asm_insn (\"ldy\\t%2\", operands); output_asm_insn (\"ldy\\t%1\", operands);
output_asm_insn (\"bsr\\t___ashlsi3\", operands); output_asm_insn (\"bsr\\t___ashlsi3\", operands);
return \"puly\"; return \"puly\";
} }
...@@ -4229,20 +4225,20 @@ ...@@ -4229,20 +4225,20 @@
(define_insn "*ashrsi3_const" (define_insn "*ashrsi3_const"
[(set (match_operand:SI 0 "register_operand" "+D") [(set (match_operand:SI 0 "register_operand" "+D")
(ashiftrt:SI (match_dup 0) (ashiftrt:SI (match_dup 0)
(match_operand:HI 2 "const_int_operand" ""))) (match_operand:HI 1 "const_int_operand" "")))
(clobber (match_scratch:HI 3 "=y"))] (clobber (match_scratch:HI 2 "=y"))]
"" ""
"* "*
{ {
CC_STATUS_INIT; CC_STATUS_INIT;
return \"ldy\\t%2\\n\\tbsr\\t___ashrsi3\"; return \"ldy\\t%1\\n\\tbsr\\t___ashrsi3\";
}") }")
(define_insn "*ashrsi3" (define_insn "*ashrsi3"
[(set (match_operand:SI 0 "register_operand" "+D,D") [(set (match_operand:SI 0 "register_operand" "+D,D")
(ashiftrt:SI (match_dup 0) (ashiftrt:SI (match_dup 0)
(match_operand:HI 2 "general_operand" "y,m"))) (match_operand:HI 1 "general_operand" "y,m")))
(clobber (match_scratch:HI 3 "=2,X"))] (clobber (match_scratch:HI 2 "=1,X"))]
"" ""
"* "*
{ {
...@@ -4252,12 +4248,12 @@ ...@@ -4252,12 +4248,12 @@
and this conflicts with all reloads. Since X, Y, Z are used there and this conflicts with all reloads. Since X, Y, Z are used there
is not enough register in class A_REGS. is not enough register in class A_REGS.
Assuming that 'operands[2]' does not refer to the stack (which Assuming that 'operands[1]' does not refer to the stack (which
is true for 68hc11 only, we save temporary the value of Y. */ is true for 68hc11 only, we save temporary the value of Y. */
if (!Y_REG_P (operands[3])) if (!Y_REG_P (operands[2]))
{ {
output_asm_insn (\"pshy\", operands); output_asm_insn (\"pshy\", operands);
output_asm_insn (\"ldy\\t%2\", operands); output_asm_insn (\"ldy\\t%1\", operands);
output_asm_insn (\"bsr\\t___ashrsi3\", operands); output_asm_insn (\"bsr\\t___ashrsi3\", operands);
return \"puly\"; return \"puly\";
} }
...@@ -4504,7 +4500,7 @@ ...@@ -4504,7 +4500,7 @@
[(set (match_operand:SI 0 "non_push_operand" "=D,D,um") [(set (match_operand:SI 0 "non_push_operand" "=D,D,um")
(lshiftrt:SI (match_operand:SI 1 "general_operand" "uim,0,D") (lshiftrt:SI (match_operand:SI 1 "general_operand" "uim,0,D")
(const_int 16))) (const_int 16)))
(clobber (match_scratch:HI 3 "=X,X,X"))] (clobber (match_scratch:HI 2 "=X,X,X"))]
"" ""
"# "#
xgdx\\n\\tldx\\t#0 xgdx\\n\\tldx\\t#0
...@@ -4514,7 +4510,7 @@ ...@@ -4514,7 +4510,7 @@
[(set (match_operand:SI 0 "non_push_operand" "=D,*um") [(set (match_operand:SI 0 "non_push_operand" "=D,*um")
(lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "D*um,*um") (lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "D*um,*um")
(const_int 1))) (const_int 1)))
(clobber (match_scratch:HI 3 "=X,&d"))] (clobber (match_scratch:HI 2 "=X,&d"))]
"" ""
"* "*
{ {
...@@ -4563,20 +4559,20 @@ ...@@ -4563,20 +4559,20 @@
(define_insn "*lshrsi3_const" (define_insn "*lshrsi3_const"
[(set (match_operand:SI 0 "register_operand" "+D") [(set (match_operand:SI 0 "register_operand" "+D")
(lshiftrt:SI (match_dup 0) (lshiftrt:SI (match_dup 0)
(match_operand:HI 2 "const_int_operand" ""))) (match_operand:HI 1 "const_int_operand" "")))
(clobber (match_scratch:HI 3 "=y"))] (clobber (match_scratch:HI 2 "=y"))]
"" ""
"* "*
{ {
CC_STATUS_INIT; CC_STATUS_INIT;
return \"ldy\\t%2\\n\\tbsr\\t___lshrsi3\"; return \"ldy\\t%1\\n\\tbsr\\t___lshrsi3\";
}") }")
(define_insn "*lshrsi3" (define_insn "*lshrsi3"
[(set (match_operand:SI 0 "register_operand" "+D,D") [(set (match_operand:SI 0 "register_operand" "+D,D")
(lshiftrt:SI (match_dup 0) (lshiftrt:SI (match_dup 0)
(match_operand:HI 2 "general_operand" "y,m"))) (match_operand:HI 1 "general_operand" "y,m")))
(clobber (match_scratch:HI 3 "=2,X"))] (clobber (match_scratch:HI 2 "=1,X"))]
"" ""
"* "*
{ {
...@@ -4586,12 +4582,12 @@ ...@@ -4586,12 +4582,12 @@
and this conflicts with all reloads. Since X, Y, Z are used there and this conflicts with all reloads. Since X, Y, Z are used there
is not enough register in class A_REGS. is not enough register in class A_REGS.
Assuming that 'operands[2]' does not refer to the stack (which Assuming that 'operands[1]' does not refer to the stack (which
is true for 68hc11 only, we save temporary the value of Y. */ is true for 68hc11 only, we save temporary the value of Y. */
if (!Y_REG_P (operands[3])) if (!Y_REG_P (operands[2]))
{ {
output_asm_insn (\"pshy\", operands); output_asm_insn (\"pshy\", operands);
output_asm_insn (\"ldy\\t%2\", operands); output_asm_insn (\"ldy\\t%1\", operands);
output_asm_insn (\"bsr\\t___lshrsi3\", operands); output_asm_insn (\"bsr\\t___lshrsi3\", operands);
return \"puly\"; return \"puly\";
} }
......
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