rs6000.c (altivec_expand_lv_builtin): Do not use switch statement on instruction code.

	* config/rs6000/rs6000.c (altivec_expand_lv_builtin): Do not use switch
	statement on instruction code.  Remove trailing spaces.
	(altivec_expand_stv_builtin): Likewise.

From-SVN: r235690

gcc/ChangeLog

+2016-05-01  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* config/rs6000/rs6000.c (altivec_expand_lv_builtin): Do not use switch
+	statement on instruction code.  Remove trailing spaces.
+	(altivec_expand_stv_builtin): Likewise.
+
 2016-05-01  Oleg Endo  <olegendo@gcc.gnu.org>
 
 	* config/sh/sh.h (TARGET_SH4): Remove and use default implementation.

gcc/config/rs6000/rs6000.c

@@ -13105,14 +13105,12 @@ altivec_expand_lv_builtin (enum insn_code icode, tree exp, rtx target, bool blk)
   /* For LVX, express the RTL accurately by ANDing the address with -16.
      LVXL and LVE*X expand to use UNSPECs to hide their special behavior,
      so the raw address is fine.  */
-  switch (icode)
-    {
-    case CODE_FOR_altivec_lvx_v2df_2op:
-    case CODE_FOR_altivec_lvx_v2di_2op:
-    case CODE_FOR_altivec_lvx_v4sf_2op:
-    case CODE_FOR_altivec_lvx_v4si_2op:
-    case CODE_FOR_altivec_lvx_v8hi_2op:
-    case CODE_FOR_altivec_lvx_v16qi_2op:
+  if (icode == CODE_FOR_altivec_lvx_v2df_2op
+      || icode == CODE_FOR_altivec_lvx_v2di_2op
+      || icode == CODE_FOR_altivec_lvx_v4sf_2op
+      || icode == CODE_FOR_altivec_lvx_v4si_2op
+      || icode == CODE_FOR_altivec_lvx_v8hi_2op
+      || icode == CODE_FOR_altivec_lvx_v16qi_2op)
     {
       rtx rawaddr;
       if (op0 == const0_rtx)
@@ -13139,11 +13137,9 @@ altivec_expand_lv_builtin (enum insn_code icode, tree exp, rtx target, bool blk)
 	}
       else
 	emit_insn (gen_rtx_SET (target, addr));
-
-	break;
     }
-
-    default:
+  else
+    {
       if (op0 == const0_rtx)
 	addr = gen_rtx_MEM (blk ? BLKmode : tmode, op1);
       else
@@ -13157,8 +13153,6 @@ altivec_expand_lv_builtin (enum insn_code icode, tree exp, rtx target, bool blk)
       if (! pat)
 	return 0;
       emit_insn (pat);
-
-      break;
     }
 
   return target;
@@ -13264,14 +13258,12 @@ altivec_expand_stv_builtin (enum insn_code icode, tree exp)
   /* For STVX, express the RTL accurately by ANDing the address with -16.
      STVXL and STVE*X expand to use UNSPECs to hide their special behavior,
      so the raw address is fine.  */
-  switch (icode)
-    {
-    case CODE_FOR_altivec_stvx_v2df_2op:
-    case CODE_FOR_altivec_stvx_v2di_2op:
-    case CODE_FOR_altivec_stvx_v4sf_2op:
-    case CODE_FOR_altivec_stvx_v4si_2op:
-    case CODE_FOR_altivec_stvx_v8hi_2op:
-    case CODE_FOR_altivec_stvx_v16qi_2op:
+  if (icode == CODE_FOR_altivec_stvx_v2df_2op
+      || icode == CODE_FOR_altivec_stvx_v2di_2op
+      || icode == CODE_FOR_altivec_stvx_v4sf_2op
+      || icode == CODE_FOR_altivec_stvx_v4si_2op
+      || icode == CODE_FOR_altivec_stvx_v8hi_2op
+      || icode == CODE_FOR_altivec_stvx_v16qi_2op)
     {
       if (op1 == const0_rtx)
 	rawaddr = op2;
@@ -13299,11 +13291,8 @@ altivec_expand_stv_builtin (enum insn_code icode, tree exp)
 	}
       else
 	emit_insn (gen_rtx_SET (addr, op0));
-
-	break;
     }
-
-    default:
+  else
     {
       if (! (*insn_data[icode].operand[1].predicate) (op0, smode))
 	op0 = copy_to_mode_reg (smode, op0);
@@ -13320,7 +13309,6 @@ altivec_expand_stv_builtin (enum insn_code icode, tree exp)
       if (pat)
 	emit_insn (pat);
     }
-    }      
 
   return NULL_RTX;
 }