PR middle-end/89797 - ICE on a vector_size (1LU << 33) int variable

gcc/ChangeLog:
	* tree.h (TYPE_VECTOR_SUBPARTS): Use HOST_WIDE_INT_1U.
	* config/aarch64/aarch64.c (aarch64_simd_vector_alignment): Avoid
	assuming type size fits in SHWI.

From-SVN: r270447

gcc/ChangeLog

+2019-04-18  Martin Sebor  <msebor@redhat.com>
+
+	PR middle-end/89797
+	* tree.h (TYPE_VECTOR_SUBPARTS): Use HOST_WIDE_INT_1U.
+	* config/aarch64/aarch64.c (aarch64_simd_vector_alignment): Avoid
+	assuming type size fits in SHWI.
+
 2019-04-18  Jan Hubicka  <hubicka@ucw.cz>
 
 	PR ipa/85051

gcc/config/aarch64/aarch64.c

@@ -14924,8 +14924,7 @@ aarch64_simd_vector_alignment (const_tree type)
        be set for non-predicate vectors of booleans.  Modes are the most
        direct way we have of identifying real SVE predicate types.  */
     return GET_MODE_CLASS (TYPE_MODE (type)) == MODE_VECTOR_BOOL ? 16 : 128;
-  HOST_WIDE_INT align = tree_to_shwi (TYPE_SIZE (type));
-  return MIN (align, 128);
+  return wi::umin (wi::to_wide (TYPE_SIZE (type)), 128).to_uhwi ();
 }
 
 /* Implement target hook TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT.  */

gcc/tree.h

@@ -3735,13 +3735,13 @@ TYPE_VECTOR_SUBPARTS (const_tree node)
   if (NUM_POLY_INT_COEFFS == 2)
     {
       poly_uint64 res = 0;
-      res.coeffs[0] = 1 << (precision & 0xff);
+      res.coeffs[0] = HOST_WIDE_INT_1U << (precision & 0xff);
       if (precision & 0x100)
-	res.coeffs[1] = 1 << (precision & 0xff);
+	res.coeffs[1] = HOST_WIDE_INT_1U << (precision & 0xff);
       return res;
     }
   else
-    return (unsigned HOST_WIDE_INT)1 << precision;
+    return HOST_WIDE_INT_1U << precision;
 }
 
 /* Set the number of elements in VECTOR_TYPE NODE to SUBPARTS, which must