inline-lrint_1.c: Broaden regexp.

2017-06-12  Tamar Christina  <tamar.christina@arm.com>

	* gcc.target/aarch64/inline-lrint_1.c: Broaden regexp.
	* gcc.target/aarch64/inline-lrint_2.c: Likewise.
	* gcc.target/aarch64/no-inline-lrint_1.c: Likewise.
	* gcc.target/aarch64/no-inline-lrint_2.c: Likewise.

From-SVN: r249127

gcc/testsuite/ChangeLog

 2017-06-12  Tamar Christina  <tamar.christina@arm.com>
 
+	* gcc.target/aarch64/inline-lrint_1.c: Broaden regexp.
+	* gcc.target/aarch64/inline-lrint_2.c: Likewise.
+	* gcc.target/aarch64/no-inline-lrint_1.c: Likewise.
+	* gcc.target/aarch64/no-inline-lrint_2.c: Likewise.
+
+2017-06-12  Tamar Christina  <tamar.christina@arm.com>
+
 	* gcc.target/arm/sdiv_costs_1.c: Require arm_v8_vfp_ok.
 
 2017-06-12  Tamar Christina  <tamar.christina@arm.com>

gcc/testsuite/gcc.target/aarch64/inline-lrint_1.c

@@ -13,8 +13,6 @@ TEST (fif, float , int, )
 TEST (dlld, double, long long, l)
 TEST (fllf, float , long long, l)
 
-/* { dg-final { scan-assembler-times "frintx\td\[0-9\]+, d\[0-9\]+" 3 } } */
-/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]+, s\[0-9\]+" 3 } } */
-/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, d\[0-9\]+" 3 } } */
-/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, s\[0-9\]+" 3 } } */
+/* { dg-final { scan-assembler-times "frintx\t\[d,s\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
+/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
 /* { dg-final { scan-assembler-not "bl"    } } */

gcc/testsuite/gcc.target/aarch64/inline-lrint_2.c

@@ -13,10 +13,6 @@ TEST (fif, float , int, )
 TEST (dlld, double, long long, l)
 TEST (fllf, float , long long, l)
 
-/* { dg-final { scan-assembler-times "frintx\td\[0-9\]+, d\[0-9\]+" 3 } } */
-/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]+, s\[0-9\]+" 3 } } */
-/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, d\[0-9\]+" 1 } } */
-/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, s\[0-9\]+" 1 } } */
-/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\]+, d\[0-9\]+" 2 } } */
-/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\]+, s\[0-9\]+" 2 } } */
+/* { dg-final { scan-assembler-times "frintx\t\[d,s\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
+/* { dg-final { scan-assembler-times "fcvtzs\t\[w,x\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
 /* { dg-final { scan-assembler-not "bl"    } } */

gcc/testsuite/gcc.target/aarch64/no-inline-lrint_1.c

@@ -13,8 +13,7 @@ TEST (fif, float , int, )
 TEST (dlld, double, long long, l)
 TEST (fllf, float , long long, l)
 
-/* { dg-final { scan-assembler-times "frintx\td\[0-9\]+, d\[0-9\]+" 3 } } */
-/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]+, s\[0-9\]+" 3 } } */
+/* { dg-final { scan-assembler-times "frintx\t\[d,s\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
 /* { dg-final { scan-assembler-times "bl\tlrint"  4 } } */
 /* { dg-final { scan-assembler-times "bl\tllrint" 2 } } */
 /* { dg-final { scan-assembler-not "fcvtzs" } } */

gcc/testsuite/gcc.target/aarch64/no-inline-lrint_2.c

@@ -13,8 +13,7 @@ TEST (fif, float , int, )
 TEST (dlld, double, long long, l)
 TEST (fllf, float , long long, l)
 
-/* { dg-final { scan-assembler-times "frintx\td\[0-9\]+, d\[0-9\]+" 3 } } */
-/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]+, s\[0-9\]+" 3 } } */
+/* { dg-final { scan-assembler-times "frintx\t\[d,s\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */
 /* { dg-final { scan-assembler-times "bl\tlrint"  4 } } */
 /* { dg-final { scan-assembler-times "bl\tllrint" 2 } } */
 /* { dg-final { scan-assembler-not "fcvtzs" } } */