Commit 64e7e238 by Sandra Loosemore Committed by Sandra Loosemore

mips.h (SLOW_BYTE_ACCESS): Turn off for MIPS16.

2007-04-28  Sandra Loosemore  <sandra@codesourcery.com>
	    Nigel Stephens  <nigel@mips.com>

	gcc/
	* config/mips/mips.h (SLOW_BYTE_ACCESS): Turn off for MIPS16.

Co-Authored-By: Nigel Stephens <nigel@mips.com>

From-SVN: r124261
parent 27fabb5a
2007-04-28 Sandra Loosemore <sandra@codesourcery.com>
Nigel Stephens <nigel@mips.com>
* config/mips/mips.h (SLOW_BYTE_ACCESS): Turn off for MIPS16.
2007-04-28 Jan Hubicka <jh@suse.cz> 2007-04-28 Jan Hubicka <jh@suse.cz>
* config/alpha/alpha.c (alpha_output_mi_thunk_osf): Use * config/alpha/alpha.c (alpha_output_mi_thunk_osf): Use
......
...@@ -2240,8 +2240,11 @@ typedef struct mips_args { ...@@ -2240,8 +2240,11 @@ typedef struct mips_args {
difference in cost between byte and (aligned) word loads. difference in cost between byte and (aligned) word loads.
On RISC machines, it tends to generate better code to define On RISC machines, it tends to generate better code to define
this as 1, since it avoids making a QI or HI mode register. */ this as 1, since it avoids making a QI or HI mode register.
#define SLOW_BYTE_ACCESS 1
But, generating word accesses for -mips16 is generally bad as shifts
(often extended) would be needed for byte accesses. */
#define SLOW_BYTE_ACCESS (!TARGET_MIPS16)
/* Define this to be nonzero if shift instructions ignore all but the low-order /* Define this to be nonzero if shift instructions ignore all but the low-order
few bits. */ few bits. */
......
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