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riscv-gcc-1
Commit 5fcd86dd by Michael Meissner
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Fix rename registers problem; Rewrite 64-bit conditionals in terms of COND_EXEC… 

Fix rename registers problem; Rewrite 64-bit conditionals in terms of COND_EXEC instead of IF_THEN_ELSE

From-SVN: r37781
parent c383aafd
Showing with 44 additions and 83 deletions
gcc/ChangeLog
2000-11-27 Michael Meissner <meissner@redhat.com>
* d30v-protos.h (srelational_si_operator): Correctly spell
function.
(urelational_si_operator): Ditto.
(relational_si_operator): Ditto.
(d30v_expand_prologue): Add prototype.
(d30v_expand_epilogue): Ditto.
* d30v.h (OPTIMIZATION_OPTIONS): Undo November 22nd change.
* d30v.md (movcccc_*): Delete now unused patterns.
(64 bit comparison splitters): Rewrite to use COND_EXEC instead of
IF_THEN_ELSE.
(define_cond_exec): Use 'b' to select branch flags.
2000-11-26 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* builtins.c (expand_builtin_strncmp, expand_builtin_strncpy): New
......
gcc/config/d30v/d30v-protos.h
......@@ -65,9 +65,9 @@ extern int branch_zero_operator PARAMS ((rtx, enum machine_mode));
extern int cond_move_dest_operand PARAMS ((rtx, enum machine_mode));
extern int cond_move_operand PARAMS ((rtx, enum machine_mode));
extern int cond_exec_operand PARAMS ((rtx, enum machine_mode));
extern int srelational_si_operand PARAMS ((rtx, enum machine_mode));
extern int urelational_si_operand PARAMS ((rtx, enum machine_mode));
extern int relational_di_operand PARAMS ((rtx, enum machine_mode));
extern int srelational_si_operator PARAMS ((rtx, enum machine_mode));
extern int urelational_si_operator PARAMS ((rtx, enum machine_mode));
extern int relational_di_operator PARAMS ((rtx, enum machine_mode));
#endif
extern d30v_stack_t *d30v_stack_info PARAMS ((void));
extern int direct_return PARAMS ((void));
......@@ -111,7 +111,9 @@ extern rtx d30v_expand_builtin_va_arg PARAMS ((tree, tree));
#endif /* TREE_CODE */
extern void d30v_function_prologue PARAMS ((FILE *, int));
extern void d30v_expand_prologue PARAMS ((void));
extern void d30v_function_epilogue PARAMS ((FILE *, int));
extern void d30v_expand_epilogue PARAMS ((void));
extern void d30v_function_profiler PARAMS ((FILE *, int));
#ifdef RTX_CODE
extern void d30v_split_double PARAMS ((rtx, rtx *, rtx *));
......
gcc/config/d30v/d30v.h
......@@ -545,12 +545,7 @@ extern int target_flags;
*Do not examine `write_symbols' in this macro!* The debugging options are
*not supposed to alter the generated code. */
/* -frename-registers seems to abort on d30v, turn off until fixed. */
#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
do { \
if (LEVEL >= 3) \
flag_rename_registers = 0; \
} while (0)
/* #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) */
/* Define this macro if debugging can be performed even without a frame
pointer. If this macro is defined, GNU CC will turn on the
......
gcc/config/d30v/d30v.md
......@@ -2037,60 +2037,6 @@
[(set_attr "length" "4,8")
(set_attr "type" "scmp,lcmp")])
;; Code used after splitting DI compares
(define_insn "*movcccc_signed_true"
[(set (match_operand:CC 0 "flag_operand" "=f,f")
(if_then_else:CC (match_operand:CC 1 "br_flag_operand" "f,f")
(match_operator:CC 3 "srelational_si_operator"
[(match_operand:SI 4 "gpr_operand" "d,d")
(match_operand:SI 5 "gpr_or_constant_operand" "dI,i")])
(match_dup 0)))]
""
"%R3%T1 %0,%4,%5"
[(set_attr "length" "4,8")
(set_attr "type" "scmp,lcmp")
(set_attr "predicable" "no")])
(define_insn "*movcccc_signed_false"
[(set (match_operand:CC 0 "flag_operand" "=f,f")
(if_then_else:CC (match_operand:CC 1 "br_flag_operand" "f,f")
(match_dup 0)
(match_operator:CC 3 "srelational_si_operator"
[(match_operand:SI 4 "gpr_operand" "d,d")
(match_operand:SI 5 "gpr_or_constant_operand" "dI,i")])))]
""
"%R3%F1 %0,%4,%5"
[(set_attr "length" "4,8")
(set_attr "type" "scmp,lcmp")
(set_attr "predicable" "no")])
(define_insn "*movcccc_unsigned_true"
[(set (match_operand:CC 0 "flag_operand" "=f,f")
(if_then_else:CC (match_operand:CC 1 "br_flag_operand" "f,f")
(match_operator:CC 3 "urelational_si_operator"
[(match_operand:SI 4 "gpr_operand" "d,d")
(match_operand:SI 5 "gpr_or_constant_operand" "dJP,i")])
(match_dup 0)))]
""
"%R3%T1 %0,%4,%5"
[(set_attr "length" "4,8")
(set_attr "type" "scmp,lcmp")
(set_attr "predicable" "no")])
(define_insn "*movcccc_unsigned_false"
[(set (match_operand:CC 0 "flag_operand" "=f,f")
(if_then_else:CC (match_operand:CC 1 "br_flag_operand" "f,f")
(match_dup 0)
(match_operator:CC 3 "urelational_si_operator"
[(match_operand:SI 4 "gpr_operand" "d,d")
(match_operand:SI 5 "gpr_or_constant_operand" "dJP,i")])))]
""
"%R3%F1 %0,%4,%5"
[(set_attr "length" "4,8")
(set_attr "type" "scmp,lcmp")
(set_attr "predicable" "no")])
;; 64 bit integer tests
(define_insn "*eqdi_internal"
[(set (match_operand:CC 0 "br_flag_operand" "=b,b,b")
......@@ -2109,11 +2055,12 @@
[(set (match_dup 0)
(eq:CC (match_dup 3)
(match_dup 4)))
(cond_exec
(eq:CC (match_dup 0)
(const_int 0))
(set (match_dup 0)
(if_then_else:CC (match_dup 0)
(eq:CC (match_dup 5)
(match_dup 6))
(match_dup 0)))]
(match_dup 6))))]
"
{
d30v_split_double (operands[1], &operands[3], &operands[5]);
......@@ -2137,9 +2084,10 @@
[(set (match_dup 0)
(ne:CC (match_dup 3)
(match_dup 4)))
(cond_exec
(ne:CC (match_dup 0)
(const_int 0))
(set (match_dup 0)
(if_then_else:CC (match_dup 0)
(match_dup 0)
(ne:CC (match_dup 5)
(match_dup 6))))]
"
......@@ -2268,23 +2216,23 @@
d30v_split_double (operands[2], &high[0], &low[0]);
d30v_split_double (operands[3], &high[1], &low[1]);
operands[5] = gen_rtx (SET, VOIDmode,
operands[5] = gen_rtx_SET (VOIDmode,
tmpflag,
gen_rtx (EQ, CCmode, high[0], high[1]));
gen_rtx_EQ (CCmode, high[0], high[1]));
operands[6] = gen_rtx (SET, VOIDmode,
outflag,
gen_rtx (IF_THEN_ELSE, CCmode,
tmpflag,
outflag,
gen_rtx (cond, CCmode, high[0], high[1])));
operands[6] = gen_rtx_COND_EXEC (VOIDmode,
gen_rtx_NE (CCmode, tmpflag, const0_rtx),
gen_rtx_SET (VOIDmode, outflag,
gen_rtx_fmt_ee (cond, CCmode,
high[0],
high[1])));
operands[7] = gen_rtx (SET, VOIDmode,
outflag,
gen_rtx (IF_THEN_ELSE, CCmode,
tmpflag,
gen_rtx (ucond, CCmode, low[0], low[1]),
outflag));
operands[7] = gen_rtx_COND_EXEC (VOIDmode,
gen_rtx_EQ (CCmode, tmpflag, const0_rtx),
gen_rtx_SET (VOIDmode, outflag,
gen_rtx_fmt_ee (ucond, CCmode,
low[0],
low[1])));
}")
......@@ -3407,7 +3355,7 @@
(define_cond_exec
[(match_operator:CC 0 "condexec_test_operator"
[(match_operand:CC 1 "br_flag_operand" "f")
[(match_operand:CC 1 "br_flag_operand" "b")
(const_int 0)])]
""
"")
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