Commit 5f81043f by Richard Kenner

(decrement_and_branchsi and related insns): Don't use a "2" to select a...

(decrement_and_branchsi and related insns): Don't use a "2" to select
a register preference for operand 1 if operand 2 hasn't been seen yet.
Add appropriate clobbers in decrement_and_branchsi.
Add patterns where the pc/label_ref are interchanged.

From-SVN: r10363
parent 45d9a5c6
......@@ -7265,25 +7265,33 @@
;; so loop.c knows what to generate.
(define_expand "decrement_and_branchsi"
[(parallel [(set (pc) (if_then_else (ne (match_operand:SI 0 "register_operand" "c")
[(parallel [(set (match_operand:SI 0 "register_operand" "")
(plus:SI (match_dup 0)
(const_int -1)))
(set (pc) (if_then_else (ne (match_dup 0)
(const_int 1))
(label_ref (match_operand 1 "" ""))
(pc)))
(set (match_dup 0) (plus:SI (match_dup 0) (const_int -1)))])]
(clobber (match_scratch:CC 2 ""))
(clobber (match_scratch:SI 3 ""))])]
""
"")
;; We need to be able to do this for any operand, including MEM, or we
;; will cause reload to blow up since we don't allow output reloads on
;; JUMP_INSNs.
;; In order that the length attribute is calculated correctly, the
;; label MUST be operand 0.
(define_insn ""
[(set (pc)
(if_then_else (ne (match_operand:SI 1 "register_operand" "2,*r,*r")
(if_then_else (ne (match_operand:SI 1 "register_operand" "c,*r,*r")
(const_int 1))
(label_ref (match_operand 0 "" ""))
(pc)))
(set (match_operand:SI 2 "register_operand" "=c,*r,m*q*c*l")
(plus:SI (match_dup 1) (const_int -1)))
(set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l")
(plus:SI (match_dup 1)
(const_int -1)))
(clobber (match_scratch:CC 3 "=X,&x,&x"))
(clobber (match_scratch:SI 4 "=X,X,r"))]
""
......@@ -7299,15 +7307,40 @@
[(set_attr "type" "branch")
(set_attr "length" "*,12,16")])
(define_insn ""
[(set (pc)
(if_then_else (ne (match_operand:SI 1 "register_operand" "c,*r,*r")
(const_int 1))
(pc)
(label_ref (match_operand 0 "" ""))))
(set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l")
(plus:SI (match_dup 1)
(const_int -1)))
(clobber (match_scratch:CC 3 "=X,&x,&x"))
(clobber (match_scratch:SI 4 "=X,X,r"))]
""
"*
{
if (which_alternative != 0)
return \"#\";
else if (get_attr_length (insn) == 8)
return \"bdz %l0\";
else
return \"{bdn|bdnz} $+8\;b %l0\";
}"
[(set_attr "type" "branch")
(set_attr "length" "*,12,16")])
;; Similar, but we can use GE since we have a REG_NONNEG.
(define_insn ""
[(set (pc)
(if_then_else (ge (match_operand:SI 1 "register_operand" "2,*r,*r")
(if_then_else (ge (match_operand:SI 1 "register_operand" "c,*r,*r")
(const_int 0))
(label_ref (match_operand 0 "" ""))
(pc)))
(set (match_operand:SI 2 "register_operand" "=c,*r,m*q*c*l")
(plus:SI (match_dup 1) (const_int -1)))
(set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l")
(plus:SI (match_dup 1)
(const_int -1)))
(clobber (match_scratch:CC 3 "=X,&x,&X"))
(clobber (match_scratch:SI 4 "=X,X,r"))]
"find_reg_note (insn, REG_NONNEG, 0)"
......@@ -7325,12 +7358,37 @@
(define_insn ""
[(set (pc)
(if_then_else (eq (match_operand:SI 1 "register_operand" "2,*r,*r")
(if_then_else (ge (match_operand:SI 1 "register_operand" "c,*r,*r")
(const_int 0))
(pc)
(label_ref (match_operand 0 "" ""))))
(set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l")
(plus:SI (match_dup 1)
(const_int -1)))
(clobber (match_scratch:CC 3 "=X,&x,&X"))
(clobber (match_scratch:SI 4 "=X,X,r"))]
"find_reg_note (insn, REG_NONNEG, 0)"
"*
{
if (which_alternative != 0)
return \"#\";
else if (get_attr_length (insn) == 8)
return \"bdz %l0\";
else
return \"{bdn|bdnz} $+8\;b %l0\";
}"
[(set_attr "type" "branch")
(set_attr "length" "*,12,16")])
(define_insn ""
[(set (pc)
(if_then_else (eq (match_operand:SI 1 "register_operand" "c,*r,*r")
(const_int 1))
(label_ref (match_operand 0 "" ""))
(pc)))
(set (match_operand:SI 2 "register_operand" "=c,*r,m*q*c*l")
(plus:SI (match_dup 1) (const_int -1)))
(set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l")
(plus:SI (match_dup 1)
(const_int -1)))
(clobber (match_scratch:CC 3 "=X,&x,&x"))
(clobber (match_scratch:SI 4 "=X,X,r"))]
""
......@@ -7346,6 +7404,30 @@
[(set_attr "type" "branch")
(set_attr "length" "*,12,16")])
(define_insn ""
[(set (pc)
(if_then_else (eq (match_operand:SI 1 "register_operand" "c,*r,*r")
(const_int 1))
(pc)
(label_ref (match_operand 0 "" ""))))
(set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l")
(plus:SI (match_dup 1)
(const_int -1)))
(clobber (match_scratch:CC 3 "=X,&x,&x"))
(clobber (match_scratch:SI 4 "=X,X,r"))]
""
"*
{
if (which_alternative != 0)
return \"#\";
else if (get_attr_length (insn) == 8)
return \"{bdn|bdnz} %l0\";
else
return \"bdz $+8\;b %l0\";
}"
[(set_attr "type" "branch")
(set_attr "length" "*,12,16")])
(define_split
[(set (pc)
(if_then_else (match_operator 2 "comparison_operator"
......@@ -7354,15 +7436,21 @@
(match_operand 5 "" "")
(match_operand 6 "" "")))
(set (match_operand:SI 0 "gpc_reg_operand" "")
(plus:SI (match_dup 1) (const_int -1)))
(plus:SI (match_dup 1)
(const_int -1)))
(clobber (match_scratch:CC 3 ""))
(clobber (match_scratch:SI 4 ""))]
"reload_completed"
[(parallel [(set (match_dup 3)
(compare:CC (plus:SI (match_dup 1) (const_int -1))
(compare:CC (plus:SI (match_dup 1)
(const_int -1))
(const_int 0)))
(set (match_dup 0) (plus:SI (match_dup 1) (const_int -1)))])
(set (pc) (if_then_else (match_dup 7) (match_dup 5) (match_dup 6)))]
(set (match_dup 0)
(plus:SI (match_dup 1)
(const_int -1)))])
(set (pc) (if_then_else (match_dup 7)
(match_dup 5)
(match_dup 6)))]
"
{ operands[7] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
const0_rtx); }")
......@@ -7380,11 +7468,17 @@
(clobber (match_scratch:SI 4 ""))]
"reload_completed && ! gpc_reg_operand (operands[0], SImode)"
[(parallel [(set (match_dup 3)
(compare:CC (plus:SI (match_dup 1) (const_int -1))
(compare:CC (plus:SI (match_dup 1)
(const_int -1))
(const_int 0)))
(set (match_dup 4) (plus:SI (match_dup 1) (const_int -1)))])
(set (match_dup 0) (match_dup 4))
(set (pc) (if_then_else (match_dup 7) (match_dup 5) (match_dup 6)))]
(set (match_dup 4)
(plus:SI (match_dup 1)
(const_int -1)))])
(set (match_dup 0)
(match_dup 4))
(set (pc) (if_then_else (match_dup 7)
(match_dup 5)
(match_dup 6)))]
"
{ operands[7] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
const0_rtx); }")
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