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lvzhengyang
riscv-gcc-1
Commits
5e2a751a
Commit
5e2a751a
authored
Mar 01, 1993
by
Richard Kenner
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Add three special-cases of CMP insns against zero.
From-SVN: r3573
parent
26915fa9
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gcc/config/alpha/alpha.md
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5e2a751a
...
@@ -1128,6 +1128,33 @@
...
@@ -1128,6 +1128,33 @@
"cmp%C1 %r2,%3,%0"
"cmp%C1 %r2,%3,%0"
[
(set_attr "type" "icmp")
]
)
[
(set_attr "type" "icmp")
]
)
;; There are three important special-case that don't fit the above pattern
;; but which we want to handle here.
(define_insn ""
[
(set (match_operand:DI 0 "register_operand" "=r")
(ne:DI (match_operand:DI 1 "register_operand" "r")
(const_int 0)))]
""
"cmpult $31,%1,%0"
[
(set_attr "type" "icmp")
]
)
(define_insn ""
[
(set (match_operand:DI 0 "register_operand" "=r")
(gt:DI (match_operand:DI 1 "register_operand" "r")
(const_int 0)))]
""
"cmplt $31,%1,%0"
[
(set_attr "type" "icmp")
]
)
(define_insn ""
[
(set (match_operand:DI 0 "register_operand" "=r")
(ge:DI (match_operand:DI 1 "register_operand" "r")
(const_int 0)))]
""
"cmple $31,%1,%0"
[
(set_attr "type" "icmp")
]
)
(define_insn ""
(define_insn ""
[
(set (match_operand:DI 0 "register_operand" "=r,r")
[
(set (match_operand:DI 0 "register_operand" "=r,r")
(if_then_else:DI
(if_then_else:DI
...
...
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