Skip to content

R
riscv-gcc-1
Commit 5cc93ee0 by Uros Bizjak
Options

i386.md: Use SWI248x instead of X87MODEI... 

	* config/i386/i386.md: Use SWI248x instead of X87MODEI, SWI24 instead
	of X87MODEI12 and SWI48x instead of SSEMODEI24.
	(SWI248x): New mode iterator, rename from X87MODEI.
	(X87MODEI): Remove mode iterator.
	(X87MODEI12): Ditto.
	(SSEMODEI24): Ditto.

From-SVN: r174498
parent f0686e78
Showing with 218 additions and 212 deletions
gcc/ChangeLog
2011-05-31 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md: Use SWI248x instead of X87MODEI, SWI24 instead
of X87MODEI12 and SWI48x instead of SSEMODEI24.
(SWI248x): New mode iterator, rename from X87MODEI.
(X87MODEI): Remove mode iterator.
(X87MODEI12): Ditto.
(SSEMODEI24): Ditto.
2011-05-31 Alexandre Oliva <aoliva@redhat.com> 2011-05-31 Alexandre Oliva <aoliva@redhat.com>
* params.def (PARAM_MAX_VARTRACK_EXPR_DEPTH): New. * params.def (PARAM_MAX_VARTRACK_EXPR_DEPTH): New.
...@@ -16,8 +25,7 @@ ...@@ -16,8 +25,7 @@
2011-05-31 Alexandre Oliva <aoliva@redhat.com> 2011-05-31 Alexandre Oliva <aoliva@redhat.com>
* gengtype-state.c (read_state_params_structs): Initialize * gengtype-state.c (read_state_params_structs): Initialize previous.
previous.
2011-05-31 Uros Bizjak <ubizjak@gmail.com> 2011-05-31 Uros Bizjak <ubizjak@gmail.com>
......
gcc/config/i386/i386.md
...@@ -790,24 +790,27 @@ ...@@ -790,24 +790,27 @@
(define_code_attr sgnprefix [(sign_extend "i") (zero_extend "") (define_code_attr sgnprefix [(sign_extend "i") (zero_extend "")
(div "i") (udiv "")]) (div "i") (udiv "")])
;; 64bit single word integer modes. ;; All integer modes.
(define_mode_iterator SWI1248x [QI HI SI DI]) (define_mode_iterator SWI1248x [QI HI SI DI])
;; 64bit single word integer modes without QImode and HImode. ;; All integer modes without QImode.
(define_mode_iterator SWI48x [SI DI]) (define_mode_iterator SWI248x [HI SI DI])
;; Single word integer modes. ;; All integer modes without QImode and HImode.
(define_mode_iterator SWI [QI HI SI (DI "TARGET_64BIT")]) (define_mode_iterator SWI48x [SI DI])
;; Single word integer modes without SImode and DImode. ;; All integer modes without SImode and DImode.
(define_mode_iterator SWI12 [QI HI]) (define_mode_iterator SWI12 [QI HI])
;; Single word integer modes without DImode. ;; All integer modes without DImode.
(define_mode_iterator SWI124 [QI HI SI]) (define_mode_iterator SWI124 [QI HI SI])
;; Single word integer modes without QImode and DImode. ;; All integer modes without QImode and DImode.
(define_mode_iterator SWI24 [HI SI]) (define_mode_iterator SWI24 [HI SI])
;; Single word integer modes.
(define_mode_iterator SWI [QI HI SI (DI "TARGET_64BIT")])
;; Single word integer modes without QImode. ;; Single word integer modes without QImode.
(define_mode_iterator SWI248 [HI SI (DI "TARGET_64BIT")]) (define_mode_iterator SWI248 [HI SI (DI "TARGET_64BIT")])
...@@ -824,7 +827,7 @@ ...@@ -824,7 +827,7 @@
(HI "TARGET_HIMODE_MATH") (HI "TARGET_HIMODE_MATH")
SI (DI "TARGET_64BIT")]) SI (DI "TARGET_64BIT")])
;; Math-dependant single word integer modes without DImode. ;; Math-dependant integer modes without DImode.
(define_mode_iterator SWIM124 [(QI "TARGET_QIMODE_MATH") (define_mode_iterator SWIM124 [(QI "TARGET_QIMODE_MATH")
(HI "TARGET_HIMODE_MATH") (HI "TARGET_HIMODE_MATH")
SI]) SI])
...@@ -927,15 +930,6 @@ ...@@ -927,15 +930,6 @@
;; All x87 floating point modes ;; All x87 floating point modes
(define_mode_iterator X87MODEF [SF DF XF]) (define_mode_iterator X87MODEF [SF DF XF])
;; All integer modes handled by x87 fisttp operator.
(define_mode_iterator X87MODEI [HI SI DI])
;; All integer modes handled by integer x87 operators.
(define_mode_iterator X87MODEI12 [HI SI])
;; All integer modes handled by SSE cvtts?2si* operators.
(define_mode_iterator SSEMODEI24 [SI DI])
;; SSE instruction suffix for various modes ;; SSE instruction suffix for various modes
(define_mode_attr ssemodesuffix (define_mode_attr ssemodesuffix
[(SF "ss") (DF "sd") [(SF "ss") (DF "sd")
...@@ -1425,7 +1419,7 @@ ...@@ -1425,7 +1419,7 @@
[(compare:CCFP [(compare:CCFP
(match_operand 1 "register_operand" "f") (match_operand 1 "register_operand" "f")
(match_operator 3 "float_operator" (match_operator 3 "float_operator"
[(match_operand:X87MODEI12 2 "memory_operand" "m")]))] [(match_operand:SWI24 2 "memory_operand" "m")]))]
UNSPEC_FNSTSW))] UNSPEC_FNSTSW))]
"X87_FLOAT_MODE_P (GET_MODE (operands[1])) "X87_FLOAT_MODE_P (GET_MODE (operands[1]))
&& (TARGET_USE_<MODE>MODE_FIOP || optimize_function_for_size_p (cfun)) && (TARGET_USE_<MODE>MODE_FIOP || optimize_function_for_size_p (cfun))
...@@ -1441,7 +1435,7 @@ ...@@ -1441,7 +1435,7 @@
(compare:CCFP (compare:CCFP
(match_operand 1 "register_operand" "f") (match_operand 1 "register_operand" "f")
(match_operator 3 "float_operator" (match_operator 3 "float_operator"
[(match_operand:X87MODEI12 2 "memory_operand" "m")]))) [(match_operand:SWI24 2 "memory_operand" "m")])))
(clobber (match_operand:HI 0 "register_operand" "=a"))] (clobber (match_operand:HI 0 "register_operand" "=a"))]
"X87_FLOAT_MODE_P (GET_MODE (operands[1])) "X87_FLOAT_MODE_P (GET_MODE (operands[1]))
&& TARGET_SAHF && !TARGET_CMOVE && TARGET_SAHF && !TARGET_CMOVE
...@@ -4415,33 +4409,33 @@ ...@@ -4415,33 +4409,33 @@
(define_peephole2 (define_peephole2
[(set (match_operand:MODEF 0 "register_operand" "") [(set (match_operand:MODEF 0 "register_operand" "")
(match_operand:MODEF 1 "memory_operand" "")) (match_operand:MODEF 1 "memory_operand" ""))
(set (match_operand:SSEMODEI24 2 "register_operand" "") (set (match_operand:SWI48x 2 "register_operand" "")
(fix:SSEMODEI24 (match_dup 0)))] (fix:SWI48x (match_dup 0)))]
"TARGET_SHORTEN_X87_SSE "TARGET_SHORTEN_X87_SSE
&& !(TARGET_AVOID_VECTOR_DECODE && optimize_insn_for_speed_p ()) && !(TARGET_AVOID_VECTOR_DECODE && optimize_insn_for_speed_p ())
&& peep2_reg_dead_p (2, operands[0])" && peep2_reg_dead_p (2, operands[0])"
[(set (match_dup 2) (fix:SSEMODEI24 (match_dup 1)))]) [(set (match_dup 2) (fix:SWI48x (match_dup 1)))])
;; Avoid vector decoded forms of the instruction. ;; Avoid vector decoded forms of the instruction.
(define_peephole2 (define_peephole2
[(match_scratch:DF 2 "Y2") [(match_scratch:DF 2 "Y2")
(set (match_operand:SSEMODEI24 0 "register_operand" "") (set (match_operand:SWI48x 0 "register_operand" "")
(fix:SSEMODEI24 (match_operand:DF 1 "memory_operand" "")))] (fix:SWI48x (match_operand:DF 1 "memory_operand" "")))]
"TARGET_AVOID_VECTOR_DECODE && optimize_insn_for_speed_p ()" "TARGET_AVOID_VECTOR_DECODE && optimize_insn_for_speed_p ()"
[(set (match_dup 2) (match_dup 1)) [(set (match_dup 2) (match_dup 1))
(set (match_dup 0) (fix:SSEMODEI24 (match_dup 2)))]) (set (match_dup 0) (fix:SWI48x (match_dup 2)))])
(define_peephole2 (define_peephole2
[(match_scratch:SF 2 "x") [(match_scratch:SF 2 "x")
(set (match_operand:SSEMODEI24 0 "register_operand" "") (set (match_operand:SWI48x 0 "register_operand" "")
(fix:SSEMODEI24 (match_operand:SF 1 "memory_operand" "")))] (fix:SWI48x (match_operand:SF 1 "memory_operand" "")))]
"TARGET_AVOID_VECTOR_DECODE && optimize_insn_for_speed_p ()" "TARGET_AVOID_VECTOR_DECODE && optimize_insn_for_speed_p ()"
[(set (match_dup 2) (match_dup 1)) [(set (match_dup 2) (match_dup 1))
(set (match_dup 0) (fix:SSEMODEI24 (match_dup 2)))]) (set (match_dup 0) (fix:SWI48x (match_dup 2)))])
(define_insn_and_split "fix_trunc<mode>_fisttp_i387_1" (define_insn_and_split "fix_trunc<mode>_fisttp_i387_1"
[(set (match_operand:X87MODEI 0 "nonimmediate_operand" "") [(set (match_operand:SWI248x 0 "nonimmediate_operand" "")
(fix:X87MODEI (match_operand 1 "register_operand" "")))] (fix:SWI248x (match_operand 1 "register_operand" "")))]
"X87_FLOAT_MODE_P (GET_MODE (operands[1])) "X87_FLOAT_MODE_P (GET_MODE (operands[1]))
&& TARGET_FISTTP && TARGET_FISTTP
&& !((SSE_FLOAT_MODE_P (GET_MODE (operands[1])) && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1]))
...@@ -4467,8 +4461,8 @@ ...@@ -4467,8 +4461,8 @@
(set_attr "mode" "<MODE>")]) (set_attr "mode" "<MODE>")])
(define_insn "fix_trunc<mode>_i387_fisttp" (define_insn "fix_trunc<mode>_i387_fisttp"
[(set (match_operand:X87MODEI 0 "memory_operand" "=m") [(set (match_operand:SWI248x 0 "memory_operand" "=m")
(fix:X87MODEI (match_operand 1 "register_operand" "f"))) (fix:SWI248x (match_operand 1 "register_operand" "f")))
(clobber (match_scratch:XF 2 "=&1f"))] (clobber (match_scratch:XF 2 "=&1f"))]
"X87_FLOAT_MODE_P (GET_MODE (operands[1])) "X87_FLOAT_MODE_P (GET_MODE (operands[1]))
&& TARGET_FISTTP && TARGET_FISTTP
...@@ -4480,9 +4474,9 @@ ...@@ -4480,9 +4474,9 @@
(set_attr "mode" "<MODE>")]) (set_attr "mode" "<MODE>")])
(define_insn "fix_trunc<mode>_i387_fisttp_with_temp" (define_insn "fix_trunc<mode>_i387_fisttp_with_temp"
[(set (match_operand:X87MODEI 0 "nonimmediate_operand" "=m,?r") [(set (match_operand:SWI248x 0 "nonimmediate_operand" "=m,?r")
(fix:X87MODEI (match_operand 1 "register_operand" "f,f"))) (fix:SWI248x (match_operand 1 "register_operand" "f,f")))
(clobber (match_operand:X87MODEI 2 "memory_operand" "=X,m")) (clobber (match_operand:SWI248x 2 "memory_operand" "=X,m"))
(clobber (match_scratch:XF 3 "=&1f,&1f"))] (clobber (match_scratch:XF 3 "=&1f,&1f"))]
"X87_FLOAT_MODE_P (GET_MODE (operands[1])) "X87_FLOAT_MODE_P (GET_MODE (operands[1]))
&& TARGET_FISTTP && TARGET_FISTTP
...@@ -4494,22 +4488,22 @@ ...@@ -4494,22 +4488,22 @@
(set_attr "mode" "<MODE>")]) (set_attr "mode" "<MODE>")])
(define_split (define_split
[(set (match_operand:X87MODEI 0 "register_operand" "") [(set (match_operand:SWI248x 0 "register_operand" "")
(fix:X87MODEI (match_operand 1 "register_operand" ""))) (fix:SWI248x (match_operand 1 "register_operand" "")))
(clobber (match_operand:X87MODEI 2 "memory_operand" "")) (clobber (match_operand:SWI248x 2 "memory_operand" ""))
(clobber (match_scratch 3 ""))] (clobber (match_scratch 3 ""))]
"reload_completed" "reload_completed"
[(parallel [(set (match_dup 2) (fix:X87MODEI (match_dup 1))) [(parallel [(set (match_dup 2) (fix:SWI248x (match_dup 1)))
(clobber (match_dup 3))]) (clobber (match_dup 3))])
(set (match_dup 0) (match_dup 2))]) (set (match_dup 0) (match_dup 2))])
(define_split (define_split
[(set (match_operand:X87MODEI 0 "memory_operand" "") [(set (match_operand:SWI248x 0 "memory_operand" "")
(fix:X87MODEI (match_operand 1 "register_operand" ""))) (fix:SWI248x (match_operand 1 "register_operand" "")))
(clobber (match_operand:X87MODEI 2 "memory_operand" "")) (clobber (match_operand:SWI248x 2 "memory_operand" ""))
(clobber (match_scratch 3 ""))] (clobber (match_scratch 3 ""))]
"reload_completed" "reload_completed"
[(parallel [(set (match_dup 0) (fix:X87MODEI (match_dup 1))) [(parallel [(set (match_dup 0) (fix:SWI248x (match_dup 1)))
(clobber (match_dup 3))])]) (clobber (match_dup 3))])])
;; See the comments in i386.h near OPTIMIZE_MODE_SWITCHING for the description ;; See the comments in i386.h near OPTIMIZE_MODE_SWITCHING for the description
...@@ -4518,8 +4512,8 @@ ...@@ -4518,8 +4512,8 @@
;; clobbering insns can be used. Look at emit_i387_cw_initialization () ;; clobbering insns can be used. Look at emit_i387_cw_initialization ()
;; function in i386.c. ;; function in i386.c.
(define_insn_and_split "*fix_trunc<mode>_i387_1" (define_insn_and_split "*fix_trunc<mode>_i387_1"
[(set (match_operand:X87MODEI 0 "nonimmediate_operand" "") [(set (match_operand:SWI248x 0 "nonimmediate_operand" "")
(fix:X87MODEI (match_operand 1 "register_operand" ""))) (fix:SWI248x (match_operand 1 "register_operand" "")))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"X87_FLOAT_MODE_P (GET_MODE (operands[1])) "X87_FLOAT_MODE_P (GET_MODE (operands[1]))
&& !TARGET_FISTTP && !TARGET_FISTTP
...@@ -4607,8 +4601,8 @@ ...@@ -4607,8 +4601,8 @@
(clobber (match_dup 5))])]) (clobber (match_dup 5))])])
(define_insn "fix_trunc<mode>_i387" (define_insn "fix_trunc<mode>_i387"
[(set (match_operand:X87MODEI12 0 "memory_operand" "=m") [(set (match_operand:SWI24 0 "memory_operand" "=m")
(fix:X87MODEI12 (match_operand 1 "register_operand" "f"))) (fix:SWI24 (match_operand 1 "register_operand" "f")))
(use (match_operand:HI 2 "memory_operand" "m")) (use (match_operand:HI 2 "memory_operand" "m"))
(use (match_operand:HI 3 "memory_operand" "m"))] (use (match_operand:HI 3 "memory_operand" "m"))]
"X87_FLOAT_MODE_P (GET_MODE (operands[1])) "X87_FLOAT_MODE_P (GET_MODE (operands[1]))
...@@ -4620,11 +4614,11 @@ ...@@ -4620,11 +4614,11 @@
(set_attr "mode" "<MODE>")]) (set_attr "mode" "<MODE>")])
(define_insn "fix_trunc<mode>_i387_with_temp" (define_insn "fix_trunc<mode>_i387_with_temp"
[(set (match_operand:X87MODEI12 0 "nonimmediate_operand" "=m,?r") [(set (match_operand:SWI24 0 "nonimmediate_operand" "=m,?r")
(fix:X87MODEI12 (match_operand 1 "register_operand" "f,f"))) (fix:SWI24 (match_operand 1 "register_operand" "f,f")))
(use (match_operand:HI 2 "memory_operand" "m,m")) (use (match_operand:HI 2 "memory_operand" "m,m"))
(use (match_operand:HI 3 "memory_operand" "m,m")) (use (match_operand:HI 3 "memory_operand" "m,m"))
(clobber (match_operand:X87MODEI12 4 "memory_operand" "=X,m"))] (clobber (match_operand:SWI24 4 "memory_operand" "=X,m"))]
"X87_FLOAT_MODE_P (GET_MODE (operands[1])) "X87_FLOAT_MODE_P (GET_MODE (operands[1]))
&& !TARGET_FISTTP && !TARGET_FISTTP
&& !SSE_FLOAT_MODE_P (GET_MODE (operands[1]))" && !SSE_FLOAT_MODE_P (GET_MODE (operands[1]))"
...@@ -4634,25 +4628,25 @@ ...@@ -4634,25 +4628,25 @@
(set_attr "mode" "<MODE>")]) (set_attr "mode" "<MODE>")])
(define_split (define_split
[(set (match_operand:X87MODEI12 0 "register_operand" "") [(set (match_operand:SWI24 0 "register_operand" "")
(fix:X87MODEI12 (match_operand 1 "register_operand" ""))) (fix:SWI24 (match_operand 1 "register_operand" "")))
(use (match_operand:HI 2 "memory_operand" "")) (use (match_operand:HI 2 "memory_operand" ""))
(use (match_operand:HI 3 "memory_operand" "")) (use (match_operand:HI 3 "memory_operand" ""))
(clobber (match_operand:X87MODEI12 4 "memory_operand" ""))] (clobber (match_operand:SWI24 4 "memory_operand" ""))]
"reload_completed" "reload_completed"
[(parallel [(set (match_dup 4) (fix:X87MODEI12 (match_dup 1))) [(parallel [(set (match_dup 4) (fix:SWI24 (match_dup 1)))
(use (match_dup 2)) (use (match_dup 2))
(use (match_dup 3))]) (use (match_dup 3))])
(set (match_dup 0) (match_dup 4))]) (set (match_dup 0) (match_dup 4))])
(define_split (define_split
[(set (match_operand:X87MODEI12 0 "memory_operand" "") [(set (match_operand:SWI24 0 "memory_operand" "")
(fix:X87MODEI12 (match_operand 1 "register_operand" ""))) (fix:SWI24 (match_operand 1 "register_operand" "")))
(use (match_operand:HI 2 "memory_operand" "")) (use (match_operand:HI 2 "memory_operand" ""))
(use (match_operand:HI 3 "memory_operand" "")) (use (match_operand:HI 3 "memory_operand" ""))
(clobber (match_operand:X87MODEI12 4 "memory_operand" ""))] (clobber (match_operand:SWI24 4 "memory_operand" ""))]
"reload_completed" "reload_completed"
[(parallel [(set (match_dup 0) (fix:X87MODEI12 (match_dup 1))) [(parallel [(set (match_dup 0) (fix:SWI24 (match_dup 1)))
(use (match_dup 2)) (use (match_dup 2))
(use (match_dup 3))])]) (use (match_dup 3))])])
...@@ -4752,22 +4746,22 @@ ...@@ -4752,22 +4746,22 @@
&& reload_completed" && reload_completed"
[(set (match_dup 0) (float:X87MODEF (match_dup 1)))]) [(set (match_dup 0) (float:X87MODEF (match_dup 1)))])
(define_expand "float<SSEMODEI24:mode><X87MODEF:mode>2" (define_expand "float<SWI48x:mode><X87MODEF:mode>2"
[(set (match_operand:X87MODEF 0 "register_operand" "") [(set (match_operand:X87MODEF 0 "register_operand" "")
(float:X87MODEF (float:X87MODEF
(match_operand:SSEMODEI24 1 "nonimmediate_operand" "")))] (match_operand:SWI48x 1 "nonimmediate_operand" "")))]
"TARGET_80387 "TARGET_80387
|| ((<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT) || ((<SWI48x:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<X87MODEF:MODE>mode) && TARGET_SSE_MATH)" && SSE_FLOAT_MODE_P (<X87MODEF:MODE>mode) && TARGET_SSE_MATH)"
{ {
if (!((<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT) if (!((<SWI48x:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<X87MODEF:MODE>mode) && TARGET_SSE_MATH) && SSE_FLOAT_MODE_P (<X87MODEF:MODE>mode) && TARGET_SSE_MATH)
&& !X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, <SSEMODEI24:MODE>mode)) && !X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, <SWI48x:MODE>mode))
{ {
rtx reg = gen_reg_rtx (XFmode); rtx reg = gen_reg_rtx (XFmode);
rtx (*insn)(rtx, rtx); rtx (*insn)(rtx, rtx);
emit_insn (gen_float<SSEMODEI24:mode>xf2 (reg, operands[1])); emit_insn (gen_float<SWI48x:mode>xf2 (reg, operands[1]));
if (<X87MODEF:MODE>mode == SFmode) if (<X87MODEF:MODE>mode == SFmode)
insn = gen_truncxfsf2; insn = gen_truncxfsf2;
...@@ -4782,17 +4776,17 @@ ...@@ -4782,17 +4776,17 @@
}) })
;; Pre-reload splitter to add memory clobber to the pattern. ;; Pre-reload splitter to add memory clobber to the pattern.
(define_insn_and_split "*float<SSEMODEI24:mode><X87MODEF:mode>2_1" (define_insn_and_split "*float<SWI48x:mode><X87MODEF:mode>2_1"
[(set (match_operand:X87MODEF 0 "register_operand" "") [(set (match_operand:X87MODEF 0 "register_operand" "")
(float:X87MODEF (match_operand:SSEMODEI24 1 "register_operand" "")))] (float:X87MODEF (match_operand:SWI48x 1 "register_operand" "")))]
"((TARGET_80387 "((TARGET_80387
&& X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, <SSEMODEI24:MODE>mode) && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, <SWI48x:MODE>mode)
&& (!((<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT) && (!((<SWI48x:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<X87MODEF:MODE>mode) && TARGET_SSE_MATH) && SSE_FLOAT_MODE_P (<X87MODEF:MODE>mode) && TARGET_SSE_MATH)
|| TARGET_MIX_SSE_I387)) || TARGET_MIX_SSE_I387))
|| ((<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT) || ((<SWI48x:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<X87MODEF:MODE>mode) && TARGET_SSE_MATH && SSE_FLOAT_MODE_P (<X87MODEF:MODE>mode) && TARGET_SSE_MATH
&& ((<SSEMODEI24:MODE>mode == SImode && ((<SWI48x:MODE>mode == SImode
&& TARGET_SSE2 && TARGET_USE_VECTOR_CONVERTS && TARGET_SSE2 && TARGET_USE_VECTOR_CONVERTS
&& optimize_function_for_speed_p (cfun) && optimize_function_for_speed_p (cfun)
&& flag_trapping_math) && flag_trapping_math)
...@@ -4804,11 +4798,11 @@ ...@@ -4804,11 +4798,11 @@
[(parallel [(set (match_dup 0) (float:X87MODEF (match_dup 1))) [(parallel [(set (match_dup 0) (float:X87MODEF (match_dup 1)))
(clobber (match_dup 2))])] (clobber (match_dup 2))])]
{ {
operands[2] = assign_386_stack_local (<SSEMODEI24:MODE>mode, SLOT_TEMP); operands[2] = assign_386_stack_local (<SWI48x:MODE>mode, SLOT_TEMP);
/* Avoid store forwarding (partial memory) stall penalty /* Avoid store forwarding (partial memory) stall penalty
by passing DImode value through XMM registers. */ by passing DImode value through XMM registers. */
if (<SSEMODEI24:MODE>mode == DImode && !TARGET_64BIT if (<SWI48x:MODE>mode == DImode && !TARGET_64BIT
&& TARGET_80387 && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES && TARGET_80387 && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES
&& optimize_function_for_speed_p (cfun)) && optimize_function_for_speed_p (cfun))
{ {
...@@ -4851,12 +4845,12 @@ ...@@ -4851,12 +4845,12 @@
(set_attr "bdver1_decode" "*,direct") (set_attr "bdver1_decode" "*,direct")
(set_attr "fp_int_src" "true")]) (set_attr "fp_int_src" "true")])
(define_insn "*float<SSEMODEI24:mode><MODEF:mode>2_mixed_with_temp" (define_insn "*float<SWI48x:mode><MODEF:mode>2_mixed_with_temp"
[(set (match_operand:MODEF 0 "register_operand" "=f,f,x,x") [(set (match_operand:MODEF 0 "register_operand" "=f,f,x,x")
(float:MODEF (float:MODEF
(match_operand:SSEMODEI24 1 "nonimmediate_operand" "m,?r,r,m"))) (match_operand:SWI48x 1 "nonimmediate_operand" "m,?r,r,m")))
(clobber (match_operand:SSEMODEI24 2 "memory_operand" "=X,m,m,X"))] (clobber (match_operand:SWI48x 2 "memory_operand" "=X,m,m,X"))]
"(<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT) "(<SWI48x:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_MIX_SSE_I387" && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_MIX_SSE_I387"
"#" "#"
[(set_attr "type" "fmov,multi,sseicvt,sseicvt") [(set_attr "type" "fmov,multi,sseicvt,sseicvt")
...@@ -4869,9 +4863,9 @@ ...@@ -4869,9 +4863,9 @@
(define_split (define_split
[(set (match_operand:MODEF 0 "register_operand" "") [(set (match_operand:MODEF 0 "register_operand" "")
(float:MODEF (match_operand:SSEMODEI24 1 "register_operand" ""))) (float:MODEF (match_operand:SWI48x 1 "register_operand" "")))
(clobber (match_operand:SSEMODEI24 2 "memory_operand" ""))] (clobber (match_operand:SWI48x 2 "memory_operand" ""))]
"(<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT) "(<SWI48x:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_MIX_SSE_I387 && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_MIX_SSE_I387
&& TARGET_INTER_UNIT_CONVERSIONS && TARGET_INTER_UNIT_CONVERSIONS
&& reload_completed && reload_completed
...@@ -4882,9 +4876,9 @@ ...@@ -4882,9 +4876,9 @@
(define_split (define_split
[(set (match_operand:MODEF 0 "register_operand" "") [(set (match_operand:MODEF 0 "register_operand" "")
(float:MODEF (match_operand:SSEMODEI24 1 "register_operand" ""))) (float:MODEF (match_operand:SWI48x 1 "register_operand" "")))
(clobber (match_operand:SSEMODEI24 2 "memory_operand" ""))] (clobber (match_operand:SWI48x 2 "memory_operand" ""))]
"(<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT) "(<SWI48x:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_MIX_SSE_I387 && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_MIX_SSE_I387
&& !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun)) && !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))
&& reload_completed && reload_completed
...@@ -4894,24 +4888,24 @@ ...@@ -4894,24 +4888,24 @@
[(set (match_dup 2) (match_dup 1)) [(set (match_dup 2) (match_dup 1))
(set (match_dup 0) (float:MODEF (match_dup 2)))]) (set (match_dup 0) (float:MODEF (match_dup 2)))])
(define_insn "*float<SSEMODEI24:mode><MODEF:mode>2_mixed_interunit" (define_insn "*float<SWI48x:mode><MODEF:mode>2_mixed_interunit"
[(set (match_operand:MODEF 0 "register_operand" "=f,x,x") [(set (match_operand:MODEF 0 "register_operand" "=f,x,x")
(float:MODEF (float:MODEF
(match_operand:SSEMODEI24 1 "nonimmediate_operand" "m,r,m")))] (match_operand:SWI48x 1 "nonimmediate_operand" "m,r,m")))]
"(<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT) "(<SWI48x:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_MIX_SSE_I387 && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_MIX_SSE_I387
&& (TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))" && (TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))"
"@ "@
fild%Z1\t%1 fild%Z1\t%1
%vcvtsi2<MODEF:ssemodesuffix><SSEMODEI24:rex64suffix>\t{%1, %d0|%d0, %1} %vcvtsi2<MODEF:ssemodesuffix><SWI48x:rex64suffix>\t{%1, %d0|%d0, %1}
%vcvtsi2<MODEF:ssemodesuffix><SSEMODEI24:rex64suffix>\t{%1, %d0|%d0, %1}" %vcvtsi2<MODEF:ssemodesuffix><SWI48x:rex64suffix>\t{%1, %d0|%d0, %1}"
[(set_attr "type" "fmov,sseicvt,sseicvt") [(set_attr "type" "fmov,sseicvt,sseicvt")
(set_attr "prefix" "orig,maybe_vex,maybe_vex") (set_attr "prefix" "orig,maybe_vex,maybe_vex")
(set_attr "mode" "<MODEF:MODE>") (set_attr "mode" "<MODEF:MODE>")
(set (attr "prefix_rex") (set (attr "prefix_rex")
(if_then_else (if_then_else
(and (eq_attr "prefix" "maybe_vex") (and (eq_attr "prefix" "maybe_vex")
(ne (symbol_ref "<SSEMODEI24:MODE>mode == DImode") (const_int 0))) (ne (symbol_ref "<SWI48x:MODE>mode == DImode") (const_int 0)))
(const_string "1") (const_string "1")
(const_string "*"))) (const_string "*")))
(set_attr "unit" "i387,*,*") (set_attr "unit" "i387,*,*")
...@@ -4920,23 +4914,23 @@ ...@@ -4920,23 +4914,23 @@
(set_attr "bdver1_decode" "*,double,direct") (set_attr "bdver1_decode" "*,double,direct")
(set_attr "fp_int_src" "true")]) (set_attr "fp_int_src" "true")])
(define_insn "*float<SSEMODEI24:mode><MODEF:mode>2_mixed_nointerunit" (define_insn "*float<SWI48x:mode><MODEF:mode>2_mixed_nointerunit"
[(set (match_operand:MODEF 0 "register_operand" "=f,x") [(set (match_operand:MODEF 0 "register_operand" "=f,x")
(float:MODEF (float:MODEF
(match_operand:SSEMODEI24 1 "memory_operand" "m,m")))] (match_operand:SWI48x 1 "memory_operand" "m,m")))]
"(<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT) "(<SWI48x:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_MIX_SSE_I387 && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_MIX_SSE_I387
&& !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))" && !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))"
"@ "@
fild%Z1\t%1 fild%Z1\t%1
%vcvtsi2<MODEF:ssemodesuffix><SSEMODEI24:rex64suffix>\t{%1, %d0|%d0, %1}" %vcvtsi2<MODEF:ssemodesuffix><SWI48x:rex64suffix>\t{%1, %d0|%d0, %1}"
[(set_attr "type" "fmov,sseicvt") [(set_attr "type" "fmov,sseicvt")
(set_attr "prefix" "orig,maybe_vex") (set_attr "prefix" "orig,maybe_vex")
(set_attr "mode" "<MODEF:MODE>") (set_attr "mode" "<MODEF:MODE>")
(set (attr "prefix_rex") (set (attr "prefix_rex")
(if_then_else (if_then_else
(and (eq_attr "prefix" "maybe_vex") (and (eq_attr "prefix" "maybe_vex")
(ne (symbol_ref "<SSEMODEI24:MODE>mode == DImode") (const_int 0))) (ne (symbol_ref "<SWI48x:MODE>mode == DImode") (const_int 0)))
(const_string "1") (const_string "1")
(const_string "*"))) (const_string "*")))
(set_attr "athlon_decode" "*,direct") (set_attr "athlon_decode" "*,direct")
...@@ -5093,12 +5087,12 @@ ...@@ -5093,12 +5087,12 @@
DONE; DONE;
}) })
(define_insn "*float<SSEMODEI24:mode><MODEF:mode>2_sse_with_temp" (define_insn "*float<SWI48x:mode><MODEF:mode>2_sse_with_temp"
[(set (match_operand:MODEF 0 "register_operand" "=x,x") [(set (match_operand:MODEF 0 "register_operand" "=x,x")
(float:MODEF (float:MODEF
(match_operand:SSEMODEI24 1 "nonimmediate_operand" "r,m"))) (match_operand:SWI48x 1 "nonimmediate_operand" "r,m")))
(clobber (match_operand:SSEMODEI24 2 "memory_operand" "=m,X"))] (clobber (match_operand:SWI48x 2 "memory_operand" "=m,X"))]
"(<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT) "(<SWI48x:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH" && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH"
"#" "#"
[(set_attr "type" "sseicvt") [(set_attr "type" "sseicvt")
...@@ -5108,21 +5102,21 @@ ...@@ -5108,21 +5102,21 @@
(set_attr "bdver1_decode" "double,direct") (set_attr "bdver1_decode" "double,direct")
(set_attr "fp_int_src" "true")]) (set_attr "fp_int_src" "true")])
(define_insn "*float<SSEMODEI24:mode><MODEF:mode>2_sse_interunit" (define_insn "*float<SWI48x:mode><MODEF:mode>2_sse_interunit"
[(set (match_operand:MODEF 0 "register_operand" "=x,x") [(set (match_operand:MODEF 0 "register_operand" "=x,x")
(float:MODEF (float:MODEF
(match_operand:SSEMODEI24 1 "nonimmediate_operand" "r,m")))] (match_operand:SWI48x 1 "nonimmediate_operand" "r,m")))]
"(<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT) "(<SWI48x:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
&& (TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))" && (TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))"
"%vcvtsi2<MODEF:ssemodesuffix><SSEMODEI24:rex64suffix>\t{%1, %d0|%d0, %1}" "%vcvtsi2<MODEF:ssemodesuffix><SWI48x:rex64suffix>\t{%1, %d0|%d0, %1}"
[(set_attr "type" "sseicvt") [(set_attr "type" "sseicvt")
(set_attr "prefix" "maybe_vex") (set_attr "prefix" "maybe_vex")
(set_attr "mode" "<MODEF:MODE>") (set_attr "mode" "<MODEF:MODE>")
(set (attr "prefix_rex") (set (attr "prefix_rex")
(if_then_else (if_then_else
(and (eq_attr "prefix" "maybe_vex") (and (eq_attr "prefix" "maybe_vex")
(ne (symbol_ref "<SSEMODEI24:MODE>mode == DImode") (const_int 0))) (ne (symbol_ref "<SWI48x:MODE>mode == DImode") (const_int 0)))
(const_string "1") (const_string "1")
(const_string "*"))) (const_string "*")))
(set_attr "athlon_decode" "double,direct") (set_attr "athlon_decode" "double,direct")
...@@ -5132,9 +5126,9 @@ ...@@ -5132,9 +5126,9 @@
(define_split (define_split
[(set (match_operand:MODEF 0 "register_operand" "") [(set (match_operand:MODEF 0 "register_operand" "")
(float:MODEF (match_operand:SSEMODEI24 1 "nonimmediate_operand" ""))) (float:MODEF (match_operand:SWI48x 1 "nonimmediate_operand" "")))
(clobber (match_operand:SSEMODEI24 2 "memory_operand" ""))] (clobber (match_operand:SWI48x 2 "memory_operand" ""))]
"(<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT) "(<SWI48x:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
&& (TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun)) && (TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))
&& reload_completed && reload_completed
...@@ -5143,21 +5137,21 @@ ...@@ -5143,21 +5137,21 @@
&& SSE_REG_P (operands[0])))" && SSE_REG_P (operands[0])))"
[(set (match_dup 0) (float:MODEF (match_dup 1)))]) [(set (match_dup 0) (float:MODEF (match_dup 1)))])
(define_insn "*float<SSEMODEI24:mode><MODEF:mode>2_sse_nointerunit" (define_insn "*float<SWI48x:mode><MODEF:mode>2_sse_nointerunit"
[(set (match_operand:MODEF 0 "register_operand" "=x") [(set (match_operand:MODEF 0 "register_operand" "=x")
(float:MODEF (float:MODEF
(match_operand:SSEMODEI24 1 "memory_operand" "m")))] (match_operand:SWI48x 1 "memory_operand" "m")))]
"(<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT) "(<SWI48x:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
&& !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))" && !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))"
"%vcvtsi2<MODEF:ssemodesuffix><SSEMODEI24:rex64suffix>\t{%1, %d0|%d0, %1}" "%vcvtsi2<MODEF:ssemodesuffix><SWI48x:rex64suffix>\t{%1, %d0|%d0, %1}"
[(set_attr "type" "sseicvt") [(set_attr "type" "sseicvt")
(set_attr "prefix" "maybe_vex") (set_attr "prefix" "maybe_vex")
(set_attr "mode" "<MODEF:MODE>") (set_attr "mode" "<MODEF:MODE>")
(set (attr "prefix_rex") (set (attr "prefix_rex")
(if_then_else (if_then_else
(and (eq_attr "prefix" "maybe_vex") (and (eq_attr "prefix" "maybe_vex")
(ne (symbol_ref "<SSEMODEI24:MODE>mode == DImode") (const_int 0))) (ne (symbol_ref "<SWI48x:MODE>mode == DImode") (const_int 0)))
(const_string "1") (const_string "1")
(const_string "*"))) (const_string "*")))
(set_attr "athlon_decode" "direct") (set_attr "athlon_decode" "direct")
...@@ -5167,9 +5161,9 @@ ...@@ -5167,9 +5161,9 @@
(define_split (define_split
[(set (match_operand:MODEF 0 "register_operand" "") [(set (match_operand:MODEF 0 "register_operand" "")
(float:MODEF (match_operand:SSEMODEI24 1 "register_operand" ""))) (float:MODEF (match_operand:SWI48x 1 "register_operand" "")))
(clobber (match_operand:SSEMODEI24 2 "memory_operand" ""))] (clobber (match_operand:SWI48x 2 "memory_operand" ""))]
"(<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT) "(<SWI48x:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
&& !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun)) && !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))
&& reload_completed && reload_completed
...@@ -5181,9 +5175,9 @@ ...@@ -5181,9 +5175,9 @@
(define_split (define_split
[(set (match_operand:MODEF 0 "register_operand" "") [(set (match_operand:MODEF 0 "register_operand" "")
(float:MODEF (match_operand:SSEMODEI24 1 "memory_operand" ""))) (float:MODEF (match_operand:SWI48x 1 "memory_operand" "")))
(clobber (match_operand:SSEMODEI24 2 "memory_operand" ""))] (clobber (match_operand:SWI48x 2 "memory_operand" ""))]
"(<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT) "(<SWI48x:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
&& reload_completed && reload_completed
&& (SSE_REG_P (operands[0]) && (SSE_REG_P (operands[0])
...@@ -5191,13 +5185,13 @@ ...@@ -5191,13 +5185,13 @@
&& SSE_REG_P (operands[0])))" && SSE_REG_P (operands[0])))"
[(set (match_dup 0) (float:MODEF (match_dup 1)))]) [(set (match_dup 0) (float:MODEF (match_dup 1)))])
(define_insn "*float<SSEMODEI24:mode><X87MODEF:mode>2_i387_with_temp" (define_insn "*float<SWI48x:mode><X87MODEF:mode>2_i387_with_temp"
[(set (match_operand:X87MODEF 0 "register_operand" "=f,f") [(set (match_operand:X87MODEF 0 "register_operand" "=f,f")
(float:X87MODEF (float:X87MODEF
(match_operand:SSEMODEI24 1 "nonimmediate_operand" "m,?r"))) (match_operand:SWI48x 1 "nonimmediate_operand" "m,?r")))
(clobber (match_operand:SSEMODEI24 2 "memory_operand" "=X,m"))] (clobber (match_operand:SWI48x 2 "memory_operand" "=X,m"))]
"TARGET_80387 "TARGET_80387
&& X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, <SSEMODEI24:MODE>mode)" && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, <SWI48x:MODE>mode)"
"@ "@
fild%Z1\t%1 fild%Z1\t%1
#" #"
...@@ -5206,12 +5200,12 @@ ...@@ -5206,12 +5200,12 @@
(set_attr "unit" "*,i387") (set_attr "unit" "*,i387")
(set_attr "fp_int_src" "true")]) (set_attr "fp_int_src" "true")])
(define_insn "*float<SSEMODEI24:mode><X87MODEF:mode>2_i387" (define_insn "*float<SWI48x:mode><X87MODEF:mode>2_i387"
[(set (match_operand:X87MODEF 0 "register_operand" "=f") [(set (match_operand:X87MODEF 0 "register_operand" "=f")
(float:X87MODEF (float:X87MODEF
(match_operand:SSEMODEI24 1 "memory_operand" "m")))] (match_operand:SWI48x 1 "memory_operand" "m")))]
"TARGET_80387 "TARGET_80387
&& X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, <SSEMODEI24:MODE>mode)" && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, <SWI48x:MODE>mode)"
"fild%Z1\t%1" "fild%Z1\t%1"
[(set_attr "type" "fmov") [(set_attr "type" "fmov")
(set_attr "mode" "<X87MODEF:MODE>") (set_attr "mode" "<X87MODEF:MODE>")
...@@ -5219,20 +5213,20 @@ ...@@ -5219,20 +5213,20 @@
(define_split (define_split
[(set (match_operand:X87MODEF 0 "fp_register_operand" "") [(set (match_operand:X87MODEF 0 "fp_register_operand" "")
(float:X87MODEF (match_operand:SSEMODEI24 1 "register_operand" ""))) (float:X87MODEF (match_operand:SWI48x 1 "register_operand" "")))
(clobber (match_operand:SSEMODEI24 2 "memory_operand" ""))] (clobber (match_operand:SWI48x 2 "memory_operand" ""))]
"TARGET_80387 "TARGET_80387
&& X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, <SSEMODEI24:MODE>mode) && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, <SWI48x:MODE>mode)
&& reload_completed" && reload_completed"
[(set (match_dup 2) (match_dup 1)) [(set (match_dup 2) (match_dup 1))
(set (match_dup 0) (float:X87MODEF (match_dup 2)))]) (set (match_dup 0) (float:X87MODEF (match_dup 2)))])
(define_split (define_split
[(set (match_operand:X87MODEF 0 "fp_register_operand" "") [(set (match_operand:X87MODEF 0 "fp_register_operand" "")
(float:X87MODEF (match_operand:SSEMODEI24 1 "memory_operand" ""))) (float:X87MODEF (match_operand:SWI48x 1 "memory_operand" "")))
(clobber (match_operand:SSEMODEI24 2 "memory_operand" ""))] (clobber (match_operand:SWI48x 2 "memory_operand" ""))]
"TARGET_80387 "TARGET_80387
&& X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, <SSEMODEI24:MODE>mode) && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, <SWI48x:MODE>mode)
&& reload_completed" && reload_completed"
[(set (match_dup 0) (float:X87MODEF (match_dup 1)))]) [(set (match_dup 0) (float:X87MODEF (match_dup 1)))])
...@@ -10868,7 +10862,7 @@ ...@@ -10868,7 +10862,7 @@
(if_then_else (if_then_else
(match_operator 0 "ix86_swapped_fp_comparison_operator" (match_operator 0 "ix86_swapped_fp_comparison_operator"
[(match_operator 1 "float_operator" [(match_operator 1 "float_operator"
[(match_operand:X87MODEI12 2 "nonimmediate_operand" "m,?r")]) [(match_operand:SWI24 2 "nonimmediate_operand" "m,?r")])
(match_operand 3 "register_operand" "f,f")]) (match_operand 3 "register_operand" "f,f")])
(label_ref (match_operand 4 "" "")) (label_ref (match_operand 4 "" ""))
(pc))) (pc)))
...@@ -10887,7 +10881,7 @@ ...@@ -10887,7 +10881,7 @@
(if_then_else (if_then_else
(match_operator 0 "ix86_swapped_fp_comparison_operator" (match_operator 0 "ix86_swapped_fp_comparison_operator"
[(match_operator 1 "float_operator" [(match_operator 1 "float_operator"
[(match_operand:X87MODEI12 2 "memory_operand" "")]) [(match_operand:SWI24 2 "memory_operand" "")])
(match_operand 3 "register_operand" "")]) (match_operand 3 "register_operand" "")])
(match_operand 4 "" "") (match_operand 4 "" "")
(match_operand 5 "" ""))) (match_operand 5 "" "")))
...@@ -10911,7 +10905,7 @@ ...@@ -10911,7 +10905,7 @@
(if_then_else (if_then_else
(match_operator 0 "ix86_swapped_fp_comparison_operator" (match_operator 0 "ix86_swapped_fp_comparison_operator"
[(match_operator 1 "float_operator" [(match_operator 1 "float_operator"
[(match_operand:X87MODEI12 2 "register_operand" "")]) [(match_operand:SWI24 2 "register_operand" "")])
(match_operand 3 "register_operand" "")]) (match_operand 3 "register_operand" "")])
(match_operand 4 "" "") (match_operand 4 "" "")
(match_operand 5 "" ""))) (match_operand 5 "" "")))
...@@ -12817,11 +12811,11 @@ ...@@ -12817,11 +12811,11 @@
[(set (match_operand:MODEF 0 "register_operand" "=f,f") [(set (match_operand:MODEF 0 "register_operand" "=f,f")
(match_operator:MODEF 3 "binary_fp_operator" (match_operator:MODEF 3 "binary_fp_operator"
[(float:MODEF [(float:MODEF
(match_operand:X87MODEI12 1 "nonimmediate_operand" "m,?r")) (match_operand:SWI24 1 "nonimmediate_operand" "m,?r"))
(match_operand:MODEF 2 "register_operand" "0,0")]))] (match_operand:MODEF 2 "register_operand" "0,0")]))]
"TARGET_80387 && X87_ENABLE_FLOAT (<MODEF:MODE>mode, <X87MODEI12:MODE>mode) "TARGET_80387 && X87_ENABLE_FLOAT (<MODEF:MODE>mode, <SWI24:MODE>mode)
&& !(SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH) && !(SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH)
&& (TARGET_USE_<X87MODEI12:MODE>MODE_FIOP || optimize_function_for_size_p (cfun))" && (TARGET_USE_<SWI24:MODE>MODE_FIOP || optimize_function_for_size_p (cfun))"
"* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);" "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
[(set (attr "type") [(set (attr "type")
(cond [(match_operand:MODEF 3 "mult_operator" "") (cond [(match_operand:MODEF 3 "mult_operator" "")
...@@ -12831,17 +12825,17 @@ ...@@ -12831,17 +12825,17 @@
] ]
(const_string "fop"))) (const_string "fop")))
(set_attr "fp_int_src" "true") (set_attr "fp_int_src" "true")
(set_attr "mode" "<X87MODEI12:MODE>")]) (set_attr "mode" "<SWI24:MODE>")])
(define_insn "*fop_<MODEF:mode>_3_i387" (define_insn "*fop_<MODEF:mode>_3_i387"
[(set (match_operand:MODEF 0 "register_operand" "=f,f") [(set (match_operand:MODEF 0 "register_operand" "=f,f")
(match_operator:MODEF 3 "binary_fp_operator" (match_operator:MODEF 3 "binary_fp_operator"
[(match_operand:MODEF 1 "register_operand" "0,0") [(match_operand:MODEF 1 "register_operand" "0,0")
(float:MODEF (float:MODEF
(match_operand:X87MODEI12 2 "nonimmediate_operand" "m,?r"))]))] (match_operand:SWI24 2 "nonimmediate_operand" "m,?r"))]))]
"TARGET_80387 && X87_ENABLE_FLOAT (<MODEF:MODE>mode, <X87MODEI12:MODE>mode) "TARGET_80387 && X87_ENABLE_FLOAT (<MODEF:MODE>mode, <SWI24:MODE>mode)
&& !(SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH) && !(SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH)
&& (TARGET_USE_<X87MODEI12:MODE>MODE_FIOP || optimize_function_for_size_p (cfun))" && (TARGET_USE_<SWI24:MODE>MODE_FIOP || optimize_function_for_size_p (cfun))"
"* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);" "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
[(set (attr "type") [(set (attr "type")
(cond [(match_operand:MODEF 3 "mult_operator" "") (cond [(match_operand:MODEF 3 "mult_operator" "")
...@@ -12944,7 +12938,7 @@ ...@@ -12944,7 +12938,7 @@
[(set (match_operand:XF 0 "register_operand" "=f,f") [(set (match_operand:XF 0 "register_operand" "=f,f")
(match_operator:XF 3 "binary_fp_operator" (match_operator:XF 3 "binary_fp_operator"
[(float:XF [(float:XF
(match_operand:X87MODEI12 1 "nonimmediate_operand" "m,?r")) (match_operand:SWI24 1 "nonimmediate_operand" "m,?r"))
(match_operand:XF 2 "register_operand" "0,0")]))] (match_operand:XF 2 "register_operand" "0,0")]))]
"TARGET_80387 && (TARGET_USE_<MODE>MODE_FIOP || optimize_function_for_size_p (cfun))" "TARGET_80387 && (TARGET_USE_<MODE>MODE_FIOP || optimize_function_for_size_p (cfun))"
"* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);" "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
...@@ -12963,7 +12957,7 @@ ...@@ -12963,7 +12957,7 @@
(match_operator:XF 3 "binary_fp_operator" (match_operator:XF 3 "binary_fp_operator"
[(match_operand:XF 1 "register_operand" "0,0") [(match_operand:XF 1 "register_operand" "0,0")
(float:XF (float:XF
(match_operand:X87MODEI12 2 "nonimmediate_operand" "m,?r"))]))] (match_operand:SWI24 2 "nonimmediate_operand" "m,?r"))]))]
"TARGET_80387 && (TARGET_USE_<MODE>MODE_FIOP || optimize_function_for_size_p (cfun))" "TARGET_80387 && (TARGET_USE_<MODE>MODE_FIOP || optimize_function_for_size_p (cfun))"
"* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);" "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
[(set (attr "type") [(set (attr "type")
...@@ -13031,7 +13025,7 @@ ...@@ -13031,7 +13025,7 @@
(define_split (define_split
[(set (match_operand 0 "register_operand" "") [(set (match_operand 0 "register_operand" "")
(match_operator 3 "binary_fp_operator" (match_operator 3 "binary_fp_operator"
[(float (match_operand:X87MODEI12 1 "register_operand" "")) [(float (match_operand:SWI24 1 "register_operand" ""))
(match_operand 2 "register_operand" "")]))] (match_operand 2 "register_operand" "")]))]
"reload_completed "reload_completed
&& X87_FLOAT_MODE_P (GET_MODE (operands[0])) && X87_FLOAT_MODE_P (GET_MODE (operands[0]))
...@@ -13053,7 +13047,7 @@ ...@@ -13053,7 +13047,7 @@
[(set (match_operand 0 "register_operand" "") [(set (match_operand 0 "register_operand" "")
(match_operator 3 "binary_fp_operator" (match_operator 3 "binary_fp_operator"
[(match_operand 1 "register_operand" "") [(match_operand 1 "register_operand" "")
(float (match_operand:X87MODEI12 2 "register_operand" ""))]))] (float (match_operand:SWI24 2 "register_operand" ""))]))]
"reload_completed "reload_completed
&& X87_FLOAT_MODE_P (GET_MODE (operands[0])) && X87_FLOAT_MODE_P (GET_MODE (operands[0]))
&& X87_ENABLE_FLOAT (GET_MODE (operands[0]), GET_MODE (operands[2]))" && X87_ENABLE_FLOAT (GET_MODE (operands[0]), GET_MODE (operands[2]))"
...@@ -14439,8 +14433,8 @@ ...@@ -14439,8 +14433,8 @@
(clobber (match_dup 3))])]) (clobber (match_dup 3))])])
(define_insn_and_split "*fist<mode>2_1" (define_insn_and_split "*fist<mode>2_1"
[(set (match_operand:X87MODEI12 0 "register_operand" "") [(set (match_operand:SWI24 0 "register_operand" "")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "")] (unspec:SWI24 [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST))] UNSPEC_FIST))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& can_create_pseudo_p ()" && can_create_pseudo_p ()"
...@@ -14457,8 +14451,8 @@ ...@@ -14457,8 +14451,8 @@
(set_attr "mode" "<MODE>")]) (set_attr "mode" "<MODE>")])
(define_insn "fist<mode>2" (define_insn "fist<mode>2"
[(set (match_operand:X87MODEI12 0 "memory_operand" "=m") [(set (match_operand:SWI24 0 "memory_operand" "=m")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f")] (unspec:SWI24 [(match_operand:XF 1 "register_operand" "f")]
UNSPEC_FIST))] UNSPEC_FIST))]
"TARGET_USE_FANCY_MATH_387" "TARGET_USE_FANCY_MATH_387"
"* return output_fix_trunc (insn, operands, false);" "* return output_fix_trunc (insn, operands, false);"
...@@ -14466,50 +14460,50 @@ ...@@ -14466,50 +14460,50 @@
(set_attr "mode" "<MODE>")]) (set_attr "mode" "<MODE>")])
(define_insn "fist<mode>2_with_temp" (define_insn "fist<mode>2_with_temp"
[(set (match_operand:X87MODEI12 0 "register_operand" "=r") [(set (match_operand:SWI24 0 "register_operand" "=r")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f")] (unspec:SWI24 [(match_operand:XF 1 "register_operand" "f")]
UNSPEC_FIST)) UNSPEC_FIST))
(clobber (match_operand:X87MODEI12 2 "memory_operand" "=m"))] (clobber (match_operand:SWI24 2 "memory_operand" "=m"))]
"TARGET_USE_FANCY_MATH_387" "TARGET_USE_FANCY_MATH_387"
"#" "#"
[(set_attr "type" "fpspc") [(set_attr "type" "fpspc")
(set_attr "mode" "<MODE>")]) (set_attr "mode" "<MODE>")])
(define_split (define_split
[(set (match_operand:X87MODEI12 0 "register_operand" "") [(set (match_operand:SWI24 0 "register_operand" "")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "")] (unspec:SWI24 [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST)) UNSPEC_FIST))
(clobber (match_operand:X87MODEI12 2 "memory_operand" ""))] (clobber (match_operand:SWI24 2 "memory_operand" ""))]
"reload_completed" "reload_completed"
[(set (match_dup 2) (unspec:X87MODEI12 [(match_dup 1)] UNSPEC_FIST)) [(set (match_dup 2) (unspec:SWI24 [(match_dup 1)] UNSPEC_FIST))
(set (match_dup 0) (match_dup 2))]) (set (match_dup 0) (match_dup 2))])
(define_split (define_split
[(set (match_operand:X87MODEI12 0 "memory_operand" "") [(set (match_operand:SWI24 0 "memory_operand" "")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "")] (unspec:SWI24 [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST)) UNSPEC_FIST))
(clobber (match_operand:X87MODEI12 2 "memory_operand" ""))] (clobber (match_operand:SWI24 2 "memory_operand" ""))]
"reload_completed" "reload_completed"
[(set (match_dup 0) (unspec:X87MODEI12 [(match_dup 1)] UNSPEC_FIST))]) [(set (match_dup 0) (unspec:SWI24 [(match_dup 1)] UNSPEC_FIST))])
(define_expand "lrintxf<mode>2" (define_expand "lrintxf<mode>2"
[(set (match_operand:X87MODEI 0 "nonimmediate_operand" "") [(set (match_operand:SWI248x 0 "nonimmediate_operand" "")
(unspec:X87MODEI [(match_operand:XF 1 "register_operand" "")] (unspec:SWI248x [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST))] UNSPEC_FIST))]
"TARGET_USE_FANCY_MATH_387") "TARGET_USE_FANCY_MATH_387")
(define_expand "lrint<MODEF:mode><SSEMODEI24:mode>2" (define_expand "lrint<MODEF:mode><SWI48x:mode>2"
[(set (match_operand:SSEMODEI24 0 "nonimmediate_operand" "") [(set (match_operand:SWI48x 0 "nonimmediate_operand" "")
(unspec:SSEMODEI24 [(match_operand:MODEF 1 "register_operand" "")] (unspec:SWI48x [(match_operand:MODEF 1 "register_operand" "")]
UNSPEC_FIX_NOTRUNC))] UNSPEC_FIX_NOTRUNC))]
"SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH "SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
&& ((<SSEMODEI24:MODE>mode != DImode) || TARGET_64BIT)") && ((<SWI48x:MODE>mode != DImode) || TARGET_64BIT)")
(define_expand "lround<MODEF:mode><SSEMODEI24:mode>2" (define_expand "lround<MODEF:mode><SWI48x:mode>2"
[(match_operand:SSEMODEI24 0 "nonimmediate_operand" "") [(match_operand:SWI48x 0 "nonimmediate_operand" "")
(match_operand:MODEF 1 "register_operand" "")] (match_operand:MODEF 1 "register_operand" "")]
"SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH "SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
&& ((<SSEMODEI24:MODE>mode != DImode) || TARGET_64BIT) && ((<SWI48x:MODE>mode != DImode) || TARGET_64BIT)
&& !flag_trapping_math && !flag_rounding_math" && !flag_trapping_math && !flag_rounding_math"
{ {
if (optimize_insn_for_size_p ()) if (optimize_insn_for_size_p ())
...@@ -14611,8 +14605,8 @@ ...@@ -14611,8 +14605,8 @@
}) })
(define_insn_and_split "*fist<mode>2_floor_1" (define_insn_and_split "*fist<mode>2_floor_1"
[(set (match_operand:X87MODEI 0 "nonimmediate_operand" "") [(set (match_operand:SWI248x 0 "nonimmediate_operand" "")
(unspec:X87MODEI [(match_operand:XF 1 "register_operand" "")] (unspec:SWI248x [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST_FLOOR)) UNSPEC_FIST_FLOOR))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
...@@ -14680,7 +14674,8 @@ ...@@ -14680,7 +14674,8 @@
(clobber (match_operand:DI 4 "memory_operand" "")) (clobber (match_operand:DI 4 "memory_operand" ""))
(clobber (match_scratch 5 ""))] (clobber (match_scratch 5 ""))]
"reload_completed" "reload_completed"
[(parallel [(set (match_dup 4) (unspec:DI [(match_dup 1)] UNSPEC_FIST_FLOOR)) [(parallel [(set (match_dup 4)
(unspec:DI [(match_dup 1)] UNSPEC_FIST_FLOOR))
(use (match_dup 2)) (use (match_dup 2))
(use (match_dup 3)) (use (match_dup 3))
(clobber (match_dup 5))]) (clobber (match_dup 5))])
...@@ -14695,14 +14690,15 @@ ...@@ -14695,14 +14690,15 @@
(clobber (match_operand:DI 4 "memory_operand" "")) (clobber (match_operand:DI 4 "memory_operand" ""))
(clobber (match_scratch 5 ""))] (clobber (match_scratch 5 ""))]
"reload_completed" "reload_completed"
[(parallel [(set (match_dup 0) (unspec:DI [(match_dup 1)] UNSPEC_FIST_FLOOR)) [(parallel [(set (match_dup 0)
(unspec:DI [(match_dup 1)] UNSPEC_FIST_FLOOR))
(use (match_dup 2)) (use (match_dup 2))
(use (match_dup 3)) (use (match_dup 3))
(clobber (match_dup 5))])]) (clobber (match_dup 5))])])
(define_insn "fist<mode>2_floor" (define_insn "fist<mode>2_floor"
[(set (match_operand:X87MODEI12 0 "memory_operand" "=m") [(set (match_operand:SWI24 0 "memory_operand" "=m")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f")] (unspec:SWI24 [(match_operand:XF 1 "register_operand" "f")]
UNSPEC_FIST_FLOOR)) UNSPEC_FIST_FLOOR))
(use (match_operand:HI 2 "memory_operand" "m")) (use (match_operand:HI 2 "memory_operand" "m"))
(use (match_operand:HI 3 "memory_operand" "m"))] (use (match_operand:HI 3 "memory_operand" "m"))]
...@@ -14714,12 +14710,12 @@ ...@@ -14714,12 +14710,12 @@
(set_attr "mode" "<MODE>")]) (set_attr "mode" "<MODE>")])
(define_insn "fist<mode>2_floor_with_temp" (define_insn "fist<mode>2_floor_with_temp"
[(set (match_operand:X87MODEI12 0 "nonimmediate_operand" "=m,?r") [(set (match_operand:SWI24 0 "nonimmediate_operand" "=m,?r")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f,f")] (unspec:SWI24 [(match_operand:XF 1 "register_operand" "f,f")]
UNSPEC_FIST_FLOOR)) UNSPEC_FIST_FLOOR))
(use (match_operand:HI 2 "memory_operand" "m,m")) (use (match_operand:HI 2 "memory_operand" "m,m"))
(use (match_operand:HI 3 "memory_operand" "m,m")) (use (match_operand:HI 3 "memory_operand" "m,m"))
(clobber (match_operand:X87MODEI12 4 "memory_operand" "=X,m"))] (clobber (match_operand:SWI24 4 "memory_operand" "=X,m"))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations"
"#" "#"
...@@ -14728,35 +14724,35 @@ ...@@ -14728,35 +14724,35 @@
(set_attr "mode" "<MODE>")]) (set_attr "mode" "<MODE>")])
(define_split (define_split
[(set (match_operand:X87MODEI12 0 "register_operand" "") [(set (match_operand:SWI24 0 "register_operand" "")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "")] (unspec:SWI24 [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST_FLOOR)) UNSPEC_FIST_FLOOR))
(use (match_operand:HI 2 "memory_operand" "")) (use (match_operand:HI 2 "memory_operand" ""))
(use (match_operand:HI 3 "memory_operand" "")) (use (match_operand:HI 3 "memory_operand" ""))
(clobber (match_operand:X87MODEI12 4 "memory_operand" ""))] (clobber (match_operand:SWI24 4 "memory_operand" ""))]
"reload_completed" "reload_completed"
[(parallel [(set (match_dup 4) (unspec:X87MODEI12 [(match_dup 1)] [(parallel [(set (match_dup 4)
UNSPEC_FIST_FLOOR)) (unspec:SWI24 [(match_dup 1)] UNSPEC_FIST_FLOOR))
(use (match_dup 2)) (use (match_dup 2))
(use (match_dup 3))]) (use (match_dup 3))])
(set (match_dup 0) (match_dup 4))]) (set (match_dup 0) (match_dup 4))])
(define_split (define_split
[(set (match_operand:X87MODEI12 0 "memory_operand" "") [(set (match_operand:SWI24 0 "memory_operand" "")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "")] (unspec:SWI24 [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST_FLOOR)) UNSPEC_FIST_FLOOR))
(use (match_operand:HI 2 "memory_operand" "")) (use (match_operand:HI 2 "memory_operand" ""))
(use (match_operand:HI 3 "memory_operand" "")) (use (match_operand:HI 3 "memory_operand" ""))
(clobber (match_operand:X87MODEI12 4 "memory_operand" ""))] (clobber (match_operand:SWI24 4 "memory_operand" ""))]
"reload_completed" "reload_completed"
[(parallel [(set (match_dup 0) (unspec:X87MODEI12 [(match_dup 1)] [(parallel [(set (match_dup 0)
UNSPEC_FIST_FLOOR)) (unspec:SWI24 [(match_dup 1)] UNSPEC_FIST_FLOOR))
(use (match_dup 2)) (use (match_dup 2))
(use (match_dup 3))])]) (use (match_dup 3))])])
(define_expand "lfloorxf<mode>2" (define_expand "lfloorxf<mode>2"
[(parallel [(set (match_operand:X87MODEI 0 "nonimmediate_operand" "") [(parallel [(set (match_operand:SWI248x 0 "nonimmediate_operand" "")
(unspec:X87MODEI [(match_operand:XF 1 "register_operand" "")] (unspec:SWI248x [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST_FLOOR)) UNSPEC_FIST_FLOOR))
(clobber (reg:CC FLAGS_REG))])] (clobber (reg:CC FLAGS_REG))])]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
...@@ -14868,8 +14864,8 @@ ...@@ -14868,8 +14864,8 @@
}) })
(define_insn_and_split "*fist<mode>2_ceil_1" (define_insn_and_split "*fist<mode>2_ceil_1"
[(set (match_operand:X87MODEI 0 "nonimmediate_operand" "") [(set (match_operand:SWI248x 0 "nonimmediate_operand" "")
(unspec:X87MODEI [(match_operand:XF 1 "register_operand" "")] (unspec:SWI248x [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST_CEIL)) UNSPEC_FIST_CEIL))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
...@@ -14937,7 +14933,8 @@ ...@@ -14937,7 +14933,8 @@
(clobber (match_operand:DI 4 "memory_operand" "")) (clobber (match_operand:DI 4 "memory_operand" ""))
(clobber (match_scratch 5 ""))] (clobber (match_scratch 5 ""))]
"reload_completed" "reload_completed"
[(parallel [(set (match_dup 4) (unspec:DI [(match_dup 1)] UNSPEC_FIST_CEIL)) [(parallel [(set (match_dup 4)
(unspec:DI [(match_dup 1)] UNSPEC_FIST_CEIL))
(use (match_dup 2)) (use (match_dup 2))
(use (match_dup 3)) (use (match_dup 3))
(clobber (match_dup 5))]) (clobber (match_dup 5))])
...@@ -14952,14 +14949,15 @@ ...@@ -14952,14 +14949,15 @@
(clobber (match_operand:DI 4 "memory_operand" "")) (clobber (match_operand:DI 4 "memory_operand" ""))
(clobber (match_scratch 5 ""))] (clobber (match_scratch 5 ""))]
"reload_completed" "reload_completed"
[(parallel [(set (match_dup 0) (unspec:DI [(match_dup 1)] UNSPEC_FIST_CEIL)) [(parallel [(set (match_dup 0)
(unspec:DI [(match_dup 1)] UNSPEC_FIST_CEIL))
(use (match_dup 2)) (use (match_dup 2))
(use (match_dup 3)) (use (match_dup 3))
(clobber (match_dup 5))])]) (clobber (match_dup 5))])])
(define_insn "fist<mode>2_ceil" (define_insn "fist<mode>2_ceil"
[(set (match_operand:X87MODEI12 0 "memory_operand" "=m") [(set (match_operand:SWI24 0 "memory_operand" "=m")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f")] (unspec:SWI24 [(match_operand:XF 1 "register_operand" "f")]
UNSPEC_FIST_CEIL)) UNSPEC_FIST_CEIL))
(use (match_operand:HI 2 "memory_operand" "m")) (use (match_operand:HI 2 "memory_operand" "m"))
(use (match_operand:HI 3 "memory_operand" "m"))] (use (match_operand:HI 3 "memory_operand" "m"))]
...@@ -14971,12 +14969,12 @@ ...@@ -14971,12 +14969,12 @@
(set_attr "mode" "<MODE>")]) (set_attr "mode" "<MODE>")])
(define_insn "fist<mode>2_ceil_with_temp" (define_insn "fist<mode>2_ceil_with_temp"
[(set (match_operand:X87MODEI12 0 "nonimmediate_operand" "=m,?r") [(set (match_operand:SWI24 0 "nonimmediate_operand" "=m,?r")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f,f")] (unspec:SWI24 [(match_operand:XF 1 "register_operand" "f,f")]
UNSPEC_FIST_CEIL)) UNSPEC_FIST_CEIL))
(use (match_operand:HI 2 "memory_operand" "m,m")) (use (match_operand:HI 2 "memory_operand" "m,m"))
(use (match_operand:HI 3 "memory_operand" "m,m")) (use (match_operand:HI 3 "memory_operand" "m,m"))
(clobber (match_operand:X87MODEI12 4 "memory_operand" "=X,m"))] (clobber (match_operand:SWI24 4 "memory_operand" "=X,m"))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations"
"#" "#"
...@@ -14985,35 +14983,35 @@ ...@@ -14985,35 +14983,35 @@
(set_attr "mode" "<MODE>")]) (set_attr "mode" "<MODE>")])
(define_split (define_split
[(set (match_operand:X87MODEI12 0 "register_operand" "") [(set (match_operand:SWI24 0 "register_operand" "")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "")] (unspec:SWI24 [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST_CEIL)) UNSPEC_FIST_CEIL))
(use (match_operand:HI 2 "memory_operand" "")) (use (match_operand:HI 2 "memory_operand" ""))
(use (match_operand:HI 3 "memory_operand" "")) (use (match_operand:HI 3 "memory_operand" ""))
(clobber (match_operand:X87MODEI12 4 "memory_operand" ""))] (clobber (match_operand:SWI24 4 "memory_operand" ""))]
"reload_completed" "reload_completed"
[(parallel [(set (match_dup 4) (unspec:X87MODEI12 [(match_dup 1)] [(parallel [(set (match_dup 4)
UNSPEC_FIST_CEIL)) (unspec:SWI24 [(match_dup 1)] UNSPEC_FIST_CEIL))
(use (match_dup 2)) (use (match_dup 2))
(use (match_dup 3))]) (use (match_dup 3))])
(set (match_dup 0) (match_dup 4))]) (set (match_dup 0) (match_dup 4))])
(define_split (define_split
[(set (match_operand:X87MODEI12 0 "memory_operand" "") [(set (match_operand:SWI24 0 "memory_operand" "")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "")] (unspec:SWI24 [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST_CEIL)) UNSPEC_FIST_CEIL))
(use (match_operand:HI 2 "memory_operand" "")) (use (match_operand:HI 2 "memory_operand" ""))
(use (match_operand:HI 3 "memory_operand" "")) (use (match_operand:HI 3 "memory_operand" ""))
(clobber (match_operand:X87MODEI12 4 "memory_operand" ""))] (clobber (match_operand:SWI24 4 "memory_operand" ""))]
"reload_completed" "reload_completed"
[(parallel [(set (match_dup 0) (unspec:X87MODEI12 [(match_dup 1)] [(parallel [(set (match_dup 0)
UNSPEC_FIST_CEIL)) (unspec:SWI24 [(match_dup 1)] UNSPEC_FIST_CEIL))
(use (match_dup 2)) (use (match_dup 2))
(use (match_dup 3))])]) (use (match_dup 3))])])
(define_expand "lceilxf<mode>2" (define_expand "lceilxf<mode>2"
[(parallel [(set (match_operand:X87MODEI 0 "nonimmediate_operand" "") [(parallel [(set (match_operand:SWI248x 0 "nonimmediate_operand" "")
(unspec:X87MODEI [(match_operand:XF 1 "register_operand" "")] (unspec:SWI248x [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST_CEIL)) UNSPEC_FIST_CEIL))
(clobber (reg:CC FLAGS_REG))])] (clobber (reg:CC FLAGS_REG))])]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment