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riscv-gcc-1
Commit 5b8e7fa3 by David S. Miller Committed by David S. Miller
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sparc.md (zero_extendhidi2, [...]): Change remaining generic gen_rtx calls to specific genrtl ones. 

	* config/sparc/sparc.md (zero_extendhidi2, extendhisi2,
	extendqihi2, extendqisi2, extendqidi2, extendhidi2, adddi3,
	subdi3, negdi2, call, call_value, untyped_return, nonlocal_goto,
	splits and peepholes): Change remaining generic gen_rtx calls to
	specific genrtl ones.

From-SVN: r20667
parent 83b2940e
Showing with 75 additions and 67 deletions
gcc/ChangeLog
Mon Jun 22 23:57:31 1998 David S. Miller <davem@pierdol.cobaltmicro.com>
* config/sparc/sparc.md (zero_extendhidi2, extendhisi2,
extendqihi2, extendqisi2, extendqidi2, extendhidi2, adddi3,
subdi3, negdi2, call, call_value, untyped_return, nonlocal_goto,
splits and peepholes): Change remaining generic gen_rtx calls to
specific genrtl ones.
Mon Jun 22 22:21:46 1998 Richard Henderson <rth@cygnus.com> Mon Jun 22 22:21:46 1998 Richard Henderson <rth@cygnus.com>
* gcc.c (handle_braces): Recognize | between options as an or. * gcc.c (handle_braces): Recognize | between options as an or.
......
gcc/config/sparc/sparc.md
...@@ -3224,8 +3224,8 @@ ...@@ -3224,8 +3224,8 @@
operand1 = XEXP (operand1, 0); operand1 = XEXP (operand1, 0);
} }
emit_insn (gen_ashldi3 (temp, gen_rtx (SUBREG, DImode, operand1, emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operand1,
op1_subword), op1_subword),
shift_48)); shift_48));
emit_insn (gen_lshrdi3 (operand0, temp, shift_48)); emit_insn (gen_lshrdi3 (operand0, temp, shift_48));
DONE; DONE;
...@@ -3333,8 +3333,8 @@ return \"srl %1,0,%0\"; ...@@ -3333,8 +3333,8 @@ return \"srl %1,0,%0\";
operand1 = XEXP (operand1, 0); operand1 = XEXP (operand1, 0);
} }
emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1, emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1,
op1_subword), op1_subword),
shift_16)); shift_16));
emit_insn (gen_ashrsi3 (operand0, temp, shift_16)); emit_insn (gen_ashrsi3 (operand0, temp, shift_16));
DONE; DONE;
...@@ -3368,11 +3368,11 @@ return \"srl %1,0,%0\"; ...@@ -3368,11 +3368,11 @@ return \"srl %1,0,%0\";
op0_subword = SUBREG_WORD (operand0); op0_subword = SUBREG_WORD (operand0);
operand0 = XEXP (operand0, 0); operand0 = XEXP (operand0, 0);
} }
emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1, emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1,
op1_subword), op1_subword),
shift_24)); shift_24));
if (GET_MODE (operand0) != SImode) if (GET_MODE (operand0) != SImode)
operand0 = gen_rtx (SUBREG, SImode, operand0, op0_subword); operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subword);
emit_insn (gen_ashrsi3 (operand0, temp, shift_24)); emit_insn (gen_ashrsi3 (operand0, temp, shift_24));
DONE; DONE;
}") }")
...@@ -3400,8 +3400,8 @@ return \"srl %1,0,%0\"; ...@@ -3400,8 +3400,8 @@ return \"srl %1,0,%0\";
operand1 = XEXP (operand1, 0); operand1 = XEXP (operand1, 0);
} }
emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1, emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1,
op1_subword), op1_subword),
shift_24)); shift_24));
emit_insn (gen_ashrsi3 (operand0, temp, shift_24)); emit_insn (gen_ashrsi3 (operand0, temp, shift_24));
DONE; DONE;
...@@ -3430,8 +3430,8 @@ return \"srl %1,0,%0\"; ...@@ -3430,8 +3430,8 @@ return \"srl %1,0,%0\";
operand1 = XEXP (operand1, 0); operand1 = XEXP (operand1, 0);
} }
emit_insn (gen_ashldi3 (temp, gen_rtx (SUBREG, DImode, operand1, emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operand1,
op1_subword), op1_subword),
shift_56)); shift_56));
emit_insn (gen_ashrdi3 (operand0, temp, shift_56)); emit_insn (gen_ashrdi3 (operand0, temp, shift_56));
DONE; DONE;
...@@ -3460,8 +3460,8 @@ return \"srl %1,0,%0\"; ...@@ -3460,8 +3460,8 @@ return \"srl %1,0,%0\";
operand1 = XEXP (operand1, 0); operand1 = XEXP (operand1, 0);
} }
emit_insn (gen_ashldi3 (temp, gen_rtx (SUBREG, DImode, operand1, emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operand1,
op1_subword), op1_subword),
shift_48)); shift_48));
emit_insn (gen_ashrdi3 (operand0, temp, shift_48)); emit_insn (gen_ashrdi3 (operand0, temp, shift_48));
DONE; DONE;
...@@ -3683,12 +3683,12 @@ return \"srl %1,0,%0\"; ...@@ -3683,12 +3683,12 @@ return \"srl %1,0,%0\";
{ {
if (! TARGET_ARCH64) if (! TARGET_ARCH64)
{ {
emit_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2, emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
gen_rtx (SET, VOIDmode, operands[0], gen_rtx_SET (VOIDmode, operands[0],
gen_rtx (PLUS, DImode, operands[1], gen_rtx_PLUS (DImode, operands[1],
operands[2])), operands[2])),
gen_rtx (CLOBBER, VOIDmode, gen_rtx_CLOBBER (VOIDmode,
gen_rtx (REG, SImode, SPARC_ICC_REG))))); gen_rtx_raw_REG (SImode, SPARC_ICC_REG)))));
DONE; DONE;
} }
}") }")
...@@ -3867,12 +3867,12 @@ return \"srl %1,0,%0\"; ...@@ -3867,12 +3867,12 @@ return \"srl %1,0,%0\";
{ {
if (! TARGET_ARCH64) if (! TARGET_ARCH64)
{ {
emit_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2, emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
gen_rtx (SET, VOIDmode, operands[0], gen_rtx_SET (VOIDmode, operands[0],
gen_rtx (MINUS, DImode, operands[1], gen_rtx_MINUS (DImode, operands[1],
operands[2])), operands[2])),
gen_rtx (CLOBBER, VOIDmode, gen_rtx_CLOBBER (VOIDmode,
gen_rtx (REG, SImode, SPARC_ICC_REG))))); gen_rtx_raw_REG (SImode, SPARC_ICC_REG)))));
DONE; DONE;
} }
}") }")
...@@ -4944,11 +4944,11 @@ return \"srl %1,0,%0\"; ...@@ -4944,11 +4944,11 @@ return \"srl %1,0,%0\";
{ {
if (! TARGET_ARCH64) if (! TARGET_ARCH64)
{ {
emit_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2, emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
gen_rtx (SET, VOIDmode, operand0, gen_rtx_SET (VOIDmode, operand0,
gen_rtx (NEG, DImode, operand1)), gen_rtx_NEG (DImode, operand1)),
gen_rtx (CLOBBER, VOIDmode, gen_rtx_CLOBBER (VOIDmode,
gen_rtx (REG, SImode, SPARC_ICC_REG))))); gen_rtx_raw_REG (SImode, SPARC_ICC_REG)))));
DONE; DONE;
} }
}") }")
...@@ -5622,21 +5622,21 @@ if (! TARGET_ARCH64) ...@@ -5622,21 +5622,21 @@ if (! TARGET_ARCH64)
if (! TARGET_ARCH64 && INTVAL (operands[3]) != 0) if (! TARGET_ARCH64 && INTVAL (operands[3]) != 0)
emit_jump_insn emit_jump_insn
(gen_rtx (PARALLEL, VOIDmode, (gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (3, gen_rtvec (3,
gen_rtx (SET, VOIDmode, pc_rtx, gen_rtx_SET (VOIDmode, pc_rtx,
XEXP (operands[0], 0)), XEXP (operands[0], 0)),
GEN_INT (INTVAL (operands[3]) & 0xfff), GEN_INT (INTVAL (operands[3]) & 0xfff),
gen_rtx (CLOBBER, VOIDmode, gen_rtx_CLOBBER (VOIDmode,
gen_rtx (REG, Pmode, 15))))); gen_rtx_raw_REG (Pmode, 15)))));
else else
emit_jump_insn emit_jump_insn
(gen_rtx (PARALLEL, VOIDmode, (gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, gen_rtvec (2,
gen_rtx (SET, VOIDmode, pc_rtx, gen_rtx_SET (VOIDmode, pc_rtx,
XEXP (operands[0], 0)), XEXP (operands[0], 0)),
gen_rtx (CLOBBER, VOIDmode, gen_rtx_CLOBBER (VOIDmode,
gen_rtx (REG, Pmode, 15))))); gen_rtx_raw_REG (Pmode, 15)))));
goto finish_call; goto finish_call;
} }
...@@ -5656,17 +5656,17 @@ if (! TARGET_ARCH64) ...@@ -5656,17 +5656,17 @@ if (! TARGET_ARCH64)
if (! TARGET_ARCH64 && INTVAL (operands[3]) != 0) if (! TARGET_ARCH64 && INTVAL (operands[3]) != 0)
emit_call_insn emit_call_insn
(gen_rtx (PARALLEL, VOIDmode, (gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (3, gen_rtx (CALL, VOIDmode, fn_rtx, nregs_rtx), gen_rtvec (3, gen_rtx_CALL (VOIDmode, fn_rtx, nregs_rtx),
GEN_INT (INTVAL (operands[3]) & 0xfff), GEN_INT (INTVAL (operands[3]) & 0xfff),
gen_rtx (CLOBBER, VOIDmode, gen_rtx_CLOBBER (VOIDmode,
gen_rtx (REG, Pmode, 15))))); gen_rtx_raw_REG (Pmode, 15)))));
else else
emit_call_insn emit_call_insn
(gen_rtx (PARALLEL, VOIDmode, (gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, gen_rtx (CALL, VOIDmode, fn_rtx, nregs_rtx), gen_rtvec (2, gen_rtx_CALL (VOIDmode, fn_rtx, nregs_rtx),
gen_rtx (CLOBBER, VOIDmode, gen_rtx_CLOBBER (VOIDmode,
gen_rtx (REG, Pmode, 15))))); gen_rtx_raw_REG (Pmode, 15)))));
finish_call: finish_call:
#if 0 #if 0
...@@ -5797,11 +5797,11 @@ if (! TARGET_ARCH64) ...@@ -5797,11 +5797,11 @@ if (! TARGET_ARCH64)
#endif #endif
vec = gen_rtvec (2, vec = gen_rtvec (2,
gen_rtx (SET, VOIDmode, operands[0], gen_rtx_SET (VOIDmode, operands[0],
gen_rtx (CALL, VOIDmode, fn_rtx, nregs_rtx)), gen_rtx_CALL (VOIDmode, fn_rtx, nregs_rtx)),
gen_rtx (CLOBBER, VOIDmode, gen_rtx (REG, Pmode, 15))); gen_rtx_CLOBBER (VOIDmode, gen_rtx_raw_REG (Pmode, 15)));
emit_call_insn (gen_rtx (PARALLEL, VOIDmode, vec)); emit_call_insn (gen_rtx_PARALLEL (VOIDmode, vec));
DONE; DONE;
}") }")
...@@ -5891,20 +5891,20 @@ if (! TARGET_ARCH64) ...@@ -5891,20 +5891,20 @@ if (! TARGET_ARCH64)
"" ""
" "
{ {
rtx valreg1 = gen_rtx (REG, DImode, 24); rtx valreg1 = gen_rtx_raw_REG (DImode, 24);
rtx valreg2 = gen_rtx (REG, TARGET_ARCH64 ? TFmode : DFmode, 32); rtx valreg2 = gen_rtx_raw_REG (TARGET_ARCH64 ? TFmode : DFmode, 32);
rtx result = operands[0]; rtx result = operands[0];
if (! TARGET_ARCH64) if (! TARGET_ARCH64)
{ {
rtx rtnreg = gen_rtx (REG, SImode, (leaf_function ? 15 : 31)); rtx rtnreg = gen_rtx_raw_REG (SImode, (leaf_function ? 15 : 31));
rtx value = gen_reg_rtx (SImode); rtx value = gen_reg_rtx (SImode);
/* Fetch the instruction where we will return to and see if it's an unimp /* Fetch the instruction where we will return to and see if it's an unimp
instruction (the most significant 10 bits will be zero). If so, instruction (the most significant 10 bits will be zero). If so,
update the return address to skip the unimp instruction. */ update the return address to skip the unimp instruction. */
emit_move_insn (value, emit_move_insn (value,
gen_rtx (MEM, SImode, plus_constant (rtnreg, 8))); gen_rtx_MEM (SImode, plus_constant (rtnreg, 8)));
emit_insn (gen_lshrsi3 (value, value, GEN_INT (22))); emit_insn (gen_lshrsi3 (value, value, GEN_INT (22)));
emit_insn (gen_update_return (rtnreg, value)); emit_insn (gen_update_return (rtnreg, value));
} }
...@@ -5916,8 +5916,8 @@ if (! TARGET_ARCH64) ...@@ -5916,8 +5916,8 @@ if (! TARGET_ARCH64)
plus_constant (XEXP (result, 0), 8))); plus_constant (XEXP (result, 0), 8)));
/* Put USE insns before the return. */ /* Put USE insns before the return. */
emit_insn (gen_rtx (USE, VOIDmode, valreg1)); emit_insn (gen_rtx_USE (VOIDmode, valreg1));
emit_insn (gen_rtx (USE, VOIDmode, valreg2)); emit_insn (gen_rtx_USE (VOIDmode, valreg2));
/* Construct the return. */ /* Construct the return. */
expand_null_return (); expand_null_return ();
...@@ -5999,7 +5999,7 @@ if (! TARGET_ARCH64) ...@@ -5999,7 +5999,7 @@ if (! TARGET_ARCH64)
/* Find the containing function's current nonlocal goto handler, /* Find the containing function's current nonlocal goto handler,
which will do any cleanups and then jump to the label. */ which will do any cleanups and then jump to the label. */
labreg = gen_rtx (REG, Pmode, 8); labreg = gen_rtx_raw_REG (Pmode, 8);
emit_move_insn (labreg, lab); emit_move_insn (labreg, lab);
/* Restore %fp from stack pointer value for containing function. /* Restore %fp from stack pointer value for containing function.
...@@ -6009,8 +6009,8 @@ if (! TARGET_ARCH64) ...@@ -6009,8 +6009,8 @@ if (! TARGET_ARCH64)
/* USE of frame_pointer_rtx added for consistency; not clear if /* USE of frame_pointer_rtx added for consistency; not clear if
really needed. */ really needed. */
/*emit_insn (gen_rtx (USE, VOIDmode, frame_pointer_rtx));*/ /*emit_insn (gen_rtx_USE (VOIDmode, frame_pointer_rtx));*/
emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx)); emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx));
/* Return, restoring reg window and jumping to goto handler. */ /* Return, restoring reg window and jumping to goto handler. */
if (TARGET_V9 && GET_CODE (chain) == CONST_INT if (TARGET_V9 && GET_CODE (chain) == CONST_INT
&& ! (INTVAL (chain) & ~(HOST_WIDE_INT)0xffffffff)) && ! (INTVAL (chain) & ~(HOST_WIDE_INT)0xffffffff))
...@@ -6022,7 +6022,7 @@ if (! TARGET_ARCH64) ...@@ -6022,7 +6022,7 @@ if (! TARGET_ARCH64)
} }
/* Put in the static chain register the nonlocal label address. */ /* Put in the static chain register the nonlocal label address. */
emit_move_insn (static_chain_rtx, chain); emit_move_insn (static_chain_rtx, chain);
emit_insn (gen_rtx (USE, VOIDmode, static_chain_rtx)); emit_insn (gen_rtx_USE (VOIDmode, static_chain_rtx));
emit_insn (gen_goto_handler_and_restore (labreg)); emit_insn (gen_goto_handler_and_restore (labreg));
emit_barrier (); emit_barrier ();
DONE; DONE;
...@@ -6152,8 +6152,8 @@ if (! TARGET_ARCH64) ...@@ -6152,8 +6152,8 @@ if (! TARGET_ARCH64)
" "
{ {
operands[3] = XEXP (operands[0], 0); operands[3] = XEXP (operands[0], 0);
operands[4] = gen_rtx (MEM, GET_MODE (operands[0]), operands[4] = gen_rtx_MEM (GET_MODE (operands[0]),
gen_rtx (LO_SUM, SImode, operands[2], operands[3])); gen_rtx_LO_SUM (SImode, operands[2], operands[3]));
MEM_IN_STRUCT_P (operands[4]) = MEM_IN_STRUCT_P (operands[0]); MEM_IN_STRUCT_P (operands[4]) = MEM_IN_STRUCT_P (operands[0]);
MEM_VOLATILE_P (operands[4]) = MEM_VOLATILE_P (operands[0]); MEM_VOLATILE_P (operands[4]) = MEM_VOLATILE_P (operands[0]);
RTX_UNCHANGING_P (operands[4]) = RTX_UNCHANGING_P (operands[0]); RTX_UNCHANGING_P (operands[4]) = RTX_UNCHANGING_P (operands[0]);
...@@ -6170,7 +6170,7 @@ if (! TARGET_ARCH64) ...@@ -6170,7 +6170,7 @@ if (! TARGET_ARCH64)
rtx addr = legitimize_pic_address (XEXP (operands[0], 0), rtx addr = legitimize_pic_address (XEXP (operands[0], 0),
GET_MODE (operands[0]), GET_MODE (operands[0]),
operands[2]); operands[2]);
operands[3] = gen_rtx (MEM, GET_MODE (operands[0]), addr); operands[3] = gen_rtx_MEM (GET_MODE (operands[0]), addr);
MEM_IN_STRUCT_P (operands[3]) = MEM_IN_STRUCT_P (operands[0]); MEM_IN_STRUCT_P (operands[3]) = MEM_IN_STRUCT_P (operands[0]);
MEM_VOLATILE_P (operands[3]) = MEM_VOLATILE_P (operands[0]); MEM_VOLATILE_P (operands[3]) = MEM_VOLATILE_P (operands[0]);
RTX_UNCHANGING_P (operands[3]) = RTX_UNCHANGING_P (operands[0]); RTX_UNCHANGING_P (operands[3]) = RTX_UNCHANGING_P (operands[0]);
...@@ -6186,7 +6186,7 @@ if (! TARGET_ARCH64) ...@@ -6186,7 +6186,7 @@ if (! TARGET_ARCH64)
rtx addr = legitimize_pic_address (XEXP (operands[1], 0), rtx addr = legitimize_pic_address (XEXP (operands[1], 0),
GET_MODE (operands[1]), GET_MODE (operands[1]),
operands[0]); operands[0]);
operands[2] = gen_rtx (MEM, GET_MODE (operands[1]), addr); operands[2] = gen_rtx_MEM (GET_MODE (operands[1]), addr);
MEM_IN_STRUCT_P (operands[2]) = MEM_IN_STRUCT_P (operands[1]); MEM_IN_STRUCT_P (operands[2]) = MEM_IN_STRUCT_P (operands[1]);
MEM_VOLATILE_P (operands[2]) = MEM_VOLATILE_P (operands[1]); MEM_VOLATILE_P (operands[2]) = MEM_VOLATILE_P (operands[1]);
RTX_UNCHANGING_P (operands[2]) = RTX_UNCHANGING_P (operands[1]); RTX_UNCHANGING_P (operands[2]) = RTX_UNCHANGING_P (operands[1]);
...@@ -6204,7 +6204,7 @@ if (! TARGET_ARCH64) ...@@ -6204,7 +6204,7 @@ if (! TARGET_ARCH64)
rtx addr = legitimize_pic_address (XEXP (operands[2], 0), rtx addr = legitimize_pic_address (XEXP (operands[2], 0),
GET_MODE (operands[2]), GET_MODE (operands[2]),
operands[0]); operands[0]);
operands[3] = gen_rtx (MEM, GET_MODE (operands[2]), addr); operands[3] = gen_rtx_MEM (GET_MODE (operands[2]), addr);
MEM_IN_STRUCT_P (operands[3]) = MEM_IN_STRUCT_P (operands[2]); MEM_IN_STRUCT_P (operands[3]) = MEM_IN_STRUCT_P (operands[2]);
MEM_VOLATILE_P (operands[3]) = MEM_VOLATILE_P (operands[2]); MEM_VOLATILE_P (operands[3]) = MEM_VOLATILE_P (operands[2]);
RTX_UNCHANGING_P (operands[3]) = RTX_UNCHANGING_P (operands[2]); RTX_UNCHANGING_P (operands[3]) = RTX_UNCHANGING_P (operands[2]);
...@@ -6483,8 +6483,8 @@ if (! TARGET_ARCH64) ...@@ -6483,8 +6483,8 @@ if (! TARGET_ARCH64)
{ {
/* Go by way of output_move_double in case the register in operand 2 /* Go by way of output_move_double in case the register in operand 2
is not properly aligned for ldd. */ is not properly aligned for ldd. */
operands[1] = gen_rtx (MEM, DFmode, operands[1] = gen_rtx_MEM (DFmode,
gen_rtx (LO_SUM, SImode, operands[0], operands[1])); gen_rtx_LO_SUM (SImode, operands[0], operands[1]));
operands[0] = operands[2]; operands[0] = operands[2];
return output_move_double (operands); return output_move_double (operands);
}") }")
......
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